| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i965/ |
| H A D | brw_draw.c | 92 uint32_t hw_prim = prim_to_hw_prim[prim->mode]; local
102 hw_prim = _3DPRIM_TRISTRIP;
108 hw_prim = _3DPRIM_TRIFAN;
111 if (hw_prim != brw->primitive) {
112 brw->primitive = hw_prim;
125 uint32_t hw_prim; local
129 hw_prim = prim_to_hw_prim[prim->mode];
131 if (hw_prim != brw->primitive) {
132 brw->primitive = hw_prim;
151 uint32_t hw_prim)
149 brw_emit_prim(struct brw_context *brw, const struct _mesa_prim *prim, uint32_t hw_prim) argument
206 gen7_emit_prim(struct brw_context *brw, const struct _mesa_prim *prim, uint32_t hw_prim) argument
[all...] |
| /external/mesa3d/src/mesa/drivers/dri/i965/ |
| H A D | brw_draw.c | 92 uint32_t hw_prim = prim_to_hw_prim[prim->mode]; local
102 hw_prim = _3DPRIM_TRISTRIP;
108 hw_prim = _3DPRIM_TRIFAN;
111 if (hw_prim != brw->primitive) {
112 brw->primitive = hw_prim;
125 uint32_t hw_prim; local
129 hw_prim = prim_to_hw_prim[prim->mode];
131 if (hw_prim != brw->primitive) {
132 brw->primitive = hw_prim;
151 uint32_t hw_prim)
149 brw_emit_prim(struct brw_context *brw, const struct _mesa_prim *prim, uint32_t hw_prim) argument
206 gen7_emit_prim(struct brw_context *brw, const struct _mesa_prim *prim, uint32_t hw_prim) argument
[all...] |
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/r200/ |
| H A D | r200_tcl.h | 40 extern void r200TclPrimitive( struct gl_context *ctx, GLenum prim, int hw_prim );
|
| H A D | r200_tcl.c | 108 #define ELT_INIT(prim, hw_prim) \
109 r200TclPrimitive( ctx, prim, hw_prim | R200_VF_PRIM_WALK_IND )
260 int hw_prim )
263 GLuint newprim = hw_prim | R200_VF_TCL_OUTPUT_VTX_ENABLE;
270 !discrete_prim[hw_prim&0xf]) {
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_tcl.h | 41 extern void radeonTclPrimitive( struct gl_context *ctx, GLenum prim, int hw_prim );
|
| H A D | radeon_tcl.c | 111 #define ELT_INIT(prim, hw_prim) \
112 radeonTclPrimitive( ctx, prim, hw_prim | RADEON_CP_VC_CNTL_PRIM_WALK_IND )
249 int hw_prim )
253 GLuint newprim = hw_prim | RADEON_CP_VC_CNTL_TCL_ENABLE;
260 !discrete_prim[hw_prim&0xf]) {
|
| H A D | radeon_swtcl.c | 358 static const GLuint hw_prim[GL_POLYGON+1] = { variable
375 rmesa->radeon.swtcl.hw_primitive = hw_prim[prim];
|
| /external/mesa3d/src/mesa/drivers/dri/r200/ |
| H A D | r200_tcl.h | 40 extern void r200TclPrimitive( struct gl_context *ctx, GLenum prim, int hw_prim );
|
| H A D | r200_tcl.c | 108 #define ELT_INIT(prim, hw_prim) \
109 r200TclPrimitive( ctx, prim, hw_prim | R200_VF_PRIM_WALK_IND )
260 int hw_prim )
263 GLuint newprim = hw_prim | R200_VF_TCL_OUTPUT_VTX_ENABLE;
270 !discrete_prim[hw_prim&0xf]) {
|
| /external/mesa3d/src/mesa/drivers/dri/radeon/ |
| H A D | radeon_tcl.h | 41 extern void radeonTclPrimitive( struct gl_context *ctx, GLenum prim, int hw_prim );
|
| H A D | radeon_tcl.c | 111 #define ELT_INIT(prim, hw_prim) \
112 radeonTclPrimitive( ctx, prim, hw_prim | RADEON_CP_VC_CNTL_PRIM_WALK_IND )
249 int hw_prim )
253 GLuint newprim = hw_prim | RADEON_CP_VC_CNTL_TCL_ENABLE;
260 !discrete_prim[hw_prim&0xf]) {
|
| H A D | radeon_swtcl.c | 358 static const GLuint hw_prim[GL_POLYGON+1] = { variable
375 rmesa->radeon.swtcl.hw_primitive = hw_prim[prim];
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/svga/ |
| H A D | svga_draw_elements.c | 112 unsigned hw_prim; local
117 hw_prim = svga_translate_prim(prim, count, &hw_count);
143 range.primType = hw_prim;
|
| H A D | svga_draw_arrays.c | 192 unsigned hw_prim; local
195 hw_prim = svga_translate_prim(prim, count, &hw_count);
199 range.primType = hw_prim;
|
| H A D | svga_context.h | 335 unsigned hw_prim; member in struct:svga_context::__anon14122
|
| /external/mesa3d/src/gallium/drivers/svga/ |
| H A D | svga_draw_elements.c | 112 unsigned hw_prim; local
117 hw_prim = svga_translate_prim(prim, count, &hw_count);
143 range.primType = hw_prim;
|
| H A D | svga_draw_arrays.c | 192 unsigned hw_prim; local
195 hw_prim = svga_translate_prim(prim, count, &hw_count);
199 range.primType = hw_prim;
|
| H A D | svga_context.h | 335 unsigned hw_prim; member in struct:svga_context::__anon27533
|
| /external/chromium_org/third_party/mesa/src/src/gallium/drivers/i915/ |
| H A D | i915_state_inlines.h | 214 static INLINE boolean i915_validate_vertices( unsigned hw_prim, unsigned nr ) argument
218 switch (hw_prim) {
|
| /external/mesa3d/src/gallium/drivers/i915/ |
| H A D | i915_state_inlines.h | 214 static INLINE boolean i915_validate_vertices( unsigned hw_prim, unsigned nr ) argument
218 switch (hw_prim) {
|
| /external/chromium_org/third_party/mesa/src/src/mesa/drivers/dri/i915/ |
| H A D | intel_render.c | 72 static uint32_t hw_prim[GL_POLYGON + 1] = { variable
119 intel_set_prim(intel, hw_prim[prim]);
|
| H A D | intel_tris.c | 675 static const GLuint hw_prim[GL_POLYGON + 1] = { variable
688 #define RASTERIZE(x) intelRasterPrimitive( ctx, x, hw_prim[x] )
1166 intelRasterPrimitive(ctx, reduced_prim[prim], hw_prim[prim]);
|
| /external/mesa3d/src/mesa/drivers/dri/i915/ |
| H A D | intel_render.c | 72 static uint32_t hw_prim[GL_POLYGON + 1] = { variable
119 intel_set_prim(intel, hw_prim[prim]);
|
| H A D | intel_tris.c | 675 static const GLuint hw_prim[GL_POLYGON + 1] = { variable
688 #define RASTERIZE(x) intelRasterPrimitive( ctx, x, hw_prim[x] )
1166 intelRasterPrimitive(ctx, reduced_prim[prim], hw_prim[prim]);
|