| 79198063b8adb23536b291081f8df8571926950e |
|
12-Jul-2012 |
Eric Anholt <eric@anholt.net> |
intel: Rename INTEL_DEBUG=fall to INTEL_DEBUG=perf.
I want to introduce some more debug output for performance surprises that
includes fallbacks, but aren't necessarily software rasterization. Leave
INTEL_DEBUG=fall in place for those that have used that flag before.
Reviewed-by: Jordan Justen <jordan.l.justen@intel.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| c738ea1191cd1b5a0dc60b0e6d05fd918083e961 |
|
18-Jul-2012 |
Paul Berry <stereotype441@gmail.com> |
intel: Make more consistent use of _mesa_is_{user,winsys}_fbo()
A lot of code was still differentiating between between winsys and
user fbos by testing the fbo's name against zero. This converts
everything in the i915 and 965 drivers over to use _mesa_is_user_fbo()
and _mesa_is_winsys_fbo().
Reviewed-by: Brian Paul <brianp@vmware.com>
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| c6532875493ffe7de9c37924c70ebf6d0472e23d |
|
17-Mar-2012 |
Yuanhan Liu <yuanhan.liu@linux.intel.com> |
i915: set SPRITE_POINT_ENABLE bit correctly
When SPRITE_POINT_ENABLE bit is set, the texture coord would be
replaced, and this is only needed when we called something like
glTexEnvi(GL_POINT_SPRITE, GL_COORD_REPLACE, GL_TRUE).
And more, we currently handle varying inputs as texture coord,
we would be careful when setting this bit and set it just when
needed, or you will find the value of varying input is not right
and changed.
Thus we do set SPRITE_POINT_ENABLE bit only when all enabled tex
coord units need do CoordReplace. Or fallback is needed to make
sure the rendering is right.
With handling the bit setup at i915_update_sprite_point_enable(),
we don't need the relative code at i915Enable then.
This patch would _really_ fix the webglc point-size.html test case and
of course, not regress piglit point-sprite and glean-pointSprite
testcase.
NOTE: This is a candidate for stable release branches.
v2: fallback just when all enabled tex coord units need do
CoordReplace (Eric)
v3: move the sprite point validate code at I915InvalidateState (Eric)
v4: sprite point enable bit update based on _NEW_PROGRAM, too
add relative _NEW-state comments to show what state is being used(Eric)
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 67d3ff760a33f3f98b89d3a6422bb85c199a9963 |
|
06-Mar-2012 |
Eric Anholt <eric@anholt.net> |
intel: Drop the INTEL_STRICT_CONFORMANCE environment variable.
If you want to test the graphics driver, you want to test it under the
conditions that users will see, not some set of additional fallbacks.
If you want to test swrast, run the swrast driver (or no_rast=true)
instead.
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 6b0a07f9ce844a8a96e2583bd37ed8453bf151c6 |
|
11-Feb-2012 |
Paul Berry <stereotype441@gmail.com> |
i915: Fix type of "specoffset" variable.
Commit 2e5a1a2 (intel: Convert from GLboolean to 'bool' from
stdbool.h.) converted the "specoffset" local variable (in
intel_tris.c) from a GLboolean to a bool. However, GLboolean was the
wrong type for specoffset--it should have been a GLuint (to match the
declaration of specoffset in struct intel_context).
This patch changes specoffset to the proper type.
Fixes piglit test general/two-sided-lighting-separate-specular.
This is a candidate for stable branches.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=45917
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| db364a8af0d19e4032ac44635834737017e1051c |
|
22-Oct-2011 |
Eric Anholt <eric@anholt.net> |
i915: Move the always_flush_cache code to triangle emit.
This could have broken always_flush_cache on i965, since
reserved_space doesn't reflect the size of the workaround flushes, and
we might run out of space. This should make always_flush_cache more
useful on pre-i965, anyway (since the point is to flush around each
draw call, even within a batchbuffer).
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 2e5a1a254ed81b1d3efa6064f48183eefac784d0 |
|
07-Oct-2011 |
Kenneth Graunke <kenneth@whitecape.org> |
intel: Convert from GLboolean to 'bool' from stdbool.h.
I initially produced the patch using this bash command:
for file in {intel,i915,i965}/*.{c,cpp,h}; do [ ! -h $file ] && sed -i
's/GLboolean/bool/g' $file && sed -i 's/GL_TRUE/true/g' $file && sed -i
's/GL_FALSE/false/g' $file; done
Then I manually added #include <stdbool.h> to fix compilation errors,
and converted a few functions back to GLboolean that were used in core
Mesa's function pointer table to avoid "incompatible pointer" warnings.
Finally, I cleaned up some whitespace issues introduced by the change.
Signed-off-by: Kenneth Graunke <kenneth@whitecape.org>
Acked-by: Chad Versace <chad@chad-versace.us>
Acked-by: Paul Berry <stereotype441@gmail.com>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 6118bbd0a67773d9247f3252a0643657bbd898a0 |
|
25-Aug-2011 |
Ian Romanick <ian.d.romanick@intel.com> |
mesa/tnl_dd: Remove unused header file t_dd_rendertmp.h
Acked-by: Kristian Høgsberg <krh@bitplanet.net>
Acked-by: Marek Olšák <maraeo@gmail.com>
Acked-by: Alan Coopersmith <alan.coopersmith@oracle.com>
Acked-by: Jakob Bornecrantz <jakob@vmware.com>
Acked-by: Dave Airlie <airlied@redhat.com>
Build-Tested-by: Jakob Bornecrantz <jakob@vmware.com>
Tested-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| cb5e0ba2aa97df28a9faeb7ca0d2f0cdfcf4e507 |
|
13-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Simplify intel_wpos_* with a helper function.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 6e6b38860488a0b2b282866f095cea9860503a14 |
|
11-Jul-2011 |
Eric Anholt <eric@anholt.net> |
i915: Fix map/unmap mismatches from leaving INTEL_FALLBACK during TNL.
The first rendering after context create didn't know of the color
buffer yet, triggering a sw fallback. The intel_prepare_render() from
intelSpanRenderStart then found the buffer and turned off fallbacks,
but intelSpanRenderFinish was never called and things were left
mapped. By checking buffers before making the call on whether to do
the fallback pipeline or not, we avoid the fallback change inside of
the rendering pipeline.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31561
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| a8bde5c47e1e8df13b408e44a2ae79edffd5ebed |
|
07-Mar-2011 |
Henri Verbeet <hverbeet@gmail.com> |
i915: Only invert wpos when rendering to the system framebuffer.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 2c6793fb6bc89df16c23f727bcb072a157ab8d10 |
|
25-Nov-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Emit a single relocation per vbo
Reducing the number of relocations has lots of nice knock-on effects,
not least including reducing batch buffer size, auxilliary array sizes
(vmalloced and copied into the kernel), processing of uncached
relocations etc.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 8d68a90e225d831a395ba788e425cb717eec1f9a |
|
10-Feb-2011 |
Chris Wilson <chris@chris-wilson.co.uk> |
intel: use pwrite for batch
It's faster. Not only is the memcpy more efficiently performed in the
kernel (making up for the system call overhead), but by not using mmap
we remove the greater overhead of tracking the vma of every batch.
And it means we can read back from the batch buffer without incurring
the cost of a uncached read through the GTT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| f9995b30756140724f41daf963fa06167912be7f |
|
12-Oct-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Drop GLcontext typedef and use struct gl_context instead
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 34474fa4119378ef9fbb9fb557cc19c0a1ca1f7e |
|
07-Jun-2010 |
Eric Anholt <eric@anholt.net> |
intel: Change dri_bo_* to drm_intel_bo* to consistently use new API.
The slightly less mechanical change of converting the emit_reloc calls
will follow.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 0bf1ddd60a3660974ad54e410533eeb481949364 |
|
11-May-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Drop intelFlush().
This was missed in commit c4775a27e3aaa2006b98f225387499b79bc609ef.
Fixes i915 build.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| ff6bce552a1522160c64d10677a36a7ad6cf5f88 |
|
30-Mar-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Remove redundant fields from struct intel_context
All these pointers are in the __DRIcontext struct, which we point to.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 062a208814ad65d330f403c46d4bed88648f334f |
|
19-Mar-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
intel: Use bit-wise not instead of logical not (i830 path)
The assertion is checking that the low-order bits of offset are not
set. It does this by anding the inverted offset mask with the
offset. This is clearly intended to be a bit-wise "invert".
Fixes bug #25984.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| fda5078324e0a940a2ddfdd1c63ffceb47c5a717 |
|
18-Mar-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Use bit-wise not instead of logical not.
The assertion is checking that the low-order bits of offset are not
set. It does this by anding the inverted offset mask with the
offset. This is clearly intended to be a bit-wise "invert".
Fixes bug #25984.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 0384214923216b4bb7340070d08fcda2cbb79a93 |
|
27-Feb-2010 |
Ian Romanick <ian.d.romanick@intel.com> |
Remove stray defines of HAVE_RGBA
Now that color-index support is removed from t_dd_tritmp.h and
t_dd_unfilled.h, drivers no longer need define HAVE_RGBA.
Signed-off-by: Ian Romanick <ian.d.romanick@intel.com>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| b87406e55f029d29594ae76a4b39a4fe1007fe4f |
|
03-Mar-2010 |
Eric Anholt <eric@anholt.net> |
i915: Use x,y drawing offsets instead of changing buffer offsets.
This should fix rendering into mipmaps of tiled textures.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 415b7c7775dd7240abd2c929ea3335304a790d39 |
|
22-Feb-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Fix logic !gen >= 3
The effect of this was that all objects were aligned to 128 bytes
on all generations, rather than just gen2.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| ac6ce53af7f67d01afd8e33d297f95c21aa3405e |
|
22-Feb-2010 |
Chris Wilson <chris@chris-wilson.co.uk> |
i915: Remove superfluous MI_NOOP from vertex emission
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 298be2b028263b2c343a707662c6fbfa18293cb2 |
|
19-Feb-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
Replace the _mesa_*printf() wrappers with the plain libc versions
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| c641703f21c858464ca34a1f99c79ccfd9a85d70 |
|
31-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 9b22427911ad27efc1f36faee9462c6082d0417c |
|
25-Jan-2010 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_7_branch'
Conflicts:
src/mesa/drivers/dri/intel/intel_screen.c
src/mesa/drivers/dri/intel/intel_swapbuffers.c
src/mesa/drivers/dri/r300/r300_emit.c
src/mesa/drivers/dri/r300/r300_ioctl.c
src/mesa/drivers/dri/r300/r300_tex.c
src/mesa/drivers/dri/r300/r300_texstate.c
|
| 329c1b59106cf4ada27eaa4694600dc281d8c0de |
|
23-Jan-2010 |
Vinson Lee <vlee@vmware.com> |
i915: Remove unnecessary headers.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 5203b7227ccb6b618fa42f08434d4a3cf123dca2 |
|
02-Jan-2010 |
Kristian Høgsberg <krh@bitplanet.net> |
intel: Drop batchbuffer cliprect_mode tracking
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| f67748038935e609aa85450b20d550b4813c9429 |
|
17-Dec-2009 |
Eric Anholt <eric@anholt.net> |
intel: Replace some gen3 IS_* checks with context structure usage.
Shaves 400 bytes or so from i915_dri.so.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| cc39fcad89db2a4fc96b64915d42e5b1ac59d345 |
|
18-Nov-2009 |
Eric Anholt <eric@anholt.net> |
i915: Remove dead meta_draw_quad code.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| bcbfda71b03303d3f008a6f3cf8cb7d9667bf8d2 |
|
02-Nov-2009 |
Brian Paul <brianp@vmware.com> |
intel: avoid unnecessary front buffer flushing/updating
Before, if we just called glXMakeCurrent() and didn't render anything we'd
still trigger a flushFrontBuffer() call.
Now only set the intel->front_buffer_dirty field at state validation time
just before we draw something.
NOTE: additional calls to intel_check_front_buffer_rendering() might be
needed if I missed some rendering paths.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| ab9d1011f5549502a4b960c2067cde69856a2719 |
|
23-Oct-2009 |
Brian Paul <brianp@vmware.com> |
Merge branch 'mesa_7_6_branch'
|
| ea659f891740fab1943eca219ffbdd5ed3d1906c |
|
23-Oct-2009 |
Brian Paul <brianp@vmware.com> |
intel: Fallback field is a bitmask, use GLbitfield
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 7d4b7460b0e565d0574c00d1d40c426cfebc290d |
|
29-Jul-2009 |
Eric Anholt <eric@anholt.net> |
i915: Enable ARB_vertex_shader for both i915 and i830.
Since the TNL is all done in software anyway, it should be the same to
the user who's probably using ARB_vertex_program otherwise, but gives them
a nicer programming environment.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 3927874d9c7fafb61651d0fc69547c8e010181f5 |
|
29-Jun-2009 |
Eric Anholt <eric@anholt.net> |
intel: Make LOCK_HARDWARE recursive to avoid hand-rolling recursiveness.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 6b9c1446b35cb33d73bd8ea7aeed8d219d0a9989 |
|
13-Mar-2009 |
Brian Paul <brianp@vmware.com> |
i915: move declarations before code
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 34683150878e0af0859c94d0c1f0c4bf8395b042 |
|
05-Mar-2009 |
Robert Ellison <papillo@vmware.com> |
i965: add software fallback for conformant 3D textures and GL_CLAMP
The i965 hardware cannot do GL_CLAMP behavior on textures; an earlier
commit forced a software fallback if strict conformance was required
(i.e. the INTEL_STRICT_CONFORMANCE environment variable was set) and
2D textures were used, but it was somewhat flawed - it could trigger
the software fallback even if 2D textures weren't enabled, as long
as one texture unit was enabled.
This fixes that, and adds software fallback for GL_CLAMP behavior with
1D and 3D textures.
It also adds support for a particular setting of the INTEL_STRICT_CONFORMANCE
environment variable, which forces software fallbacks to be taken *all*
the time. This is helpful with debugging. The value is:
export INTEL_STRICT_CONFORMANCE=2
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 194d039f1efee0e666c2d1b1116fd5adea8cb942 |
|
21-Jan-2009 |
Kristian Høgsberg <krh@redhat.com> |
[intel] Remove remaining references to intel_wait_flips().
Oops.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| cd031749a75883a6fbf8fb7bf989b77a7c705819 |
|
28-Nov-2008 |
Dave Airlie <airlied@redhat.com> |
intel: restore old vertex submit paths for i8xx hardware.
Intel docs state that only 830/845 have VBOs, 855/865 don't. So
lets just not use them on i8xx at all.
This restores the old pre-vbo code and uses it on all 8xx hw.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 1412ca0be24461cad36de865851484464fac3bfe |
|
20-Nov-2008 |
airlied <airlied@unused-12-215.bne.redhat.com> |
intel: fix i830 comment + backwards VB offsets.
According to Keith the docs have these offsets the other way around
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| b9532f078a2fbf459b0403b6f656711f80ff83c2 |
|
21-Sep-2008 |
Eric Anholt <eric@anholt.net> |
i915: fix crash in flush_prim -> wait_flips -> flush_batch -> flush_prim.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| ecadb51bbcb972a79f3ed79e65a7986b9396e757 |
|
18-Sep-2008 |
Brian Paul <brian.paul@tungstengraphics.com> |
mesa: added "main/" prefix to includes, remove some -I paths from Makefile.template
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| f75843a517bd188639e6866db2a7b04de3524e16 |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Revert "Merge branch 'drm-gem'""
This reverts commit 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 7c81124d7c4a4d1da9f48cbf7e82ab1a3a970a7a |
|
24-Aug-2008 |
Dave Airlie <airlied@linux.ie> |
Revert "Merge branch 'drm-gem'"
This reverts commit 53675e5c05c0598b7ea206d5c27dbcae786a2c03.
Conflicts:
src/mesa/drivers/dri/i965/brw_wm_surface_state.c
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| d2796939f18815935c8fe1effb01fa9765d6c7d8 |
|
08-Aug-2008 |
Eric Anholt <eric@anholt.net> |
intel-gem: Update to new check_aperture API for classic mode.
To do this, I had to clean up some of 965 state upload stuff. We may end
up over-emitting state in the aperture overflow case, but that should be rare,
and I'd rather have the simplification of state management.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| a42dac187973cbc17be6c59db89264cbc935ab91 |
|
24-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Accumulate the VB into a local buffer and subdata it in.
This lets GEM use pwrite, for an additional 4% or so speedup.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 62d66caeba786f01f6159c980fda79606afe4c61 |
|
21-Jun-2008 |
Eric Anholt <eric@anholt.net> |
i915: Convert to using VBs instead of inline prims.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| c62f504eb6030097b679233a75f87cca1b0e617d |
|
19-Mar-2008 |
Zou Nan hai <nanhai.zou@intel.com> |
[i915] fix fragment.position
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 54bd506c0fcfd7dffa31bea22f3c0175ec41b9b0 |
|
25-Feb-2008 |
Kristian Høgsberg <krh@redhat.com> |
intel: Initialize color and spec arrays in LOCAL_VARS macro.
Avoids spamming compilation output with tons of warnings about
use of possibly uninitialized variables.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| 8517079cbcbbf31291b05420f3b776df712dfd47 |
|
14-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[i915] Fix driver from cliprects changes, and clean up state emission.
The fix for pageflipping with cliprects ended up causing a batch flush at
an inopportune time, which is fixed by moving it up.
Additionally, the recovery code for handling batch wraps at bad times is
replaced by just checking for the space up front, and using a no_batch_wrap
assert like on 965 to make sure that we weren't wrong about how much space that
was.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|
| a04b632350e5d0e9994fc667afc59407a39da0ba |
|
10-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Add more cliprect modes to cover other meanings for batch emits.
The previous change gave us only two modes, one which looped over the batch
per cliprect (3d drawing) and one that didn't (state updeast).
However, we really want 4:
- Batch doesn't care about cliprects (state updates)
- Batch needs DRAWING_RECTANGLE looping per cliprect (3d drawing)
- Batch needs to be executed just once (region fills, copies, etc.)
- Batch already includes cliprect handling, and must be flushed by unlock time
(copybuffers, clears).
All callers should now be fixed to use one of these states for any batchbuffer
emits. Thanks to Keith Whitwell for pointing out the failure.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| beddf653a914903156712aa472b5deaddb7bbaed |
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09-Jan-2008 |
Eric Anholt <eric@anholt.net> |
[intel] Clean up cliprect handling in intel drivers.
In particular, batch buffers are no longer flushed when switching from
CLIPRECTS to NO_CLIPRECTS or vice versa, and 965 just uses DRM cliprect
handling for primitives instead of trying to sneak in its own to avoid the
DRM stuff. The disadvantage is that we will re-execute state updates per
cliprect, but the advantage is that we will be able to accumulate larger
batch buffers, which were proving to be a major overhead.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 60d762aa625095a8c1f9597d8530bb5a6fa61b4c |
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02-Jan-2008 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: Needn't adjust pixel centers. fix #12944
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| fcd1e9dad6949e02380593a166432dbac311c80e |
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20-Dec-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Move meta_draw_quad into the vtbl with other meta operations.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| e54329233522591bbe8aad8a3fd6bcdc1e430f03 |
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20-Dec-2007 |
Xiang, Haihao <haihao.xiang@intel.com> |
i915: avoid dead lock in intel_meta_draw_poly. fix #13696
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| a8fee3a498c8c4966d57a5273408477f3aa3ce73 |
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15-Nov-2007 |
Keith Whitwell <keith@tungstengraphics.com> |
i915: Catch cases where not all state is emitted for a new batchbuffer.
This could lead to incorrect rendering or even lockups.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| df3c530bedd0ee59e0ae5c18a916f78fd3f7559a |
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10-Nov-2007 |
Eric Anholt <eric@anholt.net> |
[i915] Push locking in intelClearWithTris down inside meta_draw_poly.
The lock coverage and checks for cliprects were unneeded since the batchbuffer
will have INTEL_BATCH_CLIPRECTS anyway. It appeared to be a leftover from
intelClearWithBlit.
This makes the locking requirements of i915 meta_draw_quad match i965
meta_draw_quad.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 8cf9085bc7b96819d2bec1e749e15af58eefb2f3 |
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24-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Move i915tex driver into place as just i915.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 8fba8d2018643444fc17c590f3e8732e1a76c6b8 |
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24-Sep-2007 |
Eric Anholt <eric@anholt.net> |
Remove the old i915 driver now that i915tex works without TTM.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 7b803d649a02fa071b6f82f28e2308e7845d11c4 |
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22-Sep-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
fix the broken fallback string/debug stuff
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 5174e7c18162d54bfa5985ce66dcbc5c2150ed7d |
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22-Sep-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
remove extra indentation
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 122629f27925a9dc50029bebc5079f87f416a7e1 |
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20-Jul-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Some structure renaming. Prefix vertex/fragment-related structs with
"gl_" to match other structs.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| d9736db6676948e06712d4bcba46b7040452f870 |
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23-May-2006 |
Brian Paul <brian.paul@tungstengraphics.com> |
Add const qualifiers in a number of places.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| de99760bf3511d05185799c4fb4347f9e5f420f4 |
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12-Nov-2005 |
Brian Paul <brian.paul@tungstengraphics.com> |
Move stuff common to vertex/fragment_program into the base class, including:
Instructions, InputsRead, OutputsWritten, and Parameters.
Also, added debug functions: _mesa_print_instruction(),
_mesa_print_program_parameters() and revamp _mesa_print_program().
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 2860e5f5360aeb06f1f6f973e696d53a3da3f398 |
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18-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
Disable leftover debug statements
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 435eff8b852f59e13554a57f83a48bf8035ec794 |
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09-May-2005 |
Keith Whitwell <keith@tungstengraphics.com> |
i915 will use _TexEnvProgram (if active)
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 1cdfb6911638c65fd7659152d55b2f14e6adade9 |
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14-Aug-2004 |
Dave Airlie <airliedfreedesktop.org> |
bring over change from xorg trunk - let build on non-i386
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 3d38361b718d490e1e7fda64519952ec887cd149 |
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01-Jul-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
Rename the various function types in t_context.h to include a tnl_ prefix.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 594c3f67ac8fceb061e47b090ec4d149c55a1940 |
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18-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
add missing license texts
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
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| 41b58954e1742493452b91d9ecdb761db5de3bed |
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10-Jun-2004 |
Keith Whitwell <keith@tungstengraphics.com> |
New driver for i915 as well as older i830/i845/i865 chipsets.
/external/mesa3d/src/mesa/drivers/dri/i915/intel_tris.c
|