Searched refs:reg1 (Results 1 - 25 of 70) sorted by relevance

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/external/llvm/test/MC/MachO/
H A Dbad-macro.s5 .macro test_macro reg1, reg2
/external/linux-tools-perf/perf-3.12.0/arch/arm/lib/
H A Dmemcpy.S23 .macro ldr4w ptr reg1 reg2 reg3 reg4 abort
24 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4}
27 .macro ldr8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
28 ldmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
39 .macro str8w ptr reg1 reg2 reg3 reg4 reg5 reg6 reg7 reg8 abort
40 stmia \ptr!, {\reg1, \reg2, \reg3, \reg4, \reg5, \reg6, \reg7, \reg8}
47 .macro enter reg1 reg2
48 stmdb sp!, {r0, \reg1, \reg2}
51 .macro exit reg1 reg2
52 ldmfd sp!, {r0, \reg1, \reg
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/external/chromium_org/third_party/webrtc/system_wrappers/interface/
H A Dasm_defines.h52 .macro streqh reg1, reg2, num
53 strheq \reg1, \reg2, \num variable
/external/libunwind/src/ptrace/
H A D_UPT_access_mem.c63 long reg1, reg2;
64 reg1 = ptrace (PTRACE_PEEKDATA, pid, (void*) (uintptr_t) addr, 0);
70 *val = ((unw_word_t)(reg2) << 32) | (uint32_t) reg1;
/external/pixman/pixman/
H A Dpixman-arm-simd-asm.S223 .macro src_0565_8888_2pixels, reg1, reg2
224 and SCRATCH, WK&reg1, MASK @ 00000GGGGGG0000000000gggggg00000
225 bic WK&reg2, WK&reg1, MASK @ RRRRR000000BBBBBrrrrr000000bbbbb
227 mov WK&reg1, WK&reg2, lsl #16 @ rrrrr000000bbbbb0000000000000000
229 bic WK&reg2, WK&reg2, WK&reg1, lsr #16 @ RRRRR000000BBBBB0000000000000000
230 orr WK&reg1, WK&reg1, WK&reg1, lsr #5 @ rrrrrrrrrr0bbbbbbbbbb00000000000
232 pkhtb WK&reg1, WK&reg1, W
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H A Dpixman-arm-neon-asm.h76 .macro pixldst1 op, elem_size, reg1, mem_operand, abits variable
78 op&.&elem_size {d&reg1}, [&mem_operand&, :&abits&]!
80 op&.&elem_size {d&reg1}, [&mem_operand&]!
84 .macro pixldst2 op, elem_size, reg1, reg2, mem_operand, abits variable
86 op&.&elem_size {d&reg1, d&reg2}, [&mem_operand&, :&abits&]! variable
88 op&.&elem_size {d&reg1, d&reg2}, [&mem_operand&]! variable
92 .macro pixldst4 op, elem_size, reg1, reg2, reg3, reg4, mem_operand, abits variable
94 op&.&elem_size {d&reg1, d&reg2, d&reg3, d&reg4}, [&mem_operand&, :&abits&]! variable
96 op&.&elem_size {d&reg1, d&reg2, d&reg3, d&reg4}, [&mem_operand&]! variable
100 .macro pixldst0 op, elem_size, reg1, id variable
104 .macro pixldst3 op, elem_size, reg1, reg2, reg3, mem_operand variable
105 op&.&elem_size {d&reg1, d&reg2, d&reg3}, [&mem_operand&]! variable
108 .macro pixldst30 op, elem_size, reg1, reg2, reg3, idx, mem_operand variable
109 op&.&elem_size {d&reg1[idx], d&reg2[idx], d&reg3[idx]}, [&mem_operand&]! variable
212 .macro pixld1_s elem_size, reg1, mem_operand variable
256 .macro pixld2_s elem_size, reg1, reg2, mem_operand variable
275 pixld1_s elem_size, reg1, mem_operand variable
280 .macro pixld0_s elem_size, reg1, idx, mem_operand variable
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H A Dpixman-region.c295 PREFIX (_equal) (region_type_t *reg1, region_type_t *reg2) argument
301 if (reg1->extents.x1 != reg2->extents.x1)
304 if (reg1->extents.x2 != reg2->extents.x2)
307 if (reg1->extents.y1 != reg2->extents.y1)
310 if (reg1->extents.y2 != reg2->extents.y2)
313 if (PIXREGION_NUMRECTS (reg1) != PIXREGION_NUMRECTS (reg2))
316 rects1 = PIXREGION_RECTS (reg1);
319 for (i = 0; i != PIXREGION_NUMRECTS (reg1); i++)
749 region_type_t * reg1, /* First region in operation */
784 if (PIXREGION_NAR (reg1) || PIXREGION_NA
748 pixman_op(region_type_t * new_reg, region_type_t * reg1, region_type_t * reg2, overlap_proc_ptr overlap_func, int append_non1, int append_non2 ) argument
1157 _intersect(region_type_t * new_reg, region_type_t * reg1, region_type_t * reg2) argument
1371 _union(region_type_t *new_reg, region_type_t *reg1, region_type_t *reg2) argument
2022 _inverse(region_type_t *new_reg, region_type_t *reg1, box_type_t * inv_rect) argument
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H A Dpixman-android-neon.S84 .macro bilinear_load_8888 reg1, reg2, tmp
88 vld1.32 {reg1}, [TMP1], STRIDE
93 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2
95 bilinear_load_8888 reg1, reg2, tmp1
96 vmull.u8 acc1, reg1, d28
H A Dpixman-arm-simd-asm.h99 .macro pixldst op, cond=al, numbytes, reg0, reg1, reg2, reg3, base, unaligned=0 variable
103 op&r&cond WK&reg1, [base], #4 variable
107 op&m&cond&ia base!, {WK&reg0,WK&reg1,WK&reg2,WK&reg3} variable
112 op&r&cond WK&reg1, [base], #4 variable
114 op&m&cond&ia base!, {WK&reg0,WK&reg1}
127 .macro pixst_baseupdated cond, numbytes, reg0, reg1, reg2, reg3, base variable
129 stm&cond&db base, {WK&reg0,WK&reg1,WK&reg2,WK&reg3} variable
131 stm&cond&db base, {WK&reg0,WK&reg1}
H A Dpixman-arm-neon-asm-bilinear.S91 .macro bilinear_load_8888 reg1, reg2, tmp
95 vld1.32 {reg1}, [TMP1], STRIDE
99 .macro bilinear_load_0565 reg1, reg2, tmp
105 convert_four_0565_to_x888_packed reg2, reg1, reg2, tmp
109 acc1, acc2, reg1, reg2, reg3, reg4, tmp1, tmp2
111 bilinear_load_8888 reg1, reg2, tmp1
112 vmull.u8 acc1, reg1, d28
130 acc1, acc2, reg1, reg2, reg3, reg4, acc2lo, acc2hi
142 convert_0565_to_x888 acc2, reg3, reg2, reg1
143 vzip.u8 reg1, reg
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/external/chromium_org/third_party/boringssl/src/crypto/perlasm/
H A Dx86masm.pl39 { my($size,$addr,$reg1,$reg2,$idx)=@_;
42 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
61 $ret .= "+$reg1" if ($reg1 ne "");
64 { $ret .= "$reg1"; }
H A Dx86nasm.pl36 { my($size,$addr,$reg1,$reg2,$idx)=@_;
39 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
62 $ret .= "+$reg1" if ($reg1 ne "");
65 { $ret .= "$reg1"; }
H A Dx86gas.pl70 { my($addr,$reg1,$reg2,$idx)=@_;
73 if (!defined($idx) && 1*$reg2) { $idx=$reg2; $reg2=$reg1; undef $reg1; }
79 $reg1 = "%$reg1" if ($reg1);
86 $ret .= "($reg1,$reg2,$idx)";
88 elsif ($reg1)
89 { $ret .= "($reg1)"; }
/external/chromium_org/third_party/mesa/src/src/mesa/program/
H A Dregister_allocate.c189 struct ra_reg *reg1 = &regs->regs[r1]; local
191 if (reg1->conflict_list_size == reg1->num_conflicts) {
192 reg1->conflict_list_size *= 2;
193 reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list,
194 unsigned int, reg1->conflict_list_size);
196 reg1->conflict_list[reg1->num_conflicts++] = r2;
197 reg1
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/external/mesa3d/src/mesa/program/
H A Dregister_allocate.c189 struct ra_reg *reg1 = &regs->regs[r1]; local
191 if (reg1->conflict_list_size == reg1->num_conflicts) {
192 reg1->conflict_list_size *= 2;
193 reg1->conflict_list = reralloc(regs->regs, reg1->conflict_list,
194 unsigned int, reg1->conflict_list_size);
196 reg1->conflict_list[reg1->num_conflicts++] = r2;
197 reg1
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/external/chromium_org/third_party/skia/gm/
H A Dimageblur.cpp70 static GMRegistry reg1(MyFactory1);
H A Dimageblurtiled.cpp77 static GMRegistry reg1(MyFactory1);
/external/openssl/crypto/perlasm/
H A Dx86gas.pl70 { my($addr,$reg1,$reg2,$idx)=@_;
77 $reg1 = "%$reg1" if ($reg1);
84 $ret .= "($reg1,$reg2,$idx)";
86 elsif ($reg1)
87 { $ret .= "($reg1)"; }
H A Dx86masm.pl39 { my($size,$addr,$reg1,$reg2,$idx)=@_;
59 $ret .= "+$reg1" if ($reg1 ne "");
62 { $ret .= "$reg1"; }
H A Dx86nasm.pl36 { my($size,$addr,$reg1,$reg2,$idx)=@_;
60 $ret .= "+$reg1" if ($reg1 ne "");
63 { $ret .= "$reg1"; }
/external/skia/gm/
H A Dimageblur.cpp69 static GMRegistry reg1(MyFactory1);
H A Dimageblurtiled.cpp76 static GMRegistry reg1(MyFactory1);
/external/aac/libFDK/src/
H A Dfixpoint_math.cpp430 FIXP_DBL reg1, reg2, regtmp ; local
445 reg1 = invSqrtTab[ (INT)(val>>(DFRACT_BITS-1-(SQRT_BITS+1))) & SQRT_BITS_MASK ];
448 regtmp= fPow2Div2(reg1); /* a = Q^2 */
450 reg1 += (fMultDiv2(regtmp, reg1)<<4); /* Q = Q + Q*b */
455 reg1 = fMultDiv2(reg1, reg2) << 2;
460 return(reg1);
/external/linux-tools-perf/perf-3.12.0/arch/xtensa/lib/
H A Dmemset.S33 #define EX(insn,reg1,reg2,offset,handler) \
34 9: insn reg1, reg2, offset; \
/external/chromium_org/v8/test/cctest/
H A Dtest-utils-arm64.cc148 const Register& reg1) {
149 DCHECK(reg0.Is64Bits() && reg1.Is64Bits());
151 int64_t result = core->xreg(reg1.code());
146 Equal64(const Register& reg0, const RegisterDump* core, const Register& reg1) argument

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