Searched refs:targets (Results 1 - 12 of 12) sorted by path

/art/compiler/dex/portable/
H A Dmir_to_gbc.cc157 FindCaseTarget(current_dalvik_offset_ + payload->targets[i]);
174 const int32_t* targets = payload->GetTargets(); local
184 FindCaseTarget(current_dalvik_offset_ + targets[i]);
/art/compiler/dex/quick/arm/
H A Dcall_arm.cc57 tab_rec->targets = static_cast<LIR**>(arena_->Alloc(size * sizeof(LIR*), kArenaAllocLIR));
105 tab_rec->targets =
/art/compiler/dex/quick/arm64/
H A Dcall_arm64.cc57 tab_rec->targets = static_cast<LIR**>(arena_->Alloc(size * sizeof(LIR*), kArenaAllocLIR));
109 tab_rec->targets =
/art/compiler/dex/quick/
H A Dcodegen_util.cc538 * the auto pc-advance. For other targets the reference point
563 int disp = tab_rec->targets[elems]->offset - bx_offset;
571 tab_rec->targets[elems]->offset - bx_offset);
577 int disp = tab_rec->targets[elems]->offset - bx_offset;
582 Push32(code_buffer_, tab_rec->targets[elems]->offset - bx_offset);
851 const int32_t *targets = reinterpret_cast<const int32_t*>(&table[4]); local
855 tab_rec->targets[i] = InsertCaseLabel(base_vaddr + targets[i], i + low_key);
864 const int32_t* targets = &keys[entries]; local
866 tab_rec->targets[
898 const int32_t* targets = &keys[entries]; local
902 LOG(INFO) << " Key[" << keys[i] << "] -> 0x" << std::hex << targets[i]; local
917 const int32_t* targets = reinterpret_cast<const int32_t*>(&table[4]); local
924 << targets[i]; local
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H A Dgen_common.cc36 * be applicable to most targets. Only mid-level support utilities
1196 /* branch targets here */
2050 const int32_t* targets = &as_int32[1]; local
2059 mir_graph_->FindBlock(current_dalvik_offset_ + targets[i]);
2069 mir_graph_->FindBlock(current_dalvik_offset_ + targets[i]);
2074 mir_graph_->FindBlock(current_dalvik_offset_ + targets[i]);
2080 mir_graph_->FindBlock(current_dalvik_offset_ + targets[i]);
2107 const int32_t* targets = &keys[entries]; local
2112 mir_graph_->FindBlock(current_dalvik_offset_ + targets[i]);
H A Dmir_to_lir.h251 LIR** targets; // Array of case targets. member in struct:art::Mir2Lir::SwitchTable
336 * Working plan is, for all targets, to follow mechanism 1 for 64-bit core registers, and
637 // Shared by all targets - implemented in codegen_util.cc
721 // Shared by all targets - implemented in local_optimizations.cc
727 // Shared by all targets - implemented in ralloc_util.cc
819 // Shared by all targets - implemented in gen_common.cc.
885 // Shared by all targets - implemented in gen_invoke.cc.
990 // Shared by all targets - implemented in gen_loadstore.cc.
1085 // Shared by all targets
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/art/compiler/dex/quick/mips/
H A Dcall_mips.cc75 tab_rec->targets =
152 tab_rec->targets = static_cast<LIR**>(arena_->Alloc(size * sizeof(LIR*),
/art/compiler/dex/quick/x86/
H A Dcall_x86.cc37 const int32_t* targets = &keys[entries]; local
42 mir_graph_->FindBlock(current_dalvik_offset_ + targets[i]);
74 tab_rec->targets = static_cast<LIR**>(arena_->Alloc(size * sizeof(LIR*),
/art/compiler/sea_ir/code_gen/
H A Dcode_gen.cc233 std::vector<sea_ir::Region*>* targets = instruction->GetRegion()->GetSuccessors(); local
234 DCHECK_EQ(targets->size(), 1u);
235 llvm::BasicBlock* target_block = llvm_data_->GetBlock(targets->at(0));
/art/runtime/
H A Ddex_instruction.h48 const int32_t targets[]; variable
/art/runtime/interpreter/
H A Dinterpreter_common.h295 const int32_t* targets = reinterpret_cast<const int32_t*>(&switch_data[4]); local
296 DCHECK(IsAligned<4>(targets));
299 return targets[index];
/art/test/
H A DAndroid.run-test.mk160 # The path where build only targets will be output, e.g.
168 # Helper to create individual build targets for tests. Must be called with $(eval).

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