/external/skia/experimental/PdfViewer/pdfparser/native/pdfapi/ |
H A D | SkPdfFDFDictionary_autogen.cpp | 107 SkString SkPdfFDFDictionary::Target(SkPdfNativeDoc* doc) { function in class:SkPdfFDFDictionary 108 SkPdfNativeObject* ret = get("Target", ""); 116 return get("Target", "") != NULL;
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/external/skia/include/core/ |
H A D | SkImageDecoder.h | 343 struct Target { struct in class:SkImageDecoder
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/external/robolectric/lib/main/ |
H A D | android.jar | META-INF/ META-INF/MANIFEST.MF com/ com/android/ com/android/internal/ com/android/internal/util/ ... |
/external/owasp/sanitizer/tools/findbugs/lib/ |
H A D | ant.jar | META-INF/ META-INF/MANIFEST.MF org/ org/apache/ org/apache/tools/ org/apache/tools/ant/ ... |
H A D | findbugs.jar | META-INF/ META-INF/MANIFEST.MF default.xsl edu/ edu/umd/ edu/umd/cs/ edu/ ... |
/external/pdfium/core/src/fxcodec/lcms2/lcms2-2.6/src/ |
H A D | cmslut.c | 1693 // Target: LabK, 3 values of Lab plus destination K which is fixed 1697 cmsBool CMSEXPORT cmsPipelineEvalReverseFloat(cmsFloat32Number Target[], argument 1727 x[3] = Target[3]; 1739 error = EuclideanDistance(fx, Target, 3); 1772 tmp2.n[0] = fx[0] - Target[0]; 1773 tmp2.n[1] = fx[1] - Target[1]; 1774 tmp2.n[2] = fx[2] - Target[2];
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir.h | 300 class Target; 738 class Target class in class:nv50_ir::TexInstruction 741 Target(TexTarget targ = TEX_TARGET_2D) : target(targ) { } function in class:nv50_ir::TexInstruction::Target 750 Target& operator=(TexTarget targ) 782 inline void setTexture(Target targ, uint8_t r, uint8_t s) 794 Target target; 1023 Program(Type type, Target *targ); 1042 const Target *getTarget() const { return target; } 1048 Target *target;
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H A D | nv50_ir_target.h | 64 CodeEmitter(const Target *); 87 const Target *targ; 116 class Target class in namespace:nv50_ir 119 Target(bool j, bool s) : joinAnterior(j), hasSWSched(s) { } function in class:nv50_ir::Target 121 static Target *create(uint32_t chipset); 122 static void destroy(Target *); 213 const Target::OpInfo& Target::getOpInfo(const Instruction *insn) const 218 const Target::OpInfo& Target [all...] |
/external/mesa3d/src/gallium/drivers/r300/compiler/ |
H A D | radeon_program_pair.h | 75 unsigned int Target:2; member in struct:rc_pair_sub_instruction
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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/ |
H A D | AMDGPUAsmBackend.cpp | 33 MCValue Target, uint64_t &FixedValue) { 43 AMDGPUAsmBackend(const Target &T) 73 MCAsmBackend *llvm::createAMDGPUAsmBackend(const Target &T, StringRef TT) { 29 RecordRelocation(const MCAssembler &Asm, const MCAsmLayout &Layout, const MCFragment *Fragment, const MCFixup &Fixup, MCValue Target, uint64_t &FixedValue) argument
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/external/mesa3d/src/mesa/drivers/common/ |
H A D | meta.c | 208 GLenum Target; /**< GL_TEXTURE_2D or GL_TEXTURE_RECTANGLE */ member in struct:temp_texture 1176 tex->Target = GL_TEXTURE_RECTANGLE; 1182 tex->Target = GL_TEXTURE_2D; 1283 if (tex->Target == GL_TEXTURE_RECTANGLE) { 1306 _mesa_BindTexture(tex->Target, tex->TexObj); 1307 _mesa_TexParameteri(tex->Target, GL_TEXTURE_MIN_FILTER, filter); 1308 _mesa_TexParameteri(tex->Target, GL_TEXTURE_MAG_FILTER, filter); 1316 _mesa_CopyTexImage2D(tex->Target, 0, tex->IntFormat, 1321 _mesa_TexImage2D(tex->Target, 0, tex->IntFormat, 1325 _mesa_CopyTexSubImage2D(tex->Target, [all...] |
/external/mesa3d/src/mesa/main/ |
H A D | mtypes.h | 1268 GLenum Target; /**< GL_TEXTURE_1D, GL_TEXTURE_2D, etc. */ member in struct:gl_texture_object 1932 GLenum Target; /**< GL_VERTEX/FRAGMENT_PROGRAM_ARB, GL_FRAGMENT_PROGRAM_NV */ member in struct:gl_program 2491 GLenum Target; /**< The query target, when active */ member in struct:gl_query_object
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/external/llvm/utils/TableGen/ |
H A D | AsmMatcherEmitter.cpp | 391 /// AsmVariantID - Target's assembly syntax variant no. 607 /// Target - The target information. 608 CodeGenTarget &Target; member in class:__anon26561::AsmMatcherInfo 660 CodeGenTarget &Target, 952 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(LoweredTok)) 961 if (const CodeGenRegister *Reg = Info.Target.getRegisterByName(RegName)) 1080 Target.getRegBank().getRegisters(); 1082 Target.getRegBank().getRegClasses(); 1279 : Records(records), AsmParser(asmParser), Target(target) { 1339 unsigned VariantCount = Target [all...] |
H A D | AsmWriterEmitter.cpp | 38 CodeGenTarget Target; member in class:__anon26564::AsmWriterEmitter 286 Record *AsmWriter = Target.getAsmWriter(); 292 "void " << Target.getName() << ClassName 578 Record *AsmWriter = Target.getAsmWriter(); 581 Target.getRegBank().getRegisters(); 582 std::vector<Record*> AltNameIndices = Target.getRegAltNameIndices(); 589 "const char *" << Target.getName() << ClassName << "::"; 771 Record *AsmWriter = Target.getAsmWriter(); 793 CodeGenInstAlias *Alias = new CodeGenInstAlias(*I, Variant, Target); 874 Cond = std::string("MRI.getRegClass(") + Target [all...] |
H A D | CodeEmitterGen.cpp | 28 // be a CodeEmitter class in the Target.td that controls this sort of thing 45 std::string getInstructionCase(Record *R, CodeGenTarget &Target); 50 std::string &Case, CodeGenTarget &Target); 74 std::string &Case, CodeGenTarget &Target) { 75 CodeGenInstruction &CGI = Target.getInstruction(R); 189 CodeGenTarget &Target) { 199 if (Target.getInstructionSet()-> 201 CodeGenInstruction &CGI = Target.getInstruction(R); 220 NamedOpIndices, Case, Target); 235 CodeGenTarget Target(Record 71 AddCodeToMergeInOperand(Record *R, BitsInit *BI, const std::string &VarName, unsigned &NumberedOp, std::set<unsigned> &NamedOpIndices, std::string &Case, CodeGenTarget &Target) argument 188 getInstructionCase(Record *R, CodeGenTarget &Target) argument [all...] |
H A D | CodeGenMapTable.cpp | 90 // This class is used to represent InstrMapping class defined in Target.td file. 185 const CodeGenTarget &Target; member in class:__anon26574::MapTableEmitter 202 MapTableEmitter(CodeGenTarget &Target, RecordKeeper &Records, Record *IMRec): argument 203 Target(Target), InstrMapDesc(IMRec) { 363 Target.getInstructionsByEnumValue(); 364 std::string TargetName = Target.getName(); 565 CodeGenTarget Target(Records); 566 std::string TargetName = Target.getName(); 585 MapTableEmitter IMap(Target, Record [all...] |
H A D | CodeGenSchedule.cpp | 57 const CodeGenTarget &Target; member in struct:__anon26579::InstRegexOp 58 InstRegexOp(const CodeGenTarget &t): Target(t) {} 77 for (CodeGenTarget::inst_iterator I = Target.inst_begin(), 78 E = Target.inst_end(); I != E; ++I) { 91 Records(RK), Target(TGT) { 98 Sets.addOperator("instregex", new InstRegexOp(Target)); 217 for (CodeGenTarget::inst_iterator I = Target.inst_begin(), 218 E = Target.inst_end(); I != E; ++I) { 512 for (CodeGenTarget::inst_iterator I = Target.inst_begin(), 513 E = Target [all...] |
H A D | CodeGenSchedule.h | 221 const CodeGenTarget &Target; member in class:llvm::CodeGenSchedModels
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H A D | FixedLenDecoderEmitter.cpp | 93 Target(R), 113 CodeGenTarget Target; member in class:__anon26593::FixedLenDecoderEmitter 616 // to the destination. The Target is calculated from after the 16-bit 1700 static bool populateInstruction(CodeGenTarget &Target, 1752 if (Target.getInstructionSet()-> 1758 if (Target.getInstructionSet()-> 2178 Target.reverseBitsForLittleEndianEncoding(); 2181 NumberedInstructions = &Target.getInstructionsByEnumValue(); 2199 if (populateInstruction(Target, *Inst, i, Operands)) {
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H A D | InstrInfoEmitter.cpp | 60 void emitOperandTypesEnum(raw_ostream &OS, const CodeGenTarget &Target); 66 void emitOperandNameMappings(raw_ostream &OS, const CodeGenTarget &Target, 179 const CodeGenTarget &Target = CDP.getTargetInfo(); local 180 for (const CodeGenInstruction *Inst : Target.instructions()) { 237 const CodeGenTarget &Target, 240 const std::string &Namespace = Target.getInstNamespace(); 308 /// Operand types are all definitions derived of the Operand Target.td class. 310 const CodeGenTarget &Target) { 312 const std::string &Namespace = Target.getInstNamespace(); 342 emitSourceFileHeader("Target Instructio 236 emitOperandNameMappings(raw_ostream &OS, const CodeGenTarget &Target, const std::vector<const CodeGenInstruction*> &NumberedInstructions) argument 309 emitOperandTypesEnum(raw_ostream &OS, const CodeGenTarget &Target) argument 352 CodeGenTarget &Target = CDP.getTargetInfo(); local 543 CodeGenTarget &Target = CDP.getTargetInfo(); local [all...] |
H A D | PseudoLoweringEmitter.cpp | 51 CodeGenTarget Target; member in class:__anon26603::PseudoLoweringEmitter 62 PseudoLoweringEmitter(RecordKeeper &R) : Records(R), Target(R) {} 201 o << "bool " << Target.getName() + "AsmPrinter" << "::\n"
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H A D | RegisterInfoEmitter.cpp | 39 void runEnums(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank); 42 void runMCDesc(raw_ostream &o, CodeGenTarget &Target, CodeGenRegBank &Bank); 45 void runTargetHeader(raw_ostream &o, CodeGenTarget &Target, 49 void runTargetDesc(raw_ostream &o, CodeGenTarget &Target, 70 CodeGenTarget &Target, CodeGenRegBank &Bank) { 78 emitSourceFileHeader("Target Register Enum Values", OS); 124 const std::vector<Record*> &RegAltNameIndices = Target.getRegAltNameIndices(); 701 RegisterInfoEmitter::runMCDesc(raw_ostream &OS, CodeGenTarget &Target, argument 786 const std::string &TargetName = Target.getName(); 875 BVE.add(Target 69 runEnums(raw_ostream &OS, CodeGenTarget &Target, CodeGenRegBank &Bank) argument 951 runTargetHeader(raw_ostream &OS, CodeGenTarget &Target, CodeGenRegBank &RegBank) argument 1011 runTargetDesc(raw_ostream &OS, CodeGenTarget &Target, CodeGenRegBank &RegBank) argument [all...] |
H A D | SubtargetEmitter.cpp | 63 std::string Target; member in class:__anon26606::SubtargetEmitter 104 Records(R), SchedModels(TGT.getSchedModels()), Target(TGT.getName()) {} 129 OS << "namespace " << Target << " {\n"; local 186 << "extern const llvm::SubtargetFeatureKV " << Target local 205 << Target << "::" << Name << ", "; 214 OS << Target << "::" << ImpliesList[j]->getName(); 246 << "extern const llvm::SubtargetFeatureKV " << Target local 267 OS << Target << "::" << FeatureList[j]->getName(); 421 std::string StageTable = "\nextern const llvm::InstrStage " + Target + 426 std::string OperandCycleTable = "extern const unsigned " + Target 1092 << Target << "WriteProcResTable[] = {\\n" local 1103 OS << "}; // " << Target << "WriteProcResTable\\n"; local 1108 << Target << "WriteLatencyTable[] = {\\n" local 1119 OS << "}; // " << Target << "WriteLatencyTable\\n"; local 1124 << Target << "ReadAdvanceTable[] = {\\n" local 1136 OS << "}; // " << Target << "ReadAdvanceTable\\n"; local 1236 << Target << "ProcSchedKV[] = {\\n"; local 1385 OS << Target; local 1451 OS << "static inline void Init" << Target local 1456 OS << Target << "FeatureKV, "; local 1460 OS << Target << "SubTypeKV, "; local 1467 << Target << "ReadAdvanceTable, "; local 1472 << Target << "ForwardingPaths"; local 1514 OS << "extern const llvm::SubtargetFeatureKV " << Target << "FeatureKV[];\\n"; local 1515 OS << "extern const llvm::SubtargetFeatureKV " << Target << "SubTypeKV[];\\n"; local 1516 OS << "extern const llvm::SubtargetInfoKV " << Target << "ProcSchedKV[];\\n"; local 1518 << Target << "WriteProcResTable[];\\n"; local 1520 << Target << "WriteLatencyTable[];\\n"; local 1522 << Target << "ReadAdvanceTable[];\\n"; local 1525 OS << "extern const llvm::InstrStage " << Target << "Stages[];\\n"; local 1526 OS << "extern const unsigned " << Target << "OperandCycles[];\\n"; local 1527 OS << "extern const unsigned " << Target << "ForwardingPaths[];\\n"; local 1546 << Target << "ReadAdvanceTable, "; local 1551 << Target << "ForwardingPaths"; local [all...] |
/external/mdnsresponder/mDNSCore/ |
H A D | mDNSEmbeddedAPI.h | 1566 mDNSAddr Target; // Non-zero if you want to direct queries to a specific unicast target address member in struct:DNSQuestion_struct 1567 mDNSIPPort TargetPort; // Must be set if Target is set 1568 mDNSOpaque16 TargetQID; // Must be set if Target is set 1635 domainname Host; // Discovered result: Target host from SRV record 1637 mDNSAddr Addr; // Discovered result: Address of Target host from SRV record
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/external/llvm/tools/llc/ |
H A D | llc.cpp | 42 #include "llvm/Target/TargetLibraryInfo.h" 43 #include "llvm/Target/TargetMachine.h" 254 const Target *TheTarget = TargetRegistry::lookupTarget(MArch, TheTriple, 300 TargetMachine &Target = *target.get(); local 320 if (const DataLayout *DL = Target.getDataLayout()) 353 if (Target.addPassesToEmitFile(PM, FOS, FileType, NoVerify,
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