Searched refs:Ctx (Results 1 - 25 of 421) sorted by last modified time

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/external/mesa3d/src/gallium/drivers/radeon/MCTargetDesc/
H A DAMDGPUMCTargetDesc.cpp75 MCContext &Ctx) {
77 return createSIMCCodeEmitter(MCII, STI, Ctx);
79 return createR600MCCodeEmitter(MCII, STI, Ctx);
84 MCContext &Ctx, MCAsmBackend &MAB,
89 return createPureStreamer(Ctx, MAB, _OS, _Emitter);
73 createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, const MCSubtargetInfo &STI, MCContext &Ctx) argument
83 createMCStreamer(const Target &T, StringRef TT, MCContext &Ctx, MCAsmBackend &MAB, raw_ostream &_OS, MCCodeEmitter *_Emitter, bool RelaxAll, bool NoExecStack) argument
H A DAMDGPUMCTargetDesc.h33 MCContext &Ctx);
37 MCContext &Ctx);
H A DR600MCCodeEmitter.cpp44 MCContext &Ctx; member in class:__anon27321::R600MCCodeEmitter
50 : MCII(mcii), STI(sti), Ctx(ctx) { }
146 MCContext &Ctx) {
147 return new R600MCCodeEmitter(MCII, STI, Ctx);
144 createR600MCCodeEmitter(const MCInstrInfo &MCII, const MCSubtargetInfo &STI, MCContext &Ctx) argument
H A DSIMCCodeEmitter.cpp64 MCContext &Ctx; member in class:__anon27323::SIMCCodeEmitter
69 : MCII(mcii), STI(sti), Ctx(ctx) { }
127 MCContext &Ctx) {
128 return new SIMCCodeEmitter(MCII, STI, Ctx);
125 createSIMCCodeEmitter(const MCInstrInfo &MCII, const MCSubtargetInfo &STI, MCContext &Ctx) argument
/external/mesa3d/src/mesa/drivers/dri/i915/
H A Di830_context.h119 GLuint Ctx[I830_CTX_SETUP_SIZE]; member in struct:i830_hw_state
H A Di830_state.c64 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_TEST_MASK;
65 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_TEST_MASK |
67 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_REF_VALUE_MASK |
69 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_REF_VALUE |
85 i830->state.Ctx[I830_CTXREG_STATE4] &= ~MODE4_ENABLE_STENCIL_WRITE_MASK;
86 i830->state.Ctx[I830_CTXREG_STATE4] |= (ENABLE_STENCIL_WRITE_MASK |
193 i830->state.Ctx[I830_CTXREG_STENCILTST] &= ~(STENCIL_OPS_MASK);
194 i830->state.Ctx[I830_CTXREG_STENCILTST] |= (ENABLE_STENCIL_PARMS |
214 i830->state.Ctx[I830_CTXREG_STATE2] &= ~ALPHA_TEST_REF_MASK;
215 i830->state.Ctx[I830_CTXREG_STATE
[all...]
H A Di830_vtbl.c178 if (v0 != i830->state.Ctx[I830_CTXREG_VF] ||
179 v2 != i830->state.Ctx[I830_CTXREG_VF2] ||
180 mcsb1 != i830->state.Ctx[I830_CTXREG_MCSB1] ||
197 i830->state.Ctx[I830_CTXREG_VF] = v0;
198 i830->state.Ctx[I830_CTXREG_VF2] = v2;
199 i830->state.Ctx[I830_CTXREG_MCSB1] = mcsb1;
243 int vft0 = i830->state.Ctx[I830_CTXREG_VF];
244 int vft1 = i830->state.Ctx[I830_CTXREG_VF2];
394 sz += sizeof(state->Ctx);
489 emit(intel, state->Ctx, sizeo
[all...]
H A Di915_context.h219 GLuint Ctx[I915_CTX_SETUP_SIZE]; member in struct:i915_hw_state
H A Di915_fragprog.c1348 GLuint s4 = i915->state.Ctx[I915_CTXREG_LIS4] & ~S4_VFMT_MASK;
1419 if (s2 != i915->state.Ctx[I915_CTXREG_LIS2] ||
1420 s4 != i915->state.Ctx[I915_CTXREG_LIS4]) {
1439 i915->state.Ctx[I915_CTXREG_LIS2] = s2;
1440 i915->state.Ctx[I915_CTXREG_LIS4] = s4;
H A Di915_state.c97 GLuint dw = i915->state.Ctx[reg]; \
100 dirty |= dw != i915->state.Ctx[reg]; \
101 i915->state.Ctx[reg] = dw; \
187 dw = i915->state.Ctx[I915_CTXREG_LIS6];
191 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
192 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
209 dw0 = i915->state.Ctx[I915_CTXREG_LIS5];
210 dw1 = i915->state.Ctx[I915_CTXREG_LIS6];
226 if (dw0 != i915->state.Ctx[I915_CTXREG_LIS5] ||
227 dw1 != i915->state.Ctx[I915_CTXREG_LIS
[all...]
H A Di915_vtbl.c106 int lis2 = i915->state.Ctx[I915_CTXREG_LIS2];
107 int lis4 = i915->state.Ctx[I915_CTXREG_LIS4];
258 sz += sizeof(state->Ctx);
377 emit(intel, state->Ctx, sizeof(state->Ctx));
692 uint32_t dw = i915->state.Ctx[I915_CTXREG_LIS6];
697 if (dw != i915->state.Ctx[I915_CTXREG_LIS6]) {
699 i915->state.Ctx[I915_CTXREG_LIS6] = dw;
H A Dintel_tris.c300 OUT_BATCH((i830->state.Ctx[I830_CTXREG_VF] & VFT0_TEX_COUNT_MASK) >>
302 (i830->state.Ctx[I830_CTXREG_VF2] << 16) |
/external/llvm/unittests/IR/
H A DPatternMatch.cpp34 LLVMContext Ctx; member in struct:__anon26505::PatternMatchTest
41 : M(new Module("PatternMatchTestModule", Ctx)),
43 FunctionType::get(Type::getVoidTy(Ctx), /* IsVarArg */ false),
45 BB(BasicBlock::Create(Ctx, "entry", F)), IRB(BB) {}
H A DValueTest.cpp47 LLVMContext &Ctx = getGlobalContext(); local
48 std::unique_ptr<Module> M(new Module("TestModule", Ctx));
49 Type *Int8Ty = Type::getInt8Ty(Ctx);
50 Type *Int32Ty = Type::getInt32Ty(Ctx);
/external/llvm/unittests/Linker/
H A DLinkModulesTest.cpp25 M.reset(new Module("MyModule", Ctx));
27 Type::getInt8PtrTy(Ctx), Type::getInt32Ty(Ctx), false /*=isVarArg*/);
31 EntryBB = BasicBlock::Create(Ctx, "entry", F);
32 SwitchCase1BB = BasicBlock::Create(Ctx, "switch.case.1", F);
33 SwitchCase2BB = BasicBlock::Create(Ctx, "switch.case.2", F);
34 ExitBB = BasicBlock::Create(Ctx, "exit", F);
36 ArrayType *AT = ArrayType::get(Type::getInt8PtrTy(Ctx), 3);
49 ConstantInt *One = ConstantInt::get(Type::getInt32Ty(Ctx), 1);
51 Type::getInt8PtrTy(Ctx));
59 LLVMContext Ctx; member in class:__anon26516::LinkModuleTest
[all...]
/external/llvm/unittests/Support/
H A DYAMLParserTest.cpp25 // Assumes Ctx is an SMDiagnostic where Diag can be stored.
26 static void CollectDiagnosticsOutput(const SMDiagnostic &Diag, void *Ctx) { argument
27 SMDiagnostic* DiagOut = static_cast<SMDiagnostic*>(Ctx);
/external/llvm/tools/llvm-mc/
H A DDisassembler.cpp178 MCContext Ctx(MAI.get(), MRI.get(), nullptr);
181 T.createMCDisassembler(STI, Ctx));
H A Dllvm-mc.cpp321 SourceMgr &SrcMgr, MCContext &Ctx, MCStreamer &Str,
325 createMCAsmParser(SrcMgr, Ctx, Str, MAI));
405 MCContext Ctx(MAI.get(), MRI.get(), &MOFI, &SrcMgr);
406 MOFI.InitMCObjectFileInfo(TripleName, RelocModel, CMModel, Ctx);
409 Ctx.setAllowTemporaryLabels(false);
411 Ctx.setGenDwarfForAssembly(GenDwarfForAssembly);
419 Ctx.setDwarfVersion(DwarfVersion);
421 Ctx.setDwarfDebugFlags(StringRef(DwarfDebugFlags));
423 Ctx.setDwarfDebugProducer(StringRef(DwarfDebugProducer));
425 Ctx
320 AssembleInput(const char *ProgName, const Target *TheTarget, SourceMgr &SrcMgr, MCContext &Ctx, MCStreamer &Str, MCAsmInfo &MAI, MCSubtargetInfo &STI, MCInstrInfo &MCII, MCTargetOptions &MCOptions) argument
[all...]
/external/llvm/tools/llvm-objdump/
H A DMachODump.cpp229 MCContext Ctx(AsmInfo.get(), MRI.get(), nullptr);
231 TheTarget->createMCDisassembler(*STI, Ctx));
H A Dllvm-objdump.cpp319 MCContext Ctx(AsmInfo.get(), MRI.get(), MOFI.get());
322 TheTarget->createMCDisassembler(*STI, Ctx));
332 TheTarget->createMCRelocationInfo(TripleName, Ctx));
335 MCObjectSymbolizer::createObjectSymbolizer(Ctx, std::move(RelInfo),
/external/llvm/tools/llvm-readobj/
H A DCOFFDumper.cpp863 Win64EH::Dumper::Context Ctx(*Obj, Resolver, this);
864 Dumper.printData(Ctx);
H A DELFDumper.cpp923 ARM::EHABI::PrinterContext<ELFType<support::little, 2, false> > Ctx(W, Obj);
924 return Ctx.PrintUnwindInformation();
H A DWin64EHDumper.cpp115 static std::string formatSymbol(const Dumper::Context &Ctx, argument
123 if (Ctx.ResolveSymbol(Section, Offset, Symbol, Ctx.UserData) ||
137 static std::error_code resolveRelocation(const Dumper::Context &Ctx, argument
144 Ctx.ResolveSymbol(Section, Offset, Symbol, Ctx.UserData))
150 section_iterator SI = Ctx.COFF.section_begin();
154 ResolvedSection = Ctx.COFF.getCOFFSection(*SI);
160 void Dumper::printRuntimeFunctionEntry(const Context &Ctx, argument
165 formatSymbol(Ctx, Sectio
232 printUnwindInfo(const Context &Ctx, const coff_section *Section, off_t Offset, const UnwindInfo &UI) argument
276 printRuntimeFunction(const Context &Ctx, const coff_section *Section, uint64_t SectionOffset, const RuntimeFunction &RF) argument
300 printData(const Context &Ctx) argument
[all...]
H A DWin64EHDumper.h44 void printRuntimeFunctionEntry(const Context &Ctx,
49 void printUnwindInfo(const Context &Ctx, const object::coff_section *Section,
51 void printRuntimeFunction(const Context &Ctx,
58 void printData(const Context &Ctx);
/external/llvm/tools/llvm-rtdyld/
H A Dllvm-rtdyld.cpp333 MCContext Ctx(MAI.get(), MRI.get(), nullptr);
336 TheTarget->createMCDisassembler(*STI, Ctx));

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