1/*
2 * Copyright (C) 2013 The Android Open Source Project
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 *  * Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 *  * Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in
12 *    the documentation and/or other materials provided with the
13 *    distribution.
14 *
15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 * SUCH DAMAGE.
27 */
28/*
29 * Copyright (c) 2013 ARM Ltd
30 * All rights reserved.
31 *
32 * Redistribution and use in source and binary forms, with or without
33 * modification, are permitted provided that the following conditions
34 * are met:
35 * 1. Redistributions of source code must retain the above copyright
36 *    notice, this list of conditions and the following disclaimer.
37 * 2. Redistributions in binary form must reproduce the above copyright
38 *    notice, this list of conditions and the following disclaimer in the
39 *    documentation and/or other materials provided with the distribution.
40 * 3. The name of the company may not be used to endorse or promote
41 *    products derived from this software without specific prior written
42 *    permission.
43 *
44 * THIS SOFTWARE IS PROVIDED BY ARM LTD ``AS IS'' AND ANY EXPRESS OR IMPLIED
45 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
46 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
47 * IN NO EVENT SHALL ARM LTD BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
48 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
49 * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
50 * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
51 * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
52 * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
53 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
54 */
55
56#include <private/bionic_asm.h>
57
58    .syntax unified
59
60    .thumb
61    .thumb_func
62
63ENTRY(strlen)
64    pld     [r0, #0]
65    mov     r1, r0
66
67    ands    r3, r0, #7
68    bne     align_src
69
70    .p2align 2
71mainloop:
72    ldmia   r1!, {r2, r3}
73
74    pld     [r1, #64]
75
76    sub     ip, r2, #0x01010101
77    bic     ip, ip, r2
78    ands    ip, ip, #0x80808080
79    bne     zero_in_first_register
80
81    sub     ip, r3, #0x01010101
82    bic     ip, ip, r3
83    ands    ip, ip, #0x80808080
84    bne     zero_in_second_register
85    b       mainloop
86
87zero_in_first_register:
88    sub     r0, r1, r0
89    // Check for zero in byte 0.
90    lsls    r2, ip, #17
91    beq     check_byte1_reg1
92
93    sub     r0, r0, #8
94    bx      lr
95
96check_byte1_reg1:
97    bcc     check_byte2_reg1
98
99    sub     r0, r0, #7
100    bx      lr
101
102check_byte2_reg1:
103    // Check for zero in byte 2.
104    tst     ip, #0x800000
105    itt     ne
106    subne   r0, r0, #6
107    bxne    lr
108    sub     r0, r0, #5
109    bx      lr
110
111zero_in_second_register:
112    sub     r0, r1, r0
113    // Check for zero in byte 0.
114    lsls    r2, ip, #17
115    beq     check_byte1_reg2
116
117    sub     r0, r0, #4
118    bx      lr
119
120check_byte1_reg2:
121    bcc     check_byte2_reg2
122
123    sub     r0, r0, #3
124    bx      lr
125
126check_byte2_reg2:
127    // Check for zero in byte 2.
128    tst     ip, #0x800000
129    itt     ne
130    subne   r0, r0, #2
131    bxne    lr
132    sub     r0, r0, #1
133    bx      lr
134
135align_src:
136    // Align to a double word (64 bits).
137    rsb     r3, r3, #8
138    lsls    ip, r3, #31
139    beq     align_to_32
140
141    ldrb    r2, [r1], #1
142    cbz     r2, done
143
144align_to_32:
145    bcc     align_to_64
146
147    ldrb    r2, [r1], #1
148    cbz     r2, done
149    ldrb    r2, [r1], #1
150    cbz     r2, done
151
152align_to_64:
153    tst     r3, #4
154    beq     mainloop
155    ldr     r2, [r1], #4
156
157    sub     ip, r2, #0x01010101
158    bic     ip, ip, r2
159    ands    ip, ip, #0x80808080
160    bne     zero_in_second_register
161    b       mainloop
162
163done:
164    sub     r0, r1, r0
165    sub     r0, r0, #1
166    bx      lr
167END(strlen)
168