15821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)//===-- AMDGPUMCTargetDesc.cpp - AMDGPU Target Descriptions ---------------===// 25821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// 35821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// The LLVM Compiler Infrastructure 45821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// 55821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// This file is distributed under the University of Illinois Open Source 65821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// License. See LICENSE.TXT for details. 7868fa2fe829687343ffae624259930155e16dbd8Torne (Richard Coles)// 80529e5d033099cbfc42635f6f6183833b09dff6eBen Murdoch//===----------------------------------------------------------------------===// 95821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)// 106e8cce623b6e4fe0c9e4af605d675dd9d0338c38Torne (Richard Coles)// This file provides AMDGPU specific target descriptions. 11a1401311d1ab56c4ed0a474bd38c108f75cb0cd9Torne (Richard Coles)// 125821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)//===----------------------------------------------------------------------===// 135821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 145821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "AMDGPUMCTargetDesc.h" 155821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "AMDGPUMCAsmInfo.h" 165821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "InstPrinter/AMDGPUInstPrinter.h" 175821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/MC/MachineLocation.h" 185821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/MC/MCCodeGenInfo.h" 195821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/MC/MCInstrInfo.h" 205821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/MC/MCRegisterInfo.h" 215821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/MC/MCStreamer.h" 225821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/MC/MCSubtargetInfo.h" 235821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/Support/ErrorHandling.h" 245821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "llvm/Support/TargetRegistry.h" 255821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 265821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#define GET_INSTRINFO_MC_DESC 275821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "AMDGPUGenInstrInfo.inc" 285821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 295821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#define GET_SUBTARGETINFO_MC_DESC 305821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "AMDGPUGenSubtargetInfo.inc" 315821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 325821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#define GET_REGINFO_MC_DESC 335821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)#include "AMDGPUGenRegisterInfo.inc" 345821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 355821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)using namespace llvm; 365821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 375821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)static MCInstrInfo *createAMDGPUMCInstrInfo() { 385821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) MCInstrInfo *X = new MCInstrInfo(); 395821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) InitAMDGPUMCInstrInfo(X); 405821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) return X; 415821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 425821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 43a3f6a49ab37290eeeb8db0f41ec0f1cb74a68be7Torne (Richard Coles)static MCRegisterInfo *createAMDGPUMCRegisterInfo(StringRef TT) { 445821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) MCRegisterInfo *X = new MCRegisterInfo(); 455821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) InitAMDGPUMCRegisterInfo(X, 0); 465821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) return X; 475821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 48116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 49a3f6a49ab37290eeeb8db0f41ec0f1cb74a68be7Torne (Richard Coles)static MCSubtargetInfo *createAMDGPUMCSubtargetInfo(StringRef TT, StringRef CPU, 505821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) StringRef FS) { 515821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) MCSubtargetInfo * X = new MCSubtargetInfo(); 52a1401311d1ab56c4ed0a474bd38c108f75cb0cd9Torne (Richard Coles) InitAMDGPUMCSubtargetInfo(X, TT, CPU, FS); 53f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) return X; 545821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 555821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 565821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)static MCCodeGenInfo *createAMDGPUMCCodeGenInfo(StringRef TT, Reloc::Model RM, 575821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) CodeModel::Model CM, 585821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) CodeGenOpt::Level OL) { 595821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) MCCodeGenInfo *X = new MCCodeGenInfo(); 605821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) X->InitMCCodeGenInfo(RM, CM, OL); 615821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) return X; 625821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 635821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 645821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)static MCInstPrinter *createAMDGPUMCInstPrinter(const Target &T, 655821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) unsigned SyntaxVariant, 665821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) const MCAsmInfo &MAI, 675821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) const MCInstrInfo &MII, 685821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) const MCRegisterInfo &MRI, 695821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) const MCSubtargetInfo &STI) { 70a3f6a49ab37290eeeb8db0f41ec0f1cb74a68be7Torne (Richard Coles) return new AMDGPUInstPrinter(MAI, MII, MRI); 715821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 725821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 73c2e0dbddbe15c98d52c4786dac06cb8952a8ae6dTorne (Richard Coles)static MCCodeEmitter *createAMDGPUMCCodeEmitter(const MCInstrInfo &MCII, 745821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) const MCSubtargetInfo &STI, 755821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) MCContext &Ctx) { 765821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) if (STI.getFeatureBits() & AMDGPU::Feature64BitPtr) { 775821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) return createSIMCCodeEmitter(MCII, STI, Ctx); 785821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) } else { 795821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) return createR600MCCodeEmitter(MCII, STI, Ctx); 80a3f6a49ab37290eeeb8db0f41ec0f1cb74a68be7Torne (Richard Coles) } 815821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)} 825821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 835821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)static MCStreamer *createMCStreamer(const Target &T, StringRef TT, 845821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) MCContext &Ctx, MCAsmBackend &MAB, 85a1401311d1ab56c4ed0a474bd38c108f75cb0cd9Torne (Richard Coles) raw_ostream &_OS, 865821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) MCCodeEmitter *_Emitter, 87f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) bool RelaxAll, 88f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) bool NoExecStack) { 89f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) return createPureStreamer(Ctx, MAB, _OS, _Emitter); 90f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles)} 91f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) 92f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles)extern "C" void LLVMInitializeAMDGPUTargetMC() { 93f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) 94f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) RegisterMCAsmInfo<AMDGPUMCAsmInfo> Y(TheAMDGPUTarget); 95f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) 96f8ee788a64d60abd8f2d742a5fdedde054ecd910Torne (Richard Coles) TargetRegistry::RegisterMCCodeGenInfo(TheAMDGPUTarget, createAMDGPUMCCodeGenInfo); 975821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 985821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) TargetRegistry::RegisterMCInstrInfo(TheAMDGPUTarget, createAMDGPUMCInstrInfo); 995821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1005821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) TargetRegistry::RegisterMCRegInfo(TheAMDGPUTarget, createAMDGPUMCRegisterInfo); 101116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch 102116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch TargetRegistry::RegisterMCSubtargetInfo(TheAMDGPUTarget, createAMDGPUMCSubtargetInfo); 1035821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1045821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) TargetRegistry::RegisterMCInstPrinter(TheAMDGPUTarget, createAMDGPUMCInstPrinter); 1055821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles) 1065c02ac1a9c1b504631c0a3d2b6e737b5d738bae1Bo Liu TargetRegistry::RegisterMCCodeEmitter(TheAMDGPUTarget, createAMDGPUMCCodeEmitter); 1075c02ac1a9c1b504631c0a3d2b6e737b5d738bae1Bo Liu 1085c02ac1a9c1b504631c0a3d2b6e737b5d738bae1Bo Liu TargetRegistry::RegisterMCAsmBackend(TheAMDGPUTarget, createAMDGPUAsmBackend); 1095c02ac1a9c1b504631c0a3d2b6e737b5d738bae1Bo Liu 110116680a4aac90f2aa7413d9095a592090648e557Ben Murdoch TargetRegistry::RegisterMCObjectStreamer(TheAMDGPUTarget, createMCStreamer); 1115c02ac1a9c1b504631c0a3d2b6e737b5d738bae1Bo Liu} 1125821806d5e7f356e8fa4b058a389a808ea183019Torne (Richard Coles)