1f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* 2f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Copyright © 2011 Intel Corporation 3f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 4f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Permission is hereby granted, free of charge, to any person obtaining a 5f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * copy of this software and associated documentation files (the "Software"), 6f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * to deal in the Software without restriction, including without limitation 7f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * and/or sell copies of the Software, and to permit persons to whom the 9f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Software is furnished to do so, subject to the following conditions: 10f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 11f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * The above copyright notice and this permission notice (including the next 12f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * paragraph) shall be included in all copies or substantial portions of the 13f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Software. 14f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 15f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * IN THE SOFTWARE. 22f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 23f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/mtypes.h" 24f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/samplerobj.h" 25f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "program/prog_parameter.h" 26f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 27f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_mipmap_tree.h" 28f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_batchbuffer.h" 29f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_tex.h" 30f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_fbo.h" 31f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "intel_buffer_objects.h" 32f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 33f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "brw_context.h" 34f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "brw_state.h" 35f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "brw_defines.h" 36f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "brw_wm.h" 37f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 38f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/** 39f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Convert an swizzle enumeration (i.e. SWIZZLE_X) to one of the Gen7.5+ 40f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * "Shader Channel Select" enumerations (i.e. HSW_SCS_RED) 41f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 42f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic unsigned 43f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgswizzle_to_scs(GLenum swizzle) 44f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 45f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (swizzle) { 46f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case SWIZZLE_X: 47f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return HSW_SCS_RED; 48f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case SWIZZLE_Y: 49f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return HSW_SCS_GREEN; 50f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case SWIZZLE_Z: 51f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return HSW_SCS_BLUE; 52f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case SWIZZLE_W: 53f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return HSW_SCS_ALPHA; 54f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case SWIZZLE_ZERO: 55f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return HSW_SCS_ZERO; 56f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case SWIZZLE_ONE: 57f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return HSW_SCS_ONE; 58f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 59f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 60f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(!"Should not get here: invalid swizzle mode"); 61f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return HSW_SCS_ZERO; 62f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 63f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 64f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid 65f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_set_surface_tiling(struct gen7_surface_state *surf, uint32_t tiling) 66f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 67f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (tiling) { 68f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case I915_TILING_NONE: 69f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.tiled_surface = 0; 70f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.tile_walk = 0; 71f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 72f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case I915_TILING_X: 73f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.tiled_surface = 1; 74f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.tile_walk = BRW_TILEWALK_XMAJOR; 75f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 76f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case I915_TILING_Y: 77f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.tiled_surface = 1; 78f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.tile_walk = BRW_TILEWALK_YMAJOR; 79f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 80f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 81f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 82f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 83f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 84f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid 85f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_set_surface_msaa(struct gen7_surface_state *surf, unsigned num_samples, 86f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org enum intel_msaa_layout layout) 87f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 88f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (num_samples > 4) 89f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss4.num_multisamples = GEN7_SURFACE_MULTISAMPLECOUNT_8; 90f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else if (num_samples > 1) 91f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss4.num_multisamples = GEN7_SURFACE_MULTISAMPLECOUNT_4; 92f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 93f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss4.num_multisamples = GEN7_SURFACE_MULTISAMPLECOUNT_1; 94f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 95f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss4.multisampled_surface_storage_format = 96f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org layout == INTEL_MSAA_LAYOUT_IMS ? 97f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_MSFMT_DEPTH_STENCIL : 98f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_MSFMT_MSS; 99f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 100f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 101f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 102f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid 103f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_set_surface_mcs_info(struct brw_context *brw, 104f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gen7_surface_state *surf, 105f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t surf_offset, 106f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const struct intel_mipmap_tree *mcs_mt, 107f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org bool is_render_target) 108f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 109f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* From the Ivy Bridge PRM, Vol4 Part1 p76, "MCS Base Address": 110f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 111f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * "The MCS surface must be stored as Tile Y." 112f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 113f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(mcs_mt->region->tiling == I915_TILING_Y); 114f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 115f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Compute the pitch in units of tiles. To do this we need to divide the 116f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * pitch in bytes by 128, since a single Y-tile is 128 bytes wide. 117f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 118f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned pitch_bytes = mcs_mt->region->pitch * mcs_mt->cpp; 119f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned pitch_tiles = pitch_bytes / 128; 120f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 121f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* The upper 20 bits of surface state DWORD 6 are the upper 20 bits of the 122f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * GPU address of the MCS buffer; the lower 12 bits contain other control 123f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * information. Since buffer addresses are always on 4k boundaries (and 124f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * thus have their lower 12 bits zero), we can use an ordinary reloc to do 125f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * the necessary address translation. 126f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 127f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert ((mcs_mt->region->bo->offset & 0xfff) == 0); 128f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss6.mcs_enabled.mcs_enable = 1; 129f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss6.mcs_enabled.mcs_surface_pitch = pitch_tiles - 1; 130f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss6.mcs_enabled.mcs_base_address = mcs_mt->region->bo->offset >> 12; 131f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org drm_intel_bo_emit_reloc(brw->intel.batch.bo, 132f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf_offset + 133f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org offsetof(struct gen7_surface_state, ss6), 134f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org mcs_mt->region->bo, 135f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss6.raw_data & 0xfff, 136f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org is_render_target ? I915_GEM_DOMAIN_RENDER 137f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org : I915_GEM_DOMAIN_SAMPLER, 138f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org is_render_target ? I915_GEM_DOMAIN_RENDER : 0); 139f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 140f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 141f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 142f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid 143f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_check_surface_setup(struct gen7_surface_state *surf, 144f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org bool is_render_target) 145f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 146f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org bool is_multisampled = 147f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss4.num_multisamples != GEN7_SURFACE_MULTISAMPLECOUNT_1; 148f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* From the Graphics BSpec: vol5c Shared Functions [SNB+] > State > 149f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * SURFACE_STATE > SURFACE_STATE for most messages [DevIVB]: Surface Array 150f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Spacing: 151f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 152f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * If Multisampled Surface Storage Format is MSFMT_MSS and Number of 153f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Multisamples is not MULTISAMPLECOUNT_1, this field must be set to 154f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * ARYSPC_LOD0. 155f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 156f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (surf->ss4.multisampled_surface_storage_format == GEN7_SURFACE_MSFMT_MSS 157f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org && is_multisampled) 158f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(surf->ss0.surface_array_spacing == GEN7_SURFACE_ARYSPC_LOD0); 159f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 160f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* From the Graphics BSpec: vol5c Shared Functions [SNB+] > State > 161f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * SURFACE_STATE > SURFACE_STATE for most messages [DevIVB]: Multisampled 162f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Surface Storage Format: 163f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 164f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * All multisampled render target surfaces must have this field set to 165f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * MSFMT_MSS. 166f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 167f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * But also: 168f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 169f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1. 170f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 171f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (is_render_target && is_multisampled) { 172f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(surf->ss4.multisampled_surface_storage_format == 173f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_MSFMT_MSS); 174f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 175f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 176f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* From the Graphics BSpec: vol5c Shared Functions [SNB+] > State > 177f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * SURFACE_STATE > SURFACE_STATE for most messages [DevIVB]: Multisampled 178f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Surface Storage Format: 179f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 180f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8, Width 181f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * is >= 8192 (meaning the actual surface width is >= 8193 pixels), this 182f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * field must be set to MSFMT_MSS. 183f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 184f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (surf->ss4.num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 && 185f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.width >= 8192) { 186f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(surf->ss4.multisampled_surface_storage_format == 187f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_MSFMT_MSS); 188f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 189f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 190f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* From the Graphics BSpec: vol5c Shared Functions [SNB+] > State > 191f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * SURFACE_STATE > SURFACE_STATE for most messages [DevIVB]: Multisampled 192f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Surface Storage Format: 193f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 194f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * If the surface’s Number of Multisamples is MULTISAMPLECOUNT_8, 195f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * ((Depth+1) * (Height+1)) is > 4,194,304, OR if the surface’s Number of 196f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Multisamples is MULTISAMPLECOUNT_4, ((Depth+1) * (Height+1)) is > 197f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 8,388,608, this field must be set to MSFMT_DEPTH_STENCIL.This field 198f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * must be set to MSFMT_DEPTH_STENCIL if Surface Format is one of the 199f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * following: I24X8_UNORM, L24X8_UNORM, A24X8_UNORM, or 200f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * R24_UNORM_X8_TYPELESS. 201f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 202f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * But also: 203f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 204f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * This field is ignored if Number of Multisamples is MULTISAMPLECOUNT_1. 205f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 206f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t depth = surf->ss3.depth + 1; 207f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t height = surf->ss2.height + 1; 208f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (surf->ss4.num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_8 && 209f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org depth * height > 4194304) { 210f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(surf->ss4.multisampled_surface_storage_format == 211f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_MSFMT_DEPTH_STENCIL); 212f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 213f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (surf->ss4.num_multisamples == GEN7_SURFACE_MULTISAMPLECOUNT_4 && 214f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org depth * height > 8388608) { 215f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(surf->ss4.multisampled_surface_storage_format == 216f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_MSFMT_DEPTH_STENCIL); 217f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 218f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (is_multisampled) { 219f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (surf->ss0.surface_format) { 220f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case BRW_SURFACEFORMAT_I24X8_UNORM: 221f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case BRW_SURFACEFORMAT_L24X8_UNORM: 222f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case BRW_SURFACEFORMAT_A24X8_UNORM: 223f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case BRW_SURFACEFORMAT_R24_UNORM_X8_TYPELESS: 224f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(surf->ss4.multisampled_surface_storage_format == 225f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_MSFMT_DEPTH_STENCIL); 226f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 227f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 228f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 229f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 230f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 231f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void 232f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_update_buffer_texture_surface(struct gl_context *ctx, 233f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned unit, 234f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t *binding_table, 235f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned surf_index) 236f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 237f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct brw_context *brw = brw_context(ctx); 238f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; 239f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gen7_surface_state *surf; 240f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_buffer_object *intel_obj = 241f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel_buffer_object(tObj->BufferObject); 242f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org drm_intel_bo *bo = intel_obj ? intel_obj->buffer : NULL; 243f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gl_format format = tObj->_BufferObjectFormat; 244f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int texel_size = _mesa_get_format_bytes(format); 245f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 246f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 247f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sizeof(*surf), 32, &binding_table[surf_index]); 248f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memset(surf, 0, sizeof(*surf)); 249f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 250f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_type = BRW_SURFACE_BUFFER; 251f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_format = brw_format_for_mesa_format(format); 252f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 253f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.render_cache_read_write = 1; 254f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 255f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (surf->ss0.surface_format == 0 && format != MESA_FORMAT_RGBA_FLOAT32) { 256f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_problem(NULL, "bad format %s for texture buffer\n", 257f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_get_format_name(format)); 258f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 259f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 260f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (bo) { 261f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss1.base_addr = bo->offset; /* reloc */ 262f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 263f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Emit relocation to surface contents. Section 5.1.1 of the gen4 264f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * bspec ("Data Cache") says that the data cache does not exist as 265f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * a separate cache and is just the sampler cache. 266f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 267f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org drm_intel_bo_emit_reloc(brw->intel.batch.bo, 268f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (binding_table[surf_index] + 269f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org offsetof(struct gen7_surface_state, ss1)), 270f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org bo, 0, 271f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_SAMPLER, 0); 272f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 273f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int w = intel_obj->Base.Size / texel_size; 274f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.width = w & 0x7f; /* bits 6:0 of size or width */ 275f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.height = (w >> 7) & 0x1fff; /* bits 19:7 of size or width */ 276f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.depth = (w >> 20) & 0x7f; /* bits 26:20 of size or width */ 277f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.pitch = texel_size - 1; 278f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} else { 279f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss1.base_addr = 0; 280f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.width = 0; 281f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.height = 0; 282f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.depth = 0; 283f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.pitch = 0; 284f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 285f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 286f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_set_surface_tiling(surf, I915_TILING_NONE); 287f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 288f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_check_surface_setup(surf, false /* is_render_target */); 289f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 290f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 291f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void 292f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_update_texture_surface(struct gl_context *ctx, 293f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned unit, 294f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t *binding_table, 295f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned surf_index) 296f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 297f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct brw_context *brw = brw_context(ctx); 298f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_texture_object *tObj = ctx->Texture.Unit[unit]._Current; 299f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_texture_object *intelObj = intel_texture_object(tObj); 300f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_mipmap_tree *mt = intelObj->mt; 301f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_texture_image *firstImage = tObj->Image[0][tObj->BaseLevel]; 302f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_sampler_object *sampler = _mesa_get_samplerobj(ctx, unit); 303f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gen7_surface_state *surf; 304f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int width, height, depth; 305f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 306f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (tObj->Target == GL_TEXTURE_BUFFER) { 307f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_update_buffer_texture_surface(ctx, unit, binding_table, surf_index); 308f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 309f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 310f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 311f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* We don't support MSAA for textures. */ 312f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(!mt->array_spacing_lod0); 313f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(mt->num_samples <= 1); 314f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 315f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel_miptree_get_dimensions_for_image(firstImage, &width, &height, &depth); 316f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 317f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 318f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sizeof(*surf), 32, &binding_table[surf_index]); 319f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memset(surf, 0, sizeof(*surf)); 320f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 321f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mt->align_h == 4) 322f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.vertical_alignment = 1; 323f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mt->align_w == 8) 324f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.horizontal_alignment = 1; 325f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 326f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_type = translate_tex_target(tObj->Target); 327f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_format = translate_tex_format(mt->format, 328f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org firstImage->InternalFormat, 329f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tObj->DepthMode, 330f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sampler->sRGBDecode); 331f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (tObj->Target == GL_TEXTURE_CUBE_MAP) { 332f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.cube_pos_x = 1; 333f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.cube_pos_y = 1; 334f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.cube_pos_z = 1; 335f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.cube_neg_x = 1; 336f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.cube_neg_y = 1; 337f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.cube_neg_z = 1; 338f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 339f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 340f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.is_array = depth > 1 && tObj->Target != GL_TEXTURE_3D; 341f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 342f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_set_surface_tiling(surf, intelObj->mt->region->tiling); 343f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 344f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* ss0 remaining fields: 345f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - vert_line_stride (exists on gen6 but we ignore it) 346f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - vert_line_stride_ofs (exists on gen6 but we ignore it) 347f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - surface_array_spacing 348f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - render_cache_read_write (exists on gen6 but ignored here) 349f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 350f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 351f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss1.base_addr = 352f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intelObj->mt->region->bo->offset + intelObj->mt->offset; /* reloc */ 353f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 354f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.width = width - 1; 355f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.height = height - 1; 356f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 357f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.pitch = (intelObj->mt->region->pitch * intelObj->mt->cpp) - 1; 358f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.depth = depth - 1; 359f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 360f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* ss4: ignored? */ 361f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 362f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss5.mip_count = intelObj->_MaxLevel - tObj->BaseLevel; 363f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss5.min_lod = 0; 364f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 365f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* ss5 remaining fields: 366f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - x_offset (N/A for textures?) 367f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - y_offset (ditto) 368f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - cache_control 369f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 370f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 371f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (brw->intel.is_haswell) { 372f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Handling GL_ALPHA as a surface format override breaks 1.30+ style 373f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * texturing functions that return a float, as our code generation always 374f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * selects the .x channel (which would always be 0). 375f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 376f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const bool alpha_depth = tObj->DepthMode == GL_ALPHA && 377f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (firstImage->_BaseFormat == GL_DEPTH_COMPONENT || 378f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org firstImage->_BaseFormat == GL_DEPTH_STENCIL); 379f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 380f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const int swizzle = 381f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unlikely(alpha_depth) ? SWIZZLE_XYZW : brw_get_texture_swizzle(tObj); 382f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 383f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_r = swizzle_to_scs(GET_SWZ(swizzle, 0)); 384f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_g = swizzle_to_scs(GET_SWZ(swizzle, 1)); 385f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_b = swizzle_to_scs(GET_SWZ(swizzle, 2)); 386f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_a = swizzle_to_scs(GET_SWZ(swizzle, 3)); 387f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 388f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 389f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Emit relocation to surface contents */ 390f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org drm_intel_bo_emit_reloc(brw->intel.batch.bo, 391f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org binding_table[surf_index] + 392f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org offsetof(struct gen7_surface_state, ss1), 393f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intelObj->mt->region->bo, intelObj->mt->offset, 394f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_SAMPLER, 0); 395f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 396f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_check_surface_setup(surf, false /* is_render_target */); 397f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 398f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 399f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/** 400f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Create the constant buffer surface. Vertex/fragment shader constants will 401f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * be read from this buffer with Data Port Read instructions/messages. 402f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 403f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid 404f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_create_constant_surface(struct brw_context *brw, 405f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org drm_intel_bo *bo, 406f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t offset, 407f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int width, 408f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t *out_offset) 409f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 410f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const GLint w = width - 1; 411f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gen7_surface_state *surf; 412f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 413f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 414f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sizeof(*surf), 32, out_offset); 415f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memset(surf, 0, sizeof(*surf)); 416f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 417f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_type = BRW_SURFACE_BUFFER; 418f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_format = BRW_SURFACEFORMAT_R32G32B32A32_FLOAT; 419f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 420f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.render_cache_read_write = 1; 421f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 422f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(bo); 423f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss1.base_addr = bo->offset + offset; /* reloc */ 424f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 425f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.width = w & 0x7f; /* bits 6:0 of size or width */ 426f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.height = (w >> 7) & 0x1fff; /* bits 19:7 of size or width */ 427f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.depth = (w >> 20) & 0x7f; /* bits 26:20 of size or width */ 428f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.pitch = (16 - 1); /* stride between samples */ 429f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_set_surface_tiling(surf, I915_TILING_NONE); /* tiling now allowed */ 430f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 431f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (brw->intel.is_haswell) { 432f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_r = HSW_SCS_RED; 433f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_g = HSW_SCS_GREEN; 434f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_b = HSW_SCS_BLUE; 435f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_a = HSW_SCS_ALPHA; 436f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 437f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 438f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Emit relocation to surface contents. Section 5.1.1 of the gen4 439f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * bspec ("Data Cache") says that the data cache does not exist as 440f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * a separate cache and is just the sampler cache. 441f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 442f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org drm_intel_bo_emit_reloc(brw->intel.batch.bo, 443f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (*out_offset + 444f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org offsetof(struct gen7_surface_state, ss1)), 445f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org bo, offset, 446f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_SAMPLER, 0); 447f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 448f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_check_surface_setup(surf, false /* is_render_target */); 449f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 450f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 451f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void 452f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_update_null_renderbuffer_surface(struct brw_context *brw, unsigned unit) 453f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 454f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* From the Ivy bridge PRM, Vol4 Part1 p62 (Surface Type: Programming 455f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Notes): 456f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 457f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * A null surface is used in instances where an actual surface is not 458f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * bound. When a write message is generated to a null surface, no 459f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * actual surface is written to. When a read message (including any 460f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * sampling engine message) is generated to a null surface, the result 461f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * is all zeros. Note that a null surface type is allowed to be used 462f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * with all messages, even if it is not specificially indicated as 463f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * supported. All of the remaining fields in surface state are ignored 464f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * for null surfaces, with the following exceptions: Width, Height, 465f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Depth, LOD, and Render Target View Extent fields must match the 466f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * depth buffer’s corresponding state for all render target surfaces, 467f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * including null. 468f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 469f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_context *intel = &brw->intel; 470f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_context *ctx = &intel->ctx; 471f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gen7_surface_state *surf; 472f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 473f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* _NEW_BUFFERS */ 474f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const struct gl_framebuffer *fb = ctx->DrawBuffer; 475f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 476f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 477f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sizeof(*surf), 32, &brw->wm.surf_offset[unit]); 478f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memset(surf, 0, sizeof(*surf)); 479f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 480f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_type = BRW_SURFACE_NULL; 481f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; 482f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 483f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.width = fb->Width - 1; 484f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.height = fb->Height - 1; 485f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 486f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* From the Ivy bridge PRM, Vol4 Part1 p65 (Tiled Surface: Programming Notes): 487f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 488f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * If Surface Type is SURFTYPE_NULL, this field must be TRUE. 489f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 490f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_set_surface_tiling(surf, I915_TILING_Y); 491f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 492f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_check_surface_setup(surf, true /* is_render_target */); 493f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 494f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 495f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/** 496f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Sets up a surface state structure to point at the given region. 497f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * While it is only used for the front/back buffer currently, it should be 498f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * usable for further buffers when doing ARB_draw_buffer support. 499f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 500f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void 501f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_update_renderbuffer_surface(struct brw_context *brw, 502f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_renderbuffer *rb, 503f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org unsigned int unit) 504f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 505f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_context *intel = &brw->intel; 506f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_context *ctx = &intel->ctx; 507f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_renderbuffer *irb = intel_renderbuffer(rb); 508f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_region *region = irb->mt->region; 509f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gen7_surface_state *surf; 510f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t tile_x, tile_y; 511f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gl_format rb_format = intel_rb_format(irb); 512f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 513f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf = brw_state_batch(brw, AUB_TRACE_SURFACE_STATE, 514f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sizeof(*surf), 32, &brw->wm.surf_offset[unit]); 515f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memset(surf, 0, sizeof(*surf)); 516f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 517f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Render targets can't use IMS layout */ 518f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(irb->mt->msaa_layout != INTEL_MSAA_LAYOUT_IMS); 519f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 520f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (irb->mt->align_h == 4) 521f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.vertical_alignment = 1; 522f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (irb->mt->align_w == 8) 523f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.horizontal_alignment = 1; 524f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 525f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (rb_format) { 526f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case MESA_FORMAT_SARGB8: 527f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* _NEW_BUFFERS 528f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 529f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Without GL_EXT_framebuffer_sRGB we shouldn't bind sRGB surfaces to the 530f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * blend/update as sRGB. 531f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 532f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Color.sRGBEnabled) 533f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_format = brw_format_for_mesa_format(rb_format); 534f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 535f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_format = BRW_SURFACEFORMAT_B8G8R8A8_UNORM; 536f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 537f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 538f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(brw_render_target_supported(intel, rb)); 539f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_format = brw->render_target_format[rb_format]; 540f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (unlikely(!brw->format_supported_as_render_target[rb_format])) { 541f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_problem(ctx, "%s: renderbuffer format %s unsupported\n", 542f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org __FUNCTION__, _mesa_get_format_name(rb_format)); 543f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 544f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 545f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 546f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 547f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_type = BRW_SURFACE_2D; 548f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss0.surface_array_spacing = irb->mt->array_spacing_lod0 ? 549f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GEN7_SURFACE_ARYSPC_LOD0 : GEN7_SURFACE_ARYSPC_FULL; 550f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 551f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* reloc */ 552f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss1.base_addr = intel_renderbuffer_tile_offsets(irb, &tile_x, &tile_y); 553f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss1.base_addr += region->bo->offset; /* reloc */ 554f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 555f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(brw->has_surface_tile_offset); 556f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Note that the low bits of these fields are missing, so 557f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * there's the possibility of getting in trouble. 558f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 559f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(tile_x % 4 == 0); 560f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert(tile_y % 2 == 0); 561f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss5.x_offset = tile_x / 4; 562f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss5.y_offset = tile_y / 2; 563f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 564f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.width = rb->Width - 1; 565f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss2.height = rb->Height - 1; 566f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_set_surface_tiling(surf, region->tiling); 567f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss3.pitch = (region->pitch * region->cpp) - 1; 568f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 569f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_set_surface_msaa(surf, irb->mt->num_samples, irb->mt->msaa_layout); 570f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 571f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (irb->mt->msaa_layout == INTEL_MSAA_LAYOUT_CMS) { 572f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_set_surface_mcs_info(brw, surf, brw->wm.surf_offset[unit], 573f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org irb->mt->mcs_mt, true /* is_render_target */); 574f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 575f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 576f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (intel->is_haswell) { 577f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_r = HSW_SCS_RED; 578f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_g = HSW_SCS_GREEN; 579f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_b = HSW_SCS_BLUE; 580f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss7.shader_channel_select_a = HSW_SCS_ALPHA; 581f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 582f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 583f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org drm_intel_bo_emit_reloc(brw->intel.batch.bo, 584f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org brw->wm.surf_offset[unit] + 585f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org offsetof(struct gen7_surface_state, ss1), 586f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org region->bo, 587f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org surf->ss1.base_addr - region->bo->offset, 588f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_RENDER, 589f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org I915_GEM_DOMAIN_RENDER); 590f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 591f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_check_surface_setup(surf, true /* is_render_target */); 592f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 593f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 594f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid 595f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orggen7_init_vtable_surface_functions(struct brw_context *brw) 596f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 597f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct intel_context *intel = &brw->intel; 598f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 599f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel->vtbl.update_texture_surface = gen7_update_texture_surface; 600f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel->vtbl.update_renderbuffer_surface = gen7_update_renderbuffer_surface; 601f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel->vtbl.update_null_renderbuffer_surface = 602f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org gen7_update_null_renderbuffer_surface; 603f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org intel->vtbl.create_constant_surface = gen7_create_constant_surface; 604f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 605