1f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/************************************************************************** 2f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 3f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgCopyright 2000, 2001 VA Linux Systems Inc., Fremont, California. 4f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 5f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgAll Rights Reserved. 6f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 7f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgPermission is hereby granted, free of charge, to any person obtaining 8f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orga copy of this software and associated documentation files (the 9f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org"Software"), to deal in the Software without restriction, including 10f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgwithout limitation the rights to use, copy, modify, merge, publish, 11f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgdistribute, sublicense, and/or sell copies of the Software, and to 12f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgpermit persons to whom the Software is furnished to do so, subject to 13f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgthe following conditions: 14f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 15f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgThe above copyright notice and this permission notice (including the 16f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgnext paragraph) shall be included in all copies or substantial 17f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgportions of the Software. 18f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 19f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgTHE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 20f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgEXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 21f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgMERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 22f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgIN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 23f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgLIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 24f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgOF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 25f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgWITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 26f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 27f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org**************************************************************************/ 28f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 29f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* 30f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Authors: 31f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Gareth Hughes <gareth@valinux.com> 32f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Keith Whitwell <keith@tungstengraphics.com> 33f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 34f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 35f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/glheader.h" 36f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/imports.h" 37f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/api_arrayelt.h" 38f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/enums.h" 39f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/light.h" 40f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/context.h" 41f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/framebuffer.h" 42f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/fbobject.h" 43f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/simple_list.h" 44f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "main/state.h" 45f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 46f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "vbo/vbo.h" 47f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "tnl/tnl.h" 48f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "tnl/t_pipeline.h" 49f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "swrast_setup/swrast_setup.h" 50f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "drivers/common/meta.h" 51f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 52f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeon_context.h" 53f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeon_mipmap_tree.h" 54f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeon_ioctl.h" 55f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeon_state.h" 56f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeon_tcl.h" 57f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeon_tex.h" 58f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "radeon_swtcl.h" 59f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 60f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonUpdateSpecular( struct gl_context *ctx ); 61f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 62f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 63f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Alpha blending 64f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 65f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 66f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonAlphaFunc( struct gl_context *ctx, GLenum func, GLfloat ref ) 67f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 68f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 69f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int pp_misc = rmesa->hw.ctx.cmd[CTX_PP_MISC]; 70f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLubyte refByte; 71f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 72f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org CLAMPED_FLOAT_TO_UBYTE(refByte, ref); 73f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 74f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 75f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 76f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc &= ~(RADEON_ALPHA_TEST_OP_MASK | RADEON_REF_ALPHA_MASK); 77f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= (refByte & RADEON_REF_ALPHA_MASK); 78f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 79f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( func ) { 80f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_NEVER: 81f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_FAIL; 82f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 83f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LESS: 84f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_LESS; 85f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 86f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_EQUAL: 87f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_EQUAL; 88f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 89f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LEQUAL: 90f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_LEQUAL; 91f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 92f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_GREATER: 93f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_GREATER; 94f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 95f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_NOTEQUAL: 96f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_NEQUAL; 97f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 98f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_GEQUAL: 99f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_GEQUAL; 100f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 101f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ALWAYS: 102f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org pp_misc |= RADEON_ALPHA_TEST_PASS; 103f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 104f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 105f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 106f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_MISC] = pp_misc; 107f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 108f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 109f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonBlendEquationSeparate( struct gl_context *ctx, 110f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLenum modeRGB, GLenum modeA ) 111f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 112f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 113f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & ~RADEON_COMB_FCN_MASK; 114f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean fallback = GL_FALSE; 115f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 116f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert( modeRGB == modeA ); 117f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 118f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( modeRGB ) { 119f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FUNC_ADD: 120f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LOGIC_OP: 121f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_COMB_FCN_ADD_CLAMP; 122f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 123f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 124f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FUNC_SUBTRACT: 125f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_COMB_FCN_SUB_CLAMP; 126f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 127f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 128f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 129f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Color.BlendEnabled) 130f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fallback = GL_TRUE; 131f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 132f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_COMB_FCN_ADD_CLAMP; 133f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 134f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 135f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 136f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FALLBACK( rmesa, RADEON_FALLBACK_BLEND_EQ, fallback ); 137f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( !fallback ) { 138f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 139f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; 140f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( (ctx->Color.ColorLogicOpEnabled || (ctx->Color.BlendEnabled 141f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org && ctx->Color.Blend[0].EquationRGB == GL_LOGIC_OP)) ) { 142f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE; 143f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 144f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE; 145f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 146f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 147f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 148f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 149f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonBlendFuncSeparate( struct gl_context *ctx, 150f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLenum sfactorRGB, GLenum dfactorRGB, 151f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLenum sfactorA, GLenum dfactorA ) 152f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 153f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 154f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint b = rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] & 155f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ~(RADEON_SRC_BLEND_MASK | RADEON_DST_BLEND_MASK); 156f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean fallback = GL_FALSE; 157f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 158f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Color.Blend[0].SrcRGB ) { 159f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ZERO: 160f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_ZERO; 161f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 162f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE: 163f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_ONE; 164f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 165f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DST_COLOR: 166f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_DST_COLOR; 167f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 168f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_DST_COLOR: 169f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_ONE_MINUS_DST_COLOR; 170f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 171f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SRC_COLOR: 172f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_SRC_COLOR; 173f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 174f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_SRC_COLOR: 175f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_COLOR; 176f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 177f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SRC_ALPHA: 178f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_SRC_ALPHA; 179f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 180f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_SRC_ALPHA: 181f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_ONE_MINUS_SRC_ALPHA; 182f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 183f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DST_ALPHA: 184f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_DST_ALPHA; 185f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 186f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_DST_ALPHA: 187f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_ONE_MINUS_DST_ALPHA; 188f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 189f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SRC_ALPHA_SATURATE: 190f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_SRC_ALPHA_SATURATE; 191f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 192f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CONSTANT_COLOR: 193f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_CONSTANT_COLOR: 194f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CONSTANT_ALPHA: 195f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_CONSTANT_ALPHA: 196f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Color.BlendEnabled) 197f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fallback = GL_TRUE; 198f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 199f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_SRC_BLEND_GL_ONE; 200f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 201f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 202f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 203f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 204f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 205f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Color.Blend[0].DstRGB ) { 206f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ZERO: 207f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_ZERO; 208f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 209f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE: 210f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_ONE; 211f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 212f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SRC_COLOR: 213f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_SRC_COLOR; 214f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 215f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_SRC_COLOR: 216f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_ONE_MINUS_SRC_COLOR; 217f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 218f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SRC_ALPHA: 219f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_SRC_ALPHA; 220f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 221f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_SRC_ALPHA: 222f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_ONE_MINUS_SRC_ALPHA; 223f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 224f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DST_COLOR: 225f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_DST_COLOR; 226f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 227f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_DST_COLOR: 228f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_ONE_MINUS_DST_COLOR; 229f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 230f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DST_ALPHA: 231f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_DST_ALPHA; 232f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 233f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_DST_ALPHA: 234f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_ONE_MINUS_DST_ALPHA; 235f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 236f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CONSTANT_COLOR: 237f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_CONSTANT_COLOR: 238f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CONSTANT_ALPHA: 239f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ONE_MINUS_CONSTANT_ALPHA: 240f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Color.BlendEnabled) 241f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fallback = GL_TRUE; 242f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 243f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org b |= RADEON_DST_BLEND_GL_ZERO; 244f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 245f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 246f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 247f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 248f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 249f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FALLBACK( rmesa, RADEON_FALLBACK_BLEND_FUNC, fallback ); 250f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( !fallback ) { 251f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 252f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_BLENDCNTL] = b; 253f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 254f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 255f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 256f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 257f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 258f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Depth testing 259f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 260f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 261f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonDepthFunc( struct gl_context *ctx, GLenum func ) 262f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 263f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 264f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 265f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 266f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_Z_TEST_MASK; 267f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 268f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Depth.Func ) { 269f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_NEVER: 270f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_NEVER; 271f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 272f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LESS: 273f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_LESS; 274f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 275f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_EQUAL: 276f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_EQUAL; 277f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 278f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LEQUAL: 279f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_LEQUAL; 280f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 281f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_GREATER: 282f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_GREATER; 283f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 284f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_NOTEQUAL: 285f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_NEQUAL; 286f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 287f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_GEQUAL: 288f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_GEQUAL; 289f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 290f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ALWAYS: 291f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_TEST_ALWAYS; 292f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 293f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 294f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 295f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 296f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 297f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonDepthMask( struct gl_context *ctx, GLboolean flag ) 298f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 299f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 300f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 301f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 302f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( ctx->Depth.Mask ) { 303f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_Z_WRITE_ENABLE; 304f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 305f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_Z_WRITE_ENABLE; 306f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 307f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 308f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 309f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 310f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 311f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Fog 312f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 313f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 314f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 315f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonFogfv( struct gl_context *ctx, GLenum pname, const GLfloat *param ) 316f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 317f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 318f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org union { int i; float f; } c, d; 319f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLubyte col[4]; 320f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 321f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (pname) { 322f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FOG_MODE: 323f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!ctx->Fog.Enabled) 324f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 325f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl); 326f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_TCL_FOG_MASK; 327f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (ctx->Fog.Mode) { 328f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LINEAR: 329f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_LINEAR; 330f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 331f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_EXP: 332f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_EXP; 333f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 334f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_EXP2: 335f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_TCL_FOG_EXP2; 336f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 337f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 338f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 339f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 340f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* fallthrough */ 341f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FOG_DENSITY: 342f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FOG_START: 343f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FOG_END: 344f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!ctx->Fog.Enabled) 345f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 346f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org c.i = rmesa->hw.fog.cmd[FOG_C]; 347f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org d.i = rmesa->hw.fog.cmd[FOG_D]; 348f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (ctx->Fog.Mode) { 349f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_EXP: 350f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org c.f = 0.0; 351f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* While this is the opposite sign from the DDK, it makes the fog test 352f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * pass, and matches r200. 353f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 354f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org d.f = -ctx->Fog.Density; 355f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 356f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_EXP2: 357f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org c.f = 0.0; 358f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org d.f = -(ctx->Fog.Density * ctx->Fog.Density); 359f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 360f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LINEAR: 361f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Fog.Start == ctx->Fog.End) { 362f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org c.f = 1.0F; 363f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org d.f = 1.0F; 364f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 365f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org c.f = ctx->Fog.End/(ctx->Fog.End-ctx->Fog.Start); 366f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* While this is the opposite sign from the DDK, it makes the fog 367f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * test pass, and matches r200. 368f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 369f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org d.f = -1.0/(ctx->Fog.End-ctx->Fog.Start); 370f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 371f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 372f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 373f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 374f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 375f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (c.i != rmesa->hw.fog.cmd[FOG_C] || d.i != rmesa->hw.fog.cmd[FOG_D]) { 376f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, fog ); 377f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.fog.cmd[FOG_C] = c.i; 378f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.fog.cmd[FOG_D] = d.i; 379f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 380f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 381f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FOG_COLOR: 382f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 383f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_unclamped_float_rgba_to_ubyte(col, ctx->Fog.Color ); 384f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] &= ~RADEON_FOG_COLOR_MASK; 385f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_FOG_COLOR] |= 386f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonPackColor( 4, col[0], col[1], col[2], 0 ); 387f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 388f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FOG_COORD_SRC: 389f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateSpecular( ctx ); 390f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 391f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 392f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 393f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 394f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 395f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 396f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 397f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Culling 398f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 399f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 400f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonCullFace( struct gl_context *ctx, GLenum unused ) 401f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 402f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 403f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 404f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint t = rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL]; 405f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 406f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org s |= RADEON_FFACE_SOLID | RADEON_BFACE_SOLID; 407f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org t &= ~(RADEON_CULL_FRONT | RADEON_CULL_BACK); 408f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 409f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( ctx->Polygon.CullFlag ) { 410f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Polygon.CullFaceMode ) { 411f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FRONT: 412f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org s &= ~RADEON_FFACE_SOLID; 413f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org t |= RADEON_CULL_FRONT; 414f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 415f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_BACK: 416f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org s &= ~RADEON_BFACE_SOLID; 417f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org t |= RADEON_CULL_BACK; 418f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 419f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FRONT_AND_BACK: 420f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org s &= ~(RADEON_FFACE_SOLID | RADEON_BFACE_SOLID); 421f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org t |= (RADEON_CULL_FRONT | RADEON_CULL_BACK); 422f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 423f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 424f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 425f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 426f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 427f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, set ); 428f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] = s; 429f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 430f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 431f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] != t ) { 432f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl ); 433f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] = t; 434f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 435f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 436f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 437f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonFrontFace( struct gl_context *ctx, GLenum mode ) 438f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 439f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 440f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int cull_face = (mode == GL_CW) ? RADEON_FFACE_CULL_CW : RADEON_FFACE_CULL_CCW; 441f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 442f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, set ); 443f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_FFACE_CULL_DIR_MASK; 444f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 445f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 446f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_CULL_FRONT_IS_CCW; 447f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 448f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Winding is inverted when rendering to FBO */ 449f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->DrawBuffer && _mesa_is_user_fbo(ctx->DrawBuffer)) 450f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org cull_face = (mode == GL_CCW) ? RADEON_FFACE_CULL_CW : RADEON_FFACE_CULL_CCW; 451f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] |= cull_face; 452f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 453f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( mode == GL_CCW ) 454f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_CULL_FRONT_IS_CCW; 455f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 456f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 457f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 458f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 459f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Line state 460f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 461f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonLineWidth( struct gl_context *ctx, GLfloat widthf ) 462f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 463f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 464f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 465f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, lin ); 466f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, set ); 467f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 468f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Line width is stored in U6.4 format. 469f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 470f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.lin.cmd[LIN_SE_LINE_WIDTH] = (GLuint)(widthf * 16.0); 471f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( widthf > 1.0 ) { 472f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_WIDELINE_ENABLE; 473f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 474f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_WIDELINE_ENABLE; 475f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 476f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 477f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 478f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonLineStipple( struct gl_context *ctx, GLint factor, GLushort pattern ) 479f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 480f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 481f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 482f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, lin ); 483f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.lin.cmd[LIN_RE_LINE_PATTERN] = 484f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((((GLuint)factor & 0xff) << 16) | ((GLuint)pattern)); 485f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 486f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 487f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 488f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 489f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Masks 490f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 491f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonColorMask( struct gl_context *ctx, 492f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean r, GLboolean g, 493f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean b, GLboolean a ) 494f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 495f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 496f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct radeon_renderbuffer *rrb; 497f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint mask; 498f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 499f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rrb = radeon_get_colorbuffer(&rmesa->radeon); 500f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!rrb) 501f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 502f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 503f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org mask = radeonPackColor( rrb->cpp, 504f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.ColorMask[0][RCOMP], 505f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.ColorMask[0][GCOMP], 506f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.ColorMask[0][BCOMP], 507f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.ColorMask[0][ACOMP] ); 508f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 509f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK] != mask ) { 510f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, msk ); 511f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.msk.cmd[MSK_RB3D_PLANEMASK] = mask; 512f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 513f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 514f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 515f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 516f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 517f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Polygon state 518f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 519f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 520f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonPolygonOffset( struct gl_context *ctx, 521f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat factor, GLfloat units ) 522f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 523f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 524f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF; 525f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type constant = { units * depthScale }; 526f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type factoru = { factor }; 527f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 528f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, zbs ); 529f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_FACTOR] = factoru.ui32; 530f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.zbs.cmd[ZBS_SE_ZBIAS_CONSTANT] = constant.ui32; 531f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 532f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 533f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonPolygonMode( struct gl_context *ctx, GLenum face, GLenum mode ) 534f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 535f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 536f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean flag = (ctx->_TriangleCaps & DD_TRI_UNFILLED) != 0; 537f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 538f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Can't generally do unfilled via tcl, but some good special 539f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * cases work. 540f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 541f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_UNFILLED, flag); 542f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rmesa->radeon.TclFallback) { 543f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonChooseRenderState( ctx ); 544f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonChooseVertexState( ctx ); 545f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 546f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 547f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 548f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 549f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 550f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Rendering attributes 551f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 552f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * We really don't want to recalculate all this every time we bind a 553f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * texture. These things shouldn't change all that often, so it makes 554f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * sense to break them out of the core texture state update routines. 555f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 556f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 557f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* Examine lighting and texture state to determine if separate specular 558f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * should be enabled. 559f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 560f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonUpdateSpecular( struct gl_context *ctx ) 561f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 562f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 563f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org uint32_t p = rmesa->hw.ctx.cmd[CTX_PP_CNTL]; 564f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint flag = 0; 565f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 566f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 567f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 568f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_SPECULAR; 569f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] &= ~RADEON_TCL_COMPUTE_DIFFUSE; 570f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_SPEC; 571f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] &= ~RADEON_TCL_VTX_PK_DIFFUSE; 572f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_LIGHTING_ENABLE; 573f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 574f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org p &= ~RADEON_SPECULAR_ENABLE; 575f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 576f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_DIFFUSE_SPECULAR_COMBINE; 577f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 578f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 579f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.Enabled && 580f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Light.Model.ColorControl == GL_SEPARATE_SPECULAR_COLOR) { 581f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_SPECULAR; 582f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_DIFFUSE; 583f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC; 584f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; 585f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE; 586f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org p |= RADEON_SPECULAR_ENABLE; 587f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= 588f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ~RADEON_DIFFUSE_SPECULAR_COMBINE; 589f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 590f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else if (ctx->Light.Enabled) { 591f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_DIFFUSE; 592f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; 593f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE; 594f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else if (ctx->Fog.ColorSumEnabled ) { 595f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC; 596f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; 597f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org p |= RADEON_SPECULAR_ENABLE; 598f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 599f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_DIFFUSE; 600f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 601f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 602f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Fog.Enabled) { 603f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] |= RADEON_TCL_VTX_PK_SPEC; 604f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Fog.FogCoordinateSource == GL_FRAGMENT_DEPTH) { 605f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] |= RADEON_TCL_COMPUTE_SPECULAR; 606f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Bizzare: have to leave lighting enabled to get fog. */ 607f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LIGHTING_ENABLE; 608f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 609f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 610f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* cannot do tcl fog factor calculation with fog coord source 611f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * (send precomputed factors). Cannot use precomputed fog 612f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * factors together with tcl spec light (need tcl fallback) */ 613f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org flag = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] & 614f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_TCL_COMPUTE_SPECULAR) != 0; 615f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 616f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 617f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 618f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_FOGCOORDSPEC, flag); 619f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 620f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (_mesa_need_secondary_color(ctx)) { 621f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert( (p & RADEON_SPECULAR_ENABLE) != 0 ); 622f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 623f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org assert( (p & RADEON_SPECULAR_ENABLE) == 0 ); 624f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 625f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 626f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( rmesa->hw.ctx.cmd[CTX_PP_CNTL] != p ) { 627f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 628f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] = p; 629f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 630f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 631f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Update vertex/render formats 632f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 633f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rmesa->radeon.TclFallback) { 634f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonChooseRenderState( ctx ); 635f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonChooseVertexState( ctx ); 636f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 637f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 638f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 639f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 640f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 641f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Materials 642f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 643f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 644f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 645f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* Update on colormaterial, material emmissive/ambient, 646f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * lightmodel.globalambient 647f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 648f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void update_global_ambient( struct gl_context *ctx ) 649f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 650f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 651f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float *fcmd = (float *)RADEON_DB_STATE( glt ); 652f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 653f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Need to do more if both emmissive & ambient are PREMULT: 654f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Hope this is not needed for MULT 655f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 656f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ((rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] & 657f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((3 << RADEON_EMISSIVE_SOURCE_SHIFT) | 658f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (3 << RADEON_AMBIENT_SOURCE_SHIFT))) == 0) 659f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 660f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_3V( &fcmd[GLT_RED], 661f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_EMISSION]); 662f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ACC_SCALE_3V( &fcmd[GLT_RED], 663f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Light.Model.Ambient, 664f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Light.Material.Attrib[MAT_ATTRIB_FRONT_AMBIENT]); 665f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 666f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 667f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 668f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_3V( &fcmd[GLT_RED], ctx->Light.Model.Ambient ); 669f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 670f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 671f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE(rmesa, &rmesa->hw.glt); 672f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 673f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 674f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* Update on change to 675f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - light[p].colors 676f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * - light[p].enabled 677f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 678f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void update_light_colors( struct gl_context *ctx, GLuint p ) 679f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 680f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_light *l = &ctx->Light.Light[p]; 681f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 682f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* fprintf(stderr, "%s\n", __FUNCTION__); */ 683f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 684f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (l->Enabled) { 685f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 686f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float *fcmd = (float *)RADEON_DB_STATE( lit[p] ); 687f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 688f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_4V( &fcmd[LIT_AMBIENT_RED], l->Ambient ); 689f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_4V( &fcmd[LIT_DIFFUSE_RED], l->Diffuse ); 690f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_4V( &fcmd[LIT_SPECULAR_RED], l->Specular ); 691f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 692f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] ); 693f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 694f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 695f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 696f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* Also fallback for asym colormaterial mode in twoside lighting... 697f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 698f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void check_twoside_fallback( struct gl_context *ctx ) 699f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 700f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean fallback = GL_FALSE; 701f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint i; 702f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 703f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.Enabled && ctx->Light.Model.TwoSide) { 704f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.ColorMaterialEnabled && 705f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (ctx->Light._ColorMaterialBitmask & BACK_MATERIAL_BITS) != 706f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((ctx->Light._ColorMaterialBitmask & FRONT_MATERIAL_BITS)<<1)) 707f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fallback = GL_TRUE; 708f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 709f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (i = MAT_ATTRIB_FRONT_AMBIENT; i < MAT_ATTRIB_FRONT_INDEXES; i+=2) 710f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (memcmp( ctx->Light.Material.Attrib[i], 711f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Light.Material.Attrib[i+1], 712f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sizeof(GLfloat)*4) != 0) { 713f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fallback = GL_TRUE; 714f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 715f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 716f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 717f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 718f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 719f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_LIGHT_TWOSIDE, fallback ); 720f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 721f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 722f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 723f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonColorMaterial( struct gl_context *ctx, GLenum face, GLenum mode ) 724f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 725f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 726f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint light_model_ctl1 = rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]; 727f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 728f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 &= ~((3 << RADEON_EMISSIVE_SOURCE_SHIFT) | 729f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (3 << RADEON_AMBIENT_SOURCE_SHIFT) | 730f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (3 << RADEON_DIFFUSE_SOURCE_SHIFT) | 731f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (3 << RADEON_SPECULAR_SOURCE_SHIFT)); 732f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 733f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.ColorMaterialEnabled) { 734f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint mask = ctx->Light._ColorMaterialBitmask; 735f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 736f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_EMISSION) { 737f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE << 738f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_EMISSIVE_SOURCE_SHIFT); 739f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 740f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 741f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT << 742f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_EMISSIVE_SOURCE_SHIFT); 743f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 744f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 745f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_AMBIENT) { 746f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE << 747f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_AMBIENT_SOURCE_SHIFT); 748f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 749f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 750f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT << 751f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_AMBIENT_SOURCE_SHIFT); 752f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 753f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 754f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_DIFFUSE) { 755f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE << 756f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DIFFUSE_SOURCE_SHIFT); 757f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 758f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 759f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT << 760f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DIFFUSE_SOURCE_SHIFT); 761f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 762f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 763f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_SPECULAR) { 764f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_VERTEX_DIFFUSE << 765f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_SPECULAR_SOURCE_SHIFT); 766f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 767f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 768f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT << 769f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_SPECULAR_SOURCE_SHIFT); 770f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 771f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 772f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 773f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Default to MULT: 774f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 775f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org light_model_ctl1 |= (RADEON_LM_SOURCE_STATE_MULT << RADEON_EMISSIVE_SOURCE_SHIFT) | 776f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_LM_SOURCE_STATE_MULT << RADEON_AMBIENT_SOURCE_SHIFT) | 777f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_LM_SOURCE_STATE_MULT << RADEON_DIFFUSE_SOURCE_SHIFT) | 778f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_LM_SOURCE_STATE_MULT << RADEON_SPECULAR_SOURCE_SHIFT); 779f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 780f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 781f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (light_model_ctl1 != rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]) { 782f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 783f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] = light_model_ctl1; 784f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 785f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 786f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 787f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid radeonUpdateMaterial( struct gl_context *ctx ) 788f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 789f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 790f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat (*mat)[4] = ctx->Light.Material.Attrib; 791f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( mtl ); 792f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint mask = ~0; 793f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 794f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.ColorMaterialEnabled) 795f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org mask &= ~ctx->Light._ColorMaterialBitmask; 796f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 797f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (RADEON_DEBUG & RADEON_STATE) 798f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fprintf(stderr, "%s\n", __FUNCTION__); 799f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 800f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 801f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_EMISSION) { 802f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_EMMISSIVE_RED] = mat[MAT_ATTRIB_FRONT_EMISSION][0]; 803f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_EMMISSIVE_GREEN] = mat[MAT_ATTRIB_FRONT_EMISSION][1]; 804f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_EMMISSIVE_BLUE] = mat[MAT_ATTRIB_FRONT_EMISSION][2]; 805f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_EMMISSIVE_ALPHA] = mat[MAT_ATTRIB_FRONT_EMISSION][3]; 806f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 807f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_AMBIENT) { 808f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_AMBIENT_RED] = mat[MAT_ATTRIB_FRONT_AMBIENT][0]; 809f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_AMBIENT_GREEN] = mat[MAT_ATTRIB_FRONT_AMBIENT][1]; 810f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_AMBIENT_BLUE] = mat[MAT_ATTRIB_FRONT_AMBIENT][2]; 811f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_AMBIENT_ALPHA] = mat[MAT_ATTRIB_FRONT_AMBIENT][3]; 812f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 813f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_DIFFUSE) { 814f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_DIFFUSE_RED] = mat[MAT_ATTRIB_FRONT_DIFFUSE][0]; 815f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_DIFFUSE_GREEN] = mat[MAT_ATTRIB_FRONT_DIFFUSE][1]; 816f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_DIFFUSE_BLUE] = mat[MAT_ATTRIB_FRONT_DIFFUSE][2]; 817f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_DIFFUSE_ALPHA] = mat[MAT_ATTRIB_FRONT_DIFFUSE][3]; 818f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 819f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_SPECULAR) { 820f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_SPECULAR_RED] = mat[MAT_ATTRIB_FRONT_SPECULAR][0]; 821f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_SPECULAR_GREEN] = mat[MAT_ATTRIB_FRONT_SPECULAR][1]; 822f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_SPECULAR_BLUE] = mat[MAT_ATTRIB_FRONT_SPECULAR][2]; 823f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_SPECULAR_ALPHA] = mat[MAT_ATTRIB_FRONT_SPECULAR][3]; 824f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 825f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (mask & MAT_BIT_FRONT_SHININESS) { 826f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[MTL_SHININESS] = mat[MAT_ATTRIB_FRONT_SHININESS][0]; 827f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 828f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 829f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.mtl ); 830f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 831f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org check_twoside_fallback( ctx ); 832f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* update_global_ambient( ctx );*/ 833f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 834f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 835f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* _NEW_LIGHT 836f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _NEW_MODELVIEW 837f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _MESA_NEW_NEED_EYE_COORDS 838f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 839f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Uses derived state from mesa: 840f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _VP_inf_norm 841f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _h_inf_norm 842f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _Position 843f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _NormSpotDirection 844f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _ModelViewInvScale 845f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _NeedEyeCoords 846f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * _EyeZDir 847f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * 848f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * which are calculated in light.c and are correct for the current 849f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * lighting space (model or eye), hence dependencies on _NEW_MODELVIEW 850f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * and _MESA_NEW_NEED_EYE_COORDS. 851f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 852f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void update_light( struct gl_context *ctx ) 853f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 854f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 855f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 856f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Have to check these, or have an automatic shortcircuit mechanism 857f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * to remove noop statechanges. (Or just do a better job on the 858f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * front end). 859f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 860f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 861f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tmp = rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]; 862f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 863f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->_NeedEyeCoords) 864f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tmp &= ~RADEON_LIGHT_IN_MODELSPACE; 865f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 866f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tmp |= RADEON_LIGHT_IN_MODELSPACE; 867f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 868f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 869f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Leave this test disabled: (unexplained q3 lockup) (even with 870f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org new packets) 871f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 872f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (tmp != rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]) 873f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 874f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 875f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] = tmp; 876f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 877f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 878f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 879f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 880f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( eye ); 881f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[EYE_X] = ctx->_EyeZDir[0]; 882f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[EYE_Y] = ctx->_EyeZDir[1]; 883f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[EYE_Z] = - ctx->_EyeZDir[2]; 884f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[EYE_RESCALE_FACTOR] = ctx->_ModelViewInvScale; 885f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.eye ); 886f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 887f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 888f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 889f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 890f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.Enabled) { 891f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint p; 892f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (p = 0 ; p < MAX_LIGHTS; p++) { 893f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.Light[p].Enabled) { 894f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_light *l = &ctx->Light.Light[p]; 895f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat *fcmd = (GLfloat *)RADEON_DB_STATE( lit[p] ); 896f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 897f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (l->EyePosition[3] == 0.0) { 898f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_3FV( &fcmd[LIT_POSITION_X], l->_VP_inf_norm ); 899f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_3FV( &fcmd[LIT_DIRECTION_X], l->_h_inf_norm ); 900f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_POSITION_W] = 0; 901f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_DIRECTION_W] = 0; 902f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 903f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org COPY_4V( &fcmd[LIT_POSITION_X], l->_Position ); 904f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_DIRECTION_X] = -l->_NormSpotDirection[0]; 905f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_DIRECTION_Y] = -l->_NormSpotDirection[1]; 906f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_DIRECTION_Z] = -l->_NormSpotDirection[2]; 907f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_DIRECTION_W] = 0; 908f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 909f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 910f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.lit[p] ); 911f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 912f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 913f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 914f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 915f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 916f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonLightfv( struct gl_context *ctx, GLenum light, 917f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLenum pname, const GLfloat *params ) 918f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 919f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 920f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint p = light - GL_LIGHT0; 921f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_light *l = &ctx->Light.Light[p]; 922f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat *fcmd = (GLfloat *)rmesa->hw.lit[p].cmd; 923f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 924f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 925f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (pname) { 926f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_AMBIENT: 927f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DIFFUSE: 928f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SPECULAR: 929f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org update_light_colors( ctx, p ); 930f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 931f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 932f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SPOT_DIRECTION: 933f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* picked up in update_light */ 934f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 935f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 936f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_POSITION: { 937f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* positions picked up in update_light, but can do flag here */ 938f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint flag; 939f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint idx = TCL_PER_LIGHT_CTL_0 + p/2; 940f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 941f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* FIXME: Set RANGE_ATTEN only when needed */ 942f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (p&1) 943f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org flag = RADEON_LIGHT_1_IS_LOCAL; 944f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 945f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org flag = RADEON_LIGHT_0_IS_LOCAL; 946f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 947f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl); 948f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (l->EyePosition[3] != 0.0F) 949f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[idx] |= flag; 950f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 951f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[idx] &= ~flag; 952f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 953f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 954f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 955f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SPOT_EXPONENT: 956f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, lit[p]); 957f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_SPOT_EXPONENT] = params[0]; 958f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 959f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 960f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SPOT_CUTOFF: { 961f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint flag = (p&1) ? RADEON_LIGHT_1_IS_SPOT : RADEON_LIGHT_0_IS_SPOT; 962f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint idx = TCL_PER_LIGHT_CTL_0 + p/2; 963f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 964f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, lit[p]); 965f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_SPOT_CUTOFF] = l->_CosCutoff; 966f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 967f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl); 968f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (l->SpotCutoff != 180.0F) 969f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[idx] |= flag; 970f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 971f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[idx] &= ~flag; 972f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 973f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 974f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 975f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 976f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CONSTANT_ATTENUATION: 977f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, lit[p]); 978f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_ATTEN_CONST] = params[0]; 979f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( params[0] == 0.0 ) 980f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_ATTEN_CONST_INV] = FLT_MAX; 981f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 982f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_ATTEN_CONST_INV] = 1.0 / params[0]; 983f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 984f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LINEAR_ATTENUATION: 985f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, lit[p]); 986f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_ATTEN_LINEAR] = params[0]; 987f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 988f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_QUADRATIC_ATTENUATION: 989f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, lit[p]); 990f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_ATTEN_QUADRATIC] = params[0]; 991f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 992f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 993f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 994f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 995f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 996f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Set RANGE_ATTEN only when needed */ 997f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (pname) { 998f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_POSITION: 999f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CONSTANT_ATTENUATION: 1000f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LINEAR_ATTENUATION: 1001f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_QUADRATIC_ATTENUATION: 1002f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 1003f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint *icmd = (GLuint *)RADEON_DB_STATE( tcl ); 1004f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint idx = TCL_PER_LIGHT_CTL_0 + p/2; 1005f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint atten_flag = ( p&1 ) ? RADEON_LIGHT_1_ENABLE_RANGE_ATTEN 1006f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org : RADEON_LIGHT_0_ENABLE_RANGE_ATTEN; 1007f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint atten_const_flag = ( p&1 ) ? RADEON_LIGHT_1_CONSTANT_RANGE_ATTEN 1008f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org : RADEON_LIGHT_0_CONSTANT_RANGE_ATTEN; 1009f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1010f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( l->EyePosition[3] == 0.0F || 1011f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ( ( fcmd[LIT_ATTEN_CONST] == 0.0 || fcmd[LIT_ATTEN_CONST] == 1.0 ) && 1012f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fcmd[LIT_ATTEN_QUADRATIC] == 0.0 && fcmd[LIT_ATTEN_LINEAR] == 0.0 ) ) { 1013f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Disable attenuation */ 1014f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org icmd[idx] &= ~atten_flag; 1015f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1016f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( fcmd[LIT_ATTEN_QUADRATIC] == 0.0 && fcmd[LIT_ATTEN_LINEAR] == 0.0 ) { 1017f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Enable only constant portion of attenuation calculation */ 1018f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org icmd[idx] |= ( atten_flag | atten_const_flag ); 1019f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1020f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Enable full attenuation calculation */ 1021f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org icmd[idx] &= ~atten_const_flag; 1022f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org icmd[idx] |= atten_flag; 1023f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1024f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1025f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1026f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.tcl ); 1027f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1028f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1029f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 1030f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1031f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1032f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1033f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1034f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1035f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1036f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1037f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonLightModelfv( struct gl_context *ctx, GLenum pname, 1038f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const GLfloat *param ) 1039f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1040f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1041f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1042f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (pname) { 1043f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT_MODEL_AMBIENT: 1044f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org update_global_ambient( ctx ); 1045f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1046f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1047f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT_MODEL_LOCAL_VIEWER: 1048f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 1049f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.Model.LocalViewer) 1050f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_LOCAL_VIEWER; 1051f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 1052f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_LOCAL_VIEWER; 1053f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1054f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1055f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT_MODEL_TWO_SIDE: 1056f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 1057f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Light.Model.TwoSide) 1058f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= RADEON_LIGHT_TWOSIDE; 1059f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 1060f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_LIGHT_TWOSIDE; 1061f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1062f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org check_twoside_fallback( ctx ); 1063f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1064f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rmesa->radeon.TclFallback) { 1065f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonChooseRenderState( ctx ); 1066f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonChooseVertexState( ctx ); 1067f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1068f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1069f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1070f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT_MODEL_COLOR_CONTROL: 1071f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateSpecular(ctx); 1072f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1073f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1074f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 1075f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1076f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1077f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1078f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1079f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonShadeModel( struct gl_context *ctx, GLenum mode ) 1080f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1081f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1082f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint s = rmesa->hw.set.cmd[SET_SE_CNTL]; 1083f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1084f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org s &= ~(RADEON_DIFFUSE_SHADE_MASK | 1085f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ALPHA_SHADE_MASK | 1086f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_SPECULAR_SHADE_MASK | 1087f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_FOG_SHADE_MASK); 1088f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1089f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( mode ) { 1090f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FLAT: 1091f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org s |= (RADEON_DIFFUSE_SHADE_FLAT | 1092f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ALPHA_SHADE_FLAT | 1093f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_SPECULAR_SHADE_FLAT | 1094f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_FOG_SHADE_FLAT); 1095f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1096f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SMOOTH: 1097f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org s |= (RADEON_DIFFUSE_SHADE_GOURAUD | 1098f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ALPHA_SHADE_GOURAUD | 1099f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_SPECULAR_SHADE_GOURAUD | 1100f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_FOG_SHADE_GOURAUD); 1101f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1102f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 1103f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 1104f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1105f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1106f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( rmesa->hw.set.cmd[SET_SE_CNTL] != s ) { 1107f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, set ); 1108f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] = s; 1109f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1110f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1111f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1112f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1113f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 1114f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * User clip planes 1115f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1116f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1117f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonClipPlane( struct gl_context *ctx, GLenum plane, const GLfloat *eq ) 1118f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1119f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint p = (GLint) plane - (GLint) GL_CLIP_PLANE0; 1120f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1121f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; 1122f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1123f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ucp[p] ); 1124f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; 1125f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; 1126f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; 1127f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; 1128f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1129f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1130f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonUpdateClipPlanes( struct gl_context *ctx ) 1131f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1132f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1133f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint p; 1134f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1135f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (p = 0; p < ctx->Const.MaxClipPlanes; p++) { 1136f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Transform.ClipPlanesEnabled & (1 << p)) { 1137f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint *ip = (GLint *)ctx->Transform._ClipUserPlane[p]; 1138f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1139f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ucp[p] ); 1140f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_X] = ip[0]; 1141f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_Y] = ip[1]; 1142f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_Z] = ip[2]; 1143f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ucp[p].cmd[UCP_W] = ip[3]; 1144f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1145f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1146f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1147f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1148f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1149f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 1150f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Stencil 1151f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1152f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1153f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void 1154f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgradeonStencilFuncSeparate( struct gl_context *ctx, GLenum face, GLenum func, 1155f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint ref, GLuint mask ) 1156f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1157f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1158f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint refmask = (((ctx->Stencil.Ref[0] & 0xff) << RADEON_STENCIL_REF_SHIFT) | 1159f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((ctx->Stencil.ValueMask[0] & 0xff) << RADEON_STENCIL_MASK_SHIFT)); 1160f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1161f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1162f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, msk ); 1163f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1164f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~RADEON_STENCIL_TEST_MASK; 1165f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] &= ~(RADEON_STENCIL_REF_MASK| 1166f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STENCIL_VALUE_MASK); 1167f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1168f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Stencil.Function[0] ) { 1169f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_NEVER: 1170f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_NEVER; 1171f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1172f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LESS: 1173f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_LESS; 1174f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1175f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_EQUAL: 1176f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_EQUAL; 1177f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1178f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LEQUAL: 1179f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_LEQUAL; 1180f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1181f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_GREATER: 1182f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_GREATER; 1183f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1184f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_NOTEQUAL: 1185f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_NEQUAL; 1186f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1187f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_GEQUAL: 1188f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_GEQUAL; 1189f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1190f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ALWAYS: 1191f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_TEST_ALWAYS; 1192f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1193f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1194f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1195f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] |= refmask; 1196f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1197f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1198f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void 1199f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgradeonStencilMaskSeparate( struct gl_context *ctx, GLenum face, GLuint mask ) 1200f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1201f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1202f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1203f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, msk ); 1204f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] &= ~RADEON_STENCIL_WRITE_MASK; 1205f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.msk.cmd[MSK_RB3D_STENCILREFMASK] |= 1206f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((ctx->Stencil.WriteMask[0] & 0xff) << RADEON_STENCIL_WRITEMASK_SHIFT); 1207f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1208f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1209f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonStencilOpSeparate( struct gl_context *ctx, GLenum face, GLenum fail, 1210f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLenum zfail, GLenum zpass ) 1211f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1212f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1213f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1214f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* radeon 7200 have stencil bug, DEC and INC_WRAP will actually both do DEC_WRAP, 1215f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org and DEC_WRAP (and INVERT) will do INVERT. No way to get correct INC_WRAP and DEC, 1216f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org but DEC_WRAP can be fixed by using DEC and INC_WRAP at least use INC. */ 1217f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1218f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tempRADEON_STENCIL_FAIL_DEC_WRAP; 1219f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tempRADEON_STENCIL_FAIL_INC_WRAP; 1220f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tempRADEON_STENCIL_ZFAIL_DEC_WRAP; 1221f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tempRADEON_STENCIL_ZFAIL_INC_WRAP; 1222f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tempRADEON_STENCIL_ZPASS_DEC_WRAP; 1223f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tempRADEON_STENCIL_ZPASS_INC_WRAP; 1224f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1225f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rmesa->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_BROKEN_STENCIL) { 1226f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_FAIL_DEC_WRAP = RADEON_STENCIL_FAIL_DEC; 1227f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_FAIL_INC_WRAP = RADEON_STENCIL_FAIL_INC; 1228f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZFAIL_DEC_WRAP = RADEON_STENCIL_ZFAIL_DEC; 1229f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZFAIL_INC_WRAP = RADEON_STENCIL_ZFAIL_INC; 1230f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZPASS_DEC_WRAP = RADEON_STENCIL_ZPASS_DEC; 1231f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZPASS_INC_WRAP = RADEON_STENCIL_ZPASS_INC; 1232f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1233f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 1234f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_FAIL_DEC_WRAP = RADEON_STENCIL_FAIL_DEC_WRAP; 1235f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_FAIL_INC_WRAP = RADEON_STENCIL_FAIL_INC_WRAP; 1236f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZFAIL_DEC_WRAP = RADEON_STENCIL_ZFAIL_DEC_WRAP; 1237f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZFAIL_INC_WRAP = RADEON_STENCIL_ZFAIL_INC_WRAP; 1238f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZPASS_DEC_WRAP = RADEON_STENCIL_ZPASS_DEC_WRAP; 1239f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tempRADEON_STENCIL_ZPASS_INC_WRAP = RADEON_STENCIL_ZPASS_INC_WRAP; 1240f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1241f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1242f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1243f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] &= ~(RADEON_STENCIL_FAIL_MASK | 1244f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STENCIL_ZFAIL_MASK | 1245f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STENCIL_ZPASS_MASK); 1246f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1247f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Stencil.FailFunc[0] ) { 1248f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_KEEP: 1249f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_KEEP; 1250f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1251f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ZERO: 1252f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_ZERO; 1253f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1254f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_REPLACE: 1255f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_REPLACE; 1256f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1257f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INCR: 1258f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_INC; 1259f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1260f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DECR: 1261f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_DEC; 1262f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1263f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INCR_WRAP: 1264f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_FAIL_INC_WRAP; 1265f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1266f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DECR_WRAP: 1267f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_FAIL_DEC_WRAP; 1268f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1269f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INVERT: 1270f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_FAIL_INVERT; 1271f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1272f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1273f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1274f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Stencil.ZFailFunc[0] ) { 1275f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_KEEP: 1276f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_KEEP; 1277f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1278f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ZERO: 1279f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_ZERO; 1280f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1281f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_REPLACE: 1282f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_REPLACE; 1283f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1284f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INCR: 1285f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_INC; 1286f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1287f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DECR: 1288f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_DEC; 1289f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1290f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INCR_WRAP: 1291f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZFAIL_INC_WRAP; 1292f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1293f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DECR_WRAP: 1294f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZFAIL_DEC_WRAP; 1295f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1296f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INVERT: 1297f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZFAIL_INVERT; 1298f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1299f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1300f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1301f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( ctx->Stencil.ZPassFunc[0] ) { 1302f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_KEEP: 1303f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_KEEP; 1304f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1305f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ZERO: 1306f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_ZERO; 1307f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1308f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_REPLACE: 1309f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_REPLACE; 1310f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1311f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INCR: 1312f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_INC; 1313f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1314f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DECR: 1315f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_DEC; 1316f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1317f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INCR_WRAP: 1318f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZPASS_INC_WRAP; 1319f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1320f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DECR_WRAP: 1321f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= tempRADEON_STENCIL_ZPASS_DEC_WRAP; 1322f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1323f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_INVERT: 1324f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_ZSTENCILCNTL] |= RADEON_STENCIL_ZPASS_INVERT; 1325f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1326f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1327f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1328f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1329f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1330f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1331f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 1332f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Window position and viewport transformation 1333f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1334f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1335f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* 1336f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * To correctly position primitives: 1337f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1338f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#define SUBPIXEL_X 0.125 1339f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#define SUBPIXEL_Y 0.125 1340f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1341f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1342f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/** 1343f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Called when window size or position changes or viewport or depth range 1344f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * state is changed. We update the hardware viewport state here. 1345f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1346f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid radeonUpdateWindow( struct gl_context *ctx ) 1347f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1348f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1349f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org __DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon); 1350f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat xoffset = 0.0; 1351f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat yoffset = dPriv ? (GLfloat) dPriv->h : 0; 1352f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const GLfloat *v = ctx->Viewport._WindowMap.m; 1353f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const GLboolean render_to_fbo = (ctx->DrawBuffer ? _mesa_is_user_fbo(ctx->DrawBuffer) : 0); 1354f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const GLfloat depthScale = 1.0F / ctx->DrawBuffer->_DepthMaxF; 1355f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat y_scale, y_bias; 1356f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1357f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (render_to_fbo) { 1358f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org y_scale = 1.0; 1359f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org y_bias = 0; 1360f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1361f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org y_scale = -1.0; 1362f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org y_bias = yoffset; 1363f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1364f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1365f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type sx = { v[MAT_SX] }; 1366f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type tx = { v[MAT_TX] + xoffset + SUBPIXEL_X }; 1367f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type sy = { v[MAT_SY] * y_scale }; 1368f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type ty = { (v[MAT_TY] * y_scale) + y_bias + SUBPIXEL_Y }; 1369f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type sz = { v[MAT_SZ] * depthScale }; 1370f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type tz = { v[MAT_TZ] * depthScale }; 1371f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1372f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, vpt ); 1373f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1374f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_XSCALE] = sx.ui32; 1375f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; 1376f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_YSCALE] = sy.ui32; 1377f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; 1378f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZSCALE] = sz.ui32; 1379f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_ZOFFSET] = tz.ui32; 1380f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1381f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1382f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1383f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonViewport( struct gl_context *ctx, GLint x, GLint y, 1384f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLsizei width, GLsizei height ) 1385f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1386f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Don't pipeline viewport changes, conflict with window offset 1387f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * setting below. Could apply deltas to rescue pipelined viewport 1388f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * values, or keep the originals hanging around. 1389f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1390f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateWindow( ctx ); 1391f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1392f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_viewport(ctx, x, y, width, height); 1393f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1394f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1395f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonDepthRange( struct gl_context *ctx, GLclampd nearval, 1396f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLclampd farval ) 1397f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1398f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateWindow( ctx ); 1399f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1400f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1401f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid radeonUpdateViewportOffset( struct gl_context *ctx ) 1402f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1403f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1404f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org __DRIdrawable *dPriv = radeon_get_drawable(&rmesa->radeon); 1405f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat xoffset = 0.0; 1406f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat yoffset = (GLfloat)dPriv->h; 1407f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const GLfloat *v = ctx->Viewport._WindowMap.m; 1408f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1409f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type tx; 1410f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float_ui32_type ty; 1411f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1412f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tx.f = v[MAT_TX] + xoffset + SUBPIXEL_X; 1413f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ty.f = (- v[MAT_TY]) + yoffset + SUBPIXEL_Y; 1414f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1415f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] != tx.ui32 || 1416f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] != ty.ui32 ) 1417f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 1418f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Note: this should also modify whatever data the context reset 1419f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * code uses... 1420f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1421f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, vpt ); 1422f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_XOFFSET] = tx.ui32; 1423f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.vpt.cmd[VPT_SE_VPORT_YOFFSET] = ty.ui32; 1424f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1425f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* update polygon stipple x/y screen offset */ 1426f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 1427f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint stx, sty; 1428f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint m = rmesa->hw.msc.cmd[MSC_RE_MISC]; 1429f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1430f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org m &= ~(RADEON_STIPPLE_X_OFFSET_MASK | 1431f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STIPPLE_Y_OFFSET_MASK); 1432f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1433f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* add magic offsets, then invert */ 1434f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org stx = 31 - ((-1) & RADEON_STIPPLE_COORD_MASK); 1435f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org sty = 31 - ((dPriv->h - 1) 1436f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org & RADEON_STIPPLE_COORD_MASK); 1437f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1438f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org m |= ((stx << RADEON_STIPPLE_X_OFFSET_SHIFT) | 1439f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (sty << RADEON_STIPPLE_Y_OFFSET_SHIFT)); 1440f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1441f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( rmesa->hw.msc.cmd[MSC_RE_MISC] != m ) { 1442f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, msc ); 1443f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.msc.cmd[MSC_RE_MISC] = m; 1444f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1445f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1446f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1447f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1448f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateScissor( ctx ); 1449f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1450f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1451f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1452f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1453f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 1454f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Miscellaneous 1455f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1456f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1457f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonRenderMode( struct gl_context *ctx, GLenum mode ) 1458f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1459f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1460f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FALLBACK( rmesa, RADEON_FALLBACK_RENDER_MODE, (mode != GL_RENDER) ); 1461f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1462f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1463f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1464f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic GLuint radeon_rop_tab[] = { 1465f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_CLEAR, 1466f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_AND, 1467f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_AND_REVERSE, 1468f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_COPY, 1469f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_AND_INVERTED, 1470f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_NOOP, 1471f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_XOR, 1472f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_OR, 1473f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_NOR, 1474f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_EQUIV, 1475f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_INVERT, 1476f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_OR_REVERSE, 1477f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_COPY_INVERTED, 1478f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_OR_INVERTED, 1479f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_NAND, 1480f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_ROP_SET, 1481f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org}; 1482f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1483f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonLogicOpCode( struct gl_context *ctx, GLenum opcode ) 1484f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1485f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1486f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint rop = (GLuint)opcode - GL_CLEAR; 1487f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1488f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ASSERT( rop < 16 ); 1489f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1490f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, msk ); 1491f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.msk.cmd[MSK_RB3D_ROPCNTL] = radeon_rop_tab[rop]; 1492f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1493f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1494f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 1495f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * State enable/disable 1496f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1497f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1498f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonEnable( struct gl_context *ctx, GLenum cap, GLboolean state ) 1499f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1500f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1501f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint p, flag; 1502f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1503f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( RADEON_DEBUG & RADEON_STATE ) 1504f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fprintf( stderr, "%s( %s = %s )\n", __FUNCTION__, 1505f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_lookup_enum_by_nr( cap ), 1506f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org state ? "GL_TRUE" : "GL_FALSE" ); 1507f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1508f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch ( cap ) { 1509f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Fast track this one... 1510f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1511f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_TEXTURE_1D: 1512f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_TEXTURE_2D: 1513f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_TEXTURE_3D: 1514f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1515f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1516f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_ALPHA_TEST: 1517f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1518f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (state) { 1519f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_ALPHA_TEST_ENABLE; 1520f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1521f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_ALPHA_TEST_ENABLE; 1522f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1523f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1524f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1525f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_BLEND: 1526f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1527f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (state) { 1528f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ALPHA_BLEND_ENABLE; 1529f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1530f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ALPHA_BLEND_ENABLE; 1531f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1532f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( (ctx->Color.ColorLogicOpEnabled || (ctx->Color.BlendEnabled 1533f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org && ctx->Color.Blend[0].EquationRGB == GL_LOGIC_OP)) ) { 1534f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE; 1535f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1536f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE; 1537f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1538f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1539f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Catch a possible fallback: 1540f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1541f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (state) { 1542f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.BlendEquationSeparate( ctx, 1543f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.Blend[0].EquationRGB, 1544f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.Blend[0].EquationA ); 1545f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.BlendFuncSeparate( ctx, ctx->Color.Blend[0].SrcRGB, 1546f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.Blend[0].DstRGB, 1547f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.Blend[0].SrcA, 1548f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Color.Blend[0].DstA ); 1549f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1550f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 1551f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FALLBACK( rmesa, RADEON_FALLBACK_BLEND_FUNC, GL_FALSE ); 1552f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FALLBACK( rmesa, RADEON_FALLBACK_BLEND_EQ, GL_FALSE ); 1553f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1554f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1555f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1556f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CLIP_PLANE0: 1557f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CLIP_PLANE1: 1558f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CLIP_PLANE2: 1559f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CLIP_PLANE3: 1560f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CLIP_PLANE4: 1561f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CLIP_PLANE5: 1562f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org p = cap-GL_CLIP_PLANE0; 1563f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 1564f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (state) { 1565f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] |= (RADEON_UCP_ENABLE_0<<p); 1566f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonClipPlane( ctx, cap, NULL ); 1567f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1568f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 1569f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~(RADEON_UCP_ENABLE_0<<p); 1570f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1571f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1572f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1573f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_COLOR_MATERIAL: 1574f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonColorMaterial( ctx, 0, 0 ); 1575f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateMaterial( ctx ); 1576f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1577f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1578f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_CULL_FACE: 1579f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonCullFace( ctx, 0 ); 1580f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1581f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1582f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DEPTH_TEST: 1583f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, ctx ); 1584f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1585f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_Z_ENABLE; 1586f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1587f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_Z_ENABLE; 1588f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1589f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1590f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1591f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_DITHER: 1592f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, ctx ); 1593f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1594f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_DITHER_ENABLE; 1595f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~rmesa->radeon.state.color.roundEnable; 1596f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1597f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_DITHER_ENABLE; 1598f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= rmesa->radeon.state.color.roundEnable; 1599f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1600f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1601f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1602f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_FOG: 1603f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, ctx ); 1604f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1605f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_FOG_ENABLE; 1606f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonFogfv( ctx, GL_FOG_MODE, NULL ); 1607f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1608f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_FOG_ENABLE; 1609f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl); 1610f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_UCP_VERT_BLEND_CTL] &= ~RADEON_TCL_FOG_MASK; 1611f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1612f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateSpecular( ctx ); /* for PK_SPEC */ 1613f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_allow_light_in_model( ctx, !state ); 1614f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1615f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1616f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT0: 1617f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT1: 1618f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT2: 1619f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT3: 1620f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT4: 1621f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT5: 1622f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT6: 1623f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHT7: 1624f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl); 1625f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org p = cap - GL_LIGHT0; 1626f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (p&1) 1627f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org flag = (RADEON_LIGHT_1_ENABLE | 1628f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_LIGHT_1_ENABLE_AMBIENT | 1629f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_LIGHT_1_ENABLE_SPECULAR); 1630f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 1631f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org flag = (RADEON_LIGHT_0_ENABLE | 1632f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_LIGHT_0_ENABLE_AMBIENT | 1633f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_LIGHT_0_ENABLE_SPECULAR); 1634f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1635f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (state) 1636f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[p/2 + TCL_PER_LIGHT_CTL_0] |= flag; 1637f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 1638f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[p/2 + TCL_PER_LIGHT_CTL_0] &= ~flag; 1639f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1640f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* 1641f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1642f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org update_light_colors( ctx, p ); 1643f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1644f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1645f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LIGHTING: 1646f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl); 1647f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateSpecular(ctx); 1648f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org check_twoside_fallback( ctx ); 1649f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1650f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1651f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LINE_SMOOTH: 1652f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1653f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1654f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_ANTI_ALIAS_LINE; 1655f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1656f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_ANTI_ALIAS_LINE; 1657f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1658f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1659f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1660f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_LINE_STIPPLE: 1661f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1662f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1663f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_PATTERN_ENABLE; 1664f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1665f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_PATTERN_ENABLE; 1666f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1667f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1668f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1669f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_COLOR_LOGIC_OP: 1670f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1671f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( (ctx->Color.ColorLogicOpEnabled || (ctx->Color.BlendEnabled 1672f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org && ctx->Color.Blend[0].EquationRGB == GL_LOGIC_OP)) ) { 1673f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_ROP_ENABLE; 1674f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1675f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_ROP_ENABLE; 1676f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1677f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1678f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1679f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_NORMALIZE: 1680f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 1681f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1682f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_NORMALIZE_NORMALS; 1683f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1684f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_NORMALIZE_NORMALS; 1685f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1686f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1687f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1688f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_POLYGON_OFFSET_POINT: 1689f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, set ); 1690f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1691f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_ZBIAS_ENABLE_POINT; 1692f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1693f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_ZBIAS_ENABLE_POINT; 1694f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1695f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1696f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1697f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_POLYGON_OFFSET_LINE: 1698f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, set ); 1699f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1700f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_ZBIAS_ENABLE_LINE; 1701f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1702f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_ZBIAS_ENABLE_LINE; 1703f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1704f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1705f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1706f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_POLYGON_OFFSET_FILL: 1707f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, set ); 1708f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1709f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] |= RADEON_ZBIAS_ENABLE_TRI; 1710f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1711f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.set.cmd[SET_SE_CNTL] &= ~RADEON_ZBIAS_ENABLE_TRI; 1712f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1713f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1714f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1715f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_POLYGON_SMOOTH: 1716f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1717f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1718f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_ANTI_ALIAS_POLY; 1719f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1720f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_ANTI_ALIAS_POLY; 1721f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1722f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1723f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1724f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_POLYGON_STIPPLE: 1725f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, ctx ); 1726f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1727f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] |= RADEON_STIPPLE_ENABLE; 1728f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1729f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_PP_CNTL] &= ~RADEON_STIPPLE_ENABLE; 1730f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1731f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1732f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1733f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_RESCALE_NORMAL_EXT: { 1734f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean tmp = ctx->_NeedEyeCoords ? state : !state; 1735f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 1736f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( tmp ) { 1737f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_RESCALE_NORMALS; 1738f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1739f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_RESCALE_NORMALS; 1740f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1741f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1742f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1743f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1744f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_SCISSOR_TEST: 1745f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_firevertices(&rmesa->radeon); 1746f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->radeon.state.scissor.enabled = state; 1747f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateScissor( ctx ); 1748f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1749f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1750f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_STENCIL_TEST: 1751f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { 1752f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean hw_stencil = GL_FALSE; 1753f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->DrawBuffer) { 1754f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct radeon_renderbuffer *rrbStencil 1755f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org = radeon_get_renderbuffer(ctx->DrawBuffer, BUFFER_STENCIL); 1756f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org hw_stencil = (rrbStencil && rrbStencil->bo); 1757f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1758f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1759f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (hw_stencil) { 1760f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, ctx ); 1761f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( state ) { 1762f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] |= RADEON_STENCIL_ENABLE; 1763f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1764f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.ctx.cmd[CTX_RB3D_CNTL] &= ~RADEON_STENCIL_ENABLE; 1765f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1766f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1767f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FALLBACK( rmesa, RADEON_FALLBACK_STENCIL, state ); 1768f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1769f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1770f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1771f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1772f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_TEXTURE_GEN_Q: 1773f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_TEXTURE_GEN_R: 1774f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_TEXTURE_GEN_S: 1775f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_TEXTURE_GEN_T: 1776f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Picked up in radeonUpdateTextureState. 1777f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1778f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->recheck_texgen[ctx->Texture.CurrentUnit] = GL_TRUE; 1779f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1780f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1781f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case GL_COLOR_SUM_EXT: 1782f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateSpecular ( ctx ); 1783f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org break; 1784f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1785f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 1786f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return; 1787f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1788f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1789f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1790f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1791f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonLightingSpaceChange( struct gl_context *ctx ) 1792f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1793f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1794f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean tmp; 1795f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE( rmesa, tcl ); 1796f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1797f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (RADEON_DEBUG & RADEON_STATE) 1798f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fprintf(stderr, "%s %d BEFORE %x\n", __FUNCTION__, ctx->_NeedEyeCoords, 1799f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]); 1800f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1801f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->_NeedEyeCoords) 1802f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tmp = ctx->Transform.RescaleNormals; 1803f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else 1804f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tmp = !ctx->Transform.RescaleNormals; 1805f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1806f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ( tmp ) { 1807f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] |= RADEON_RESCALE_NORMALS; 1808f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } else { 1809f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL] &= ~RADEON_RESCALE_NORMALS; 1810f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1811f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1812f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (RADEON_DEBUG & RADEON_STATE) 1813f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fprintf(stderr, "%s %d AFTER %x\n", __FUNCTION__, ctx->_NeedEyeCoords, 1814f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_LIGHT_MODEL_CTL]); 1815f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1816f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1817f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* ============================================================= 1818f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Deferred state management - matrices, textures, other? 1819f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1820f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1821f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1822f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid radeonUploadTexMatrix( r100ContextPtr rmesa, 1823f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int unit, GLboolean swapcols ) 1824f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1825f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* Here's how this works: on r100, only 3 tex coords can be submitted, so the 1826f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org vector looks like this probably: (s t r|q 0) (not sure if the last coord 1827f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org is hardwired to 0, could be 1 too). Interestingly, it actually looks like 1828f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org texgen generates all 4 coords, at least tests with projtex indicated that. 1829f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org So: if we need the q coord in the end (solely determined by the texture 1830f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org target, i.e. 2d / 1d / texrect targets) we swap the third and 4th row. 1831f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Additionally, if we don't have texgen but 4 tex coords submitted, we swap 1832f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org column 3 and 4 (for the 2d / 1d / texrect targets) since the q coord 1833f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org will get submitted in the "wrong", i.e. 3rd, slot. 1834f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org If an app submits 3 coords for 2d targets, we assume it is saving on vertex 1835f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org size and using the texture matrix to swap the r and q coords around (ut2k3 1836f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org does exactly that), so we don't need the 3rd / 4th column swap - still need 1837f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org the 3rd / 4th row swap of course. This will potentially break for apps which 1838f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org use TexCoord3x just for fun. Additionally, it will never work if an app uses 1839f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org an "advanced" texture matrix and relies on all 4 texcoord inputs to generate 1840f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org the maximum needed 3. This seems impossible to do with hw tcl on r100, and 1841f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org incredibly hard to detect so we can't just fallback in such a case. Assume 1842f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org it never happens... - rs 1843f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org*/ 1844f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1845f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int idx = TEXMAT_0 + unit; 1846f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float *dest = ((float *)RADEON_DB_STATE( mat[idx] )) + MAT_ELT_0; 1847f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int i; 1848f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct gl_texture_unit tUnit = rmesa->radeon.glCtx->Texture.Unit[unit]; 1849f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLfloat *src = rmesa->tmpmat[unit].m; 1850f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1851f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->TexMatColSwap &= ~(1 << unit); 1852f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if ((tUnit._ReallyEnabled & (TEXTURE_3D_BIT | TEXTURE_CUBE_BIT)) == 0) { 1853f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (swapcols) { 1854f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->TexMatColSwap |= 1 << unit; 1855f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* attention some elems are swapped 2 times! */ 1856f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[0]; 1857f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[4]; 1858f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[12]; 1859f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[8]; 1860f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[1]; 1861f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[5]; 1862f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[13]; 1863f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[9]; 1864f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[2]; 1865f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[6]; 1866f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[15]; 1867f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[11]; 1868f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* those last 4 are probably never used */ 1869f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[3]; 1870f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[7]; 1871f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[14]; 1872f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[10]; 1873f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1874f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 1875f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (i = 0; i < 2; i++) { 1876f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i]; 1877f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+4]; 1878f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+8]; 1879f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+12]; 1880f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1881f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (i = 3; i >= 2; i--) { 1882f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i]; 1883f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+4]; 1884f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+8]; 1885f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+12]; 1886f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1887f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1888f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1889f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 1890f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (i = 0 ; i < 4 ; i++) { 1891f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i]; 1892f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+4]; 1893f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+8]; 1894f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+12]; 1895f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1896f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1897f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1898f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.mat[idx] ); 1899f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1900f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1901f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1902f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void upload_matrix( r100ContextPtr rmesa, GLfloat *src, int idx ) 1903f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1904f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float *dest = ((float *)RADEON_DB_STATE( mat[idx] ))+MAT_ELT_0; 1905f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int i; 1906f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1907f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1908f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (i = 0 ; i < 4 ; i++) { 1909f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i]; 1910f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+4]; 1911f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+8]; 1912f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org *dest++ = src[i+12]; 1913f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1914f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1915f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.mat[idx] ); 1916f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1917f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1918f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void upload_matrix_t( r100ContextPtr rmesa, GLfloat *src, int idx ) 1919f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1920f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org float *dest = ((float *)RADEON_DB_STATE( mat[idx] ))+MAT_ELT_0; 1921f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org memcpy(dest, src, 16*sizeof(float)); 1922f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_DB_STATECHANGE( rmesa, &rmesa->hw.mat[idx] ); 1923f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1924f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1925f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1926f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void update_texturematrix( struct gl_context *ctx ) 1927f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1928f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT( ctx ); 1929f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint tpc = rmesa->hw.tcl.cmd[TCL_TEXTURE_PROC_CTL]; 1930f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint vs = rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL]; 1931f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int unit; 1932f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint texMatEnabled = 0; 1933f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->NeedTexMatrix = 0; 1934f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->TexMatColSwap = 0; 1935f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1936f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (unit = 0 ; unit < ctx->Const.MaxTextureUnits; unit++) { 1937f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Texture.Unit[unit]._ReallyEnabled) { 1938f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean needMatrix = GL_FALSE; 1939f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->TextureMatrixStack[unit].Top->type != MATRIX_IDENTITY) { 1940f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org needMatrix = GL_TRUE; 1941f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org texMatEnabled |= (RADEON_TEXGEN_TEXMAT_0_ENABLE | 1942f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_TEXMAT_0_ENABLE) << unit; 1943f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1944f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rmesa->TexGenEnabled & (RADEON_TEXMAT_0_ENABLE << unit)) { 1945f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Need to preconcatenate any active texgen 1946f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * obj/eyeplane matrices: 1947f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 1948f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _math_matrix_mul_matrix( &rmesa->tmpmat[unit], 1949f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->TextureMatrixStack[unit].Top, 1950f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org &rmesa->TexGenMatrix[unit] ); 1951f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1952f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else { 1953f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _math_matrix_copy( &rmesa->tmpmat[unit], 1954f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->TextureMatrixStack[unit].Top ); 1955f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1956f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1957f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else if (rmesa->TexGenEnabled & (RADEON_TEXMAT_0_ENABLE << unit)) { 1958f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _math_matrix_copy( &rmesa->tmpmat[unit], &rmesa->TexGenMatrix[unit] ); 1959f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org needMatrix = GL_TRUE; 1960f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1961f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (needMatrix) { 1962f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->NeedTexMatrix |= 1 << unit; 1963f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUploadTexMatrix( rmesa, unit, 1964f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org !ctx->Texture.Unit[unit].TexGenEnabled ); 1965f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1966f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1967f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1968f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1969f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tpc = (texMatEnabled | rmesa->TexGenEnabled); 1970f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1971f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* TCL_TEX_COMPUTED_x is TCL_TEX_INPUT_x | 0x8 */ 1972f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org vs &= ~((RADEON_TCL_TEX_COMPUTED_TEX_0 << RADEON_TCL_TEX_0_OUTPUT_SHIFT) | 1973f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_TCL_TEX_COMPUTED_TEX_0 << RADEON_TCL_TEX_1_OUTPUT_SHIFT) | 1974f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_TCL_TEX_COMPUTED_TEX_0 << RADEON_TCL_TEX_2_OUTPUT_SHIFT)); 1975f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1976f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org vs |= (((tpc & RADEON_TEXGEN_TEXMAT_0_ENABLE) << 1977f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_TCL_TEX_0_OUTPUT_SHIFT + 3)) | 1978f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((tpc & RADEON_TEXGEN_TEXMAT_1_ENABLE) << 1979f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_TCL_TEX_1_OUTPUT_SHIFT + 2)) | 1980f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ((tpc & RADEON_TEXGEN_TEXMAT_2_ENABLE) << 1981f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org (RADEON_TCL_TEX_2_OUTPUT_SHIFT + 1))); 1982f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1983f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (tpc != rmesa->hw.tcl.cmd[TCL_TEXTURE_PROC_CTL] || 1984f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org vs != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL]) { 1985f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1986f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, tcl); 1987f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_TEXTURE_PROC_CTL] = tpc; 1988f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXSEL] = vs; 1989f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 1990f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 1991f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1992f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic GLboolean r100ValidateBuffers(struct gl_context *ctx) 1993f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 1994f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 1995f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org struct radeon_renderbuffer *rrb; 1996f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org int i, ret; 1997f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 1998f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_cs_space_reset_bos(rmesa->radeon.cmdbuf.cs); 1999f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2000f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rrb = radeon_get_colorbuffer(&rmesa->radeon); 2001f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* color buffer */ 2002f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rrb && rrb->bo) { 2003f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, rrb->bo, 2004f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 0, RADEON_GEM_DOMAIN_VRAM); 2005f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2006f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2007f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* depth buffer */ 2008f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rrb = radeon_get_depthbuffer(&rmesa->radeon); 2009f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* color buffer */ 2010f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rrb && rrb->bo) { 2011f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, rrb->bo, 2012f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 0, RADEON_GEM_DOMAIN_VRAM); 2013f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2014f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2015f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (i = 0; i < ctx->Const.MaxTextureImageUnits; ++i) { 2016f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonTexObj *t; 2017f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2018f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!ctx->Texture.Unit[i]._ReallyEnabled) 2019f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org continue; 2020f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2021f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org t = rmesa->state.texture.unit[i].texobj; 2022f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2023f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!t) 2024f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org continue; 2025f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (t->image_override && t->bo) 2026f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, t->bo, 2027f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); 2028f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org else if (t->mt->bo) 2029f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_cs_space_add_persistent_bo(rmesa->radeon.cmdbuf.cs, t->mt->bo, 2030f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_GEM_DOMAIN_GTT | RADEON_GEM_DOMAIN_VRAM, 0); 2031f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2032f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2033f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ret = radeon_cs_space_check_with_bo(rmesa->radeon.cmdbuf.cs, first_elem(&rmesa->radeon.dma.reserved)->bo, RADEON_GEM_DOMAIN_GTT, 0); 2034f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ret) 2035f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return GL_FALSE; 2036f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return GL_TRUE; 2037f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 2038f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2039f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgGLboolean radeonValidateState( struct gl_context *ctx ) 2040f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 2041f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 2042f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLuint new_state = rmesa->radeon.NewGLState; 2043f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2044f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (new_state & _NEW_BUFFERS) { 2045f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_update_framebuffer(ctx); 2046f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* this updates the DrawBuffer's Width/Height if it's a FBO */ 2047f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _mesa_update_draw_buffer_bounds(ctx); 2048f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(rmesa, ctx); 2049f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2050f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2051f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (new_state & _NEW_TEXTURE) { 2052f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateTextureState( ctx ); 2053f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org new_state |= rmesa->radeon.NewGLState; /* may add TEXTURE_MATRIX */ 2054f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2055f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2056f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* we need to do a space check here */ 2057f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!r100ValidateBuffers(ctx)) 2058f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return GL_FALSE; 2059f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2060f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Need an event driven matrix update? 2061f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2062f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (new_state & (_NEW_MODELVIEW|_NEW_PROJECTION)) 2063f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org upload_matrix( rmesa, ctx->_ModelProjectMatrix.m, MODEL_PROJ ); 2064f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2065f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Need these for lighting (shouldn't upload otherwise) 2066f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2067f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (new_state & (_NEW_MODELVIEW)) { 2068f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org upload_matrix( rmesa, ctx->ModelviewMatrixStack.Top->m, MODEL ); 2069f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org upload_matrix_t( rmesa, ctx->ModelviewMatrixStack.Top->inv, MODEL_IT ); 2070f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2071f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2072f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Does this need to be triggered on eg. modelview for 2073f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * texgen-derived objplane/eyeplane matrices? 2074f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2075f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (new_state & _NEW_TEXTURE_MATRIX) { 2076f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org update_texturematrix( ctx ); 2077f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2078f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2079f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (new_state & (_NEW_LIGHT|_NEW_MODELVIEW|_MESA_NEW_NEED_EYE_COORDS)) { 2080f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org update_light( ctx ); 2081f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2082f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2083f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* emit all active clip planes if projection matrix changes. 2084f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2085f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (new_state & (_NEW_PROJECTION)) { 2086f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (ctx->Transform.ClipPlanesEnabled) 2087f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeonUpdateClipPlanes( ctx ); 2088f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2089f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2090f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2091f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org rmesa->radeon.NewGLState = 0; 2092f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2093f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return GL_TRUE; 2094f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 2095f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2096f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2097f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonInvalidateState( struct gl_context *ctx, GLuint new_state ) 2098f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 2099f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _swrast_InvalidateState( ctx, new_state ); 2100f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _swsetup_InvalidateState( ctx, new_state ); 2101f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _vbo_InvalidateState( ctx, new_state ); 2102f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _tnl_InvalidateState( ctx, new_state ); 2103f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _ae_invalidate_state( ctx, new_state ); 2104f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org R100_CONTEXT(ctx)->radeon.NewGLState |= new_state; 2105f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 2106f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2107f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2108f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* A hack. Need a faster way to find this out. 2109f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2110f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic GLboolean check_material( struct gl_context *ctx ) 2111f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 2112f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TNLcontext *tnl = TNL_CONTEXT(ctx); 2113f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint i; 2114f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2115f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (i = _TNL_ATTRIB_MAT_FRONT_AMBIENT; 2116f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org i < _TNL_ATTRIB_MAT_BACK_INDEXES; 2117f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org i++) 2118f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (tnl->vb.AttribPtr[i] && 2119f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org tnl->vb.AttribPtr[i]->stride) 2120f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return GL_TRUE; 2121f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2122f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return GL_FALSE; 2123f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 2124f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2125f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2126f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonWrapRunPipeline( struct gl_context *ctx ) 2127f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 2128f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr rmesa = R100_CONTEXT(ctx); 2129f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLboolean has_material; 2130f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2131f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (0) 2132f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org fprintf(stderr, "%s, newstate: %x\n", __FUNCTION__, rmesa->radeon.NewGLState); 2133f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2134f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Validate state: 2135f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2136f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (rmesa->radeon.NewGLState) 2137f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (!radeonValidateState( ctx )) 2138f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org FALLBACK(rmesa, RADEON_FALLBACK_TEXTURE, GL_TRUE); 2139f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2140f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org has_material = (ctx->Light.Enabled && check_material( ctx )); 2141f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2142f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (has_material) { 2143f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_MATERIAL, GL_TRUE ); 2144f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2145f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2146f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Run the pipeline. 2147f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2148f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org _tnl_run_pipeline( ctx ); 2149f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2150f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org if (has_material) { 2151f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TCL_FALLBACK( ctx, RADEON_TCL_FALLBACK_MATERIAL, GL_FALSE ); 2152f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2153f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 2154f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2155f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgstatic void radeonPolygonStipple( struct gl_context *ctx, const GLubyte *mask ) 2156f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 2157f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100ContextPtr r100 = R100_CONTEXT(ctx); 2158f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org GLint i; 2159f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2160f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org radeon_firevertices(&r100->radeon); 2161f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2162f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org RADEON_STATECHANGE(r100, stp); 2163f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2164f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org /* Must flip pattern upside down. 2165f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2166f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for ( i = 31 ; i >= 0; i--) { 2167f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org r100->hw.stp.cmd[3 + i] = ((GLuint *) mask)[i]; 2168f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 2169f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 2170f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2171f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2172f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org/* Initialize the driver's state functions. 2173f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * Many of the ctx->Driver functions might have been initialized to 2174f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org * software defaults in the earlier _mesa_init_driver_functions() call. 2175f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org */ 2176f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgvoid radeonInitStateFuncs( struct gl_context *ctx ) 2177f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 2178f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.UpdateState = radeonInvalidateState; 2179f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.LightingSpaceChange = radeonLightingSpaceChange; 2180f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2181f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.DrawBuffer = radeonDrawBuffer; 2182f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.ReadBuffer = radeonReadBuffer; 2183f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.CopyPixels = _mesa_meta_CopyPixels; 2184f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.DrawPixels = _mesa_meta_DrawPixels; 2185f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.ReadPixels = radeonReadPixels; 2186f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2187f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.AlphaFunc = radeonAlphaFunc; 2188f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.BlendEquationSeparate = radeonBlendEquationSeparate; 2189f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.BlendFuncSeparate = radeonBlendFuncSeparate; 2190f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.ClipPlane = radeonClipPlane; 2191f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.ColorMask = radeonColorMask; 2192f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.CullFace = radeonCullFace; 2193f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.DepthFunc = radeonDepthFunc; 2194f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.DepthMask = radeonDepthMask; 2195f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.DepthRange = radeonDepthRange; 2196f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.Enable = radeonEnable; 2197f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.Fogfv = radeonFogfv; 2198f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.FrontFace = radeonFrontFace; 2199f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.Hint = NULL; 2200f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.LightModelfv = radeonLightModelfv; 2201f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.Lightfv = radeonLightfv; 2202f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.LineStipple = radeonLineStipple; 2203f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.LineWidth = radeonLineWidth; 2204f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.LogicOpcode = radeonLogicOpCode; 2205f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.PolygonMode = radeonPolygonMode; 2206f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.PolygonOffset = radeonPolygonOffset; 2207f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.PolygonStipple = radeonPolygonStipple; 2208f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.RenderMode = radeonRenderMode; 2209f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.Scissor = radeonScissor; 2210f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.ShadeModel = radeonShadeModel; 2211f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.StencilFuncSeparate = radeonStencilFuncSeparate; 2212f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.StencilMaskSeparate = radeonStencilMaskSeparate; 2213f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.StencilOpSeparate = radeonStencilOpSeparate; 2214f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org ctx->Driver.Viewport = radeonViewport; 2215f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 2216f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TNL_CONTEXT(ctx)->Driver.NotifyMaterialChange = radeonUpdateMaterial; 2217f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TNL_CONTEXT(ctx)->Driver.RunPipeline = radeonWrapRunPipeline; 2218f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 2219