1// REQUIRES: aarch64-registered-target
2// RUN: %clang_cc1 -triple arm64-none-linux-gnu -target-feature +neon \
3// RUN:   -ffp-contract=fast -S -emit-llvm -O1 -o - %s | FileCheck %s
4
5#include <arm_neon.h>
6
7uint8x8_t test_shift_vshr(uint8x8_t a) {
8  // CHECK-LABEL: test_shift_vshr
9  // CHECK: %{{.*}} = lshr <8 x i8> %a, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
10  return vshr_n_u8(a, 5);
11}
12
13int8x8_t test_shift_vshr_smax(int8x8_t a) {
14  // CHECK-LABEL: test_shift_vshr_smax
15  // CHECK: %{{.*}} = ashr <8 x i8> %a, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
16  return vshr_n_s8(a, 8);
17}
18
19uint8x8_t test_shift_vshr_umax(uint8x8_t a) {
20  // CHECK-LABEL: test_shift_vshr_umax
21  // CHECK: ret <8 x i8> zeroinitializer
22  return vshr_n_u8(a, 8);
23}
24
25uint8x8_t test_shift_vsra(uint8x8_t a, uint8x8_t b) {
26  // CHECK-LABEL: test_shift_vsra
27  // CHECK: %[[SHR:.*]] = lshr <8 x i8> %b, <i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5, i8 5>
28  // CHECK: %{{.*}} = add <8 x i8> %[[SHR]], %a
29  return vsra_n_u8(a, b, 5);
30}
31
32int8x8_t test_shift_vsra_smax(int8x8_t a, int8x8_t b) {
33  // CHECK-LABEL: test_shift_vsra_smax
34  // CHECK: %[[SHR:.*]] = ashr <8 x i8> %b, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
35  // CHECK: %{{.*}} = add <8 x i8> %[[SHR]], %a
36  return vsra_n_s8(a, b, 8);
37}
38
39uint8x8_t test_shift_vsra_umax(uint8x8_t a, uint8x8_t b) {
40  // CHECK-LABEL: test_shift_vsra_umax
41  // CHECK: ret <8 x i8> %a
42  return vsra_n_u8(a, b, 8);
43}
44