1224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 2224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Performance events: 3224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 4224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (C) 2008-2009, Thomas Gleixner <tglx@linutronix.de> 5224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (C) 2008-2011, Red Hat, Inc., Ingo Molnar 6224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright (C) 2008-2011, Red Hat, Inc., Peter Zijlstra 7224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 8224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Data type definitions, declarations, prototypes. 9224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 10224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Started by: Thomas Gleixner and Ingo Molnar 11224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 12224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * For licencing details see kernel-base/COPYING 13224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 14224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#ifndef _UAPI_LINUX_PERF_EVENT_H 15224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _UAPI_LINUX_PERF_EVENT_H 16224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 17224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <linux/types.h> 18224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <linux/ioctl.h> 19224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <asm/byteorder.h> 20224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 21224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 22224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * User-space ABI bits: 23224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 24224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 25224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 26224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * attr.type 27224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 28224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_type_id { 29224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_HARDWARE = 0, 30224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_SOFTWARE = 1, 31224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_TRACEPOINT = 2, 32224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_HW_CACHE = 3, 33224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_RAW = 4, 34224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_BREAKPOINT = 5, 35224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 36224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_TYPE_MAX, /* non-ABI */ 37224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 38224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 39224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 40224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Generalized performance event event_id types, used by the 41224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * attr.event_id parameter of the sys_perf_event_open() 42224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * syscall: 43224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 44224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_id { 45224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 46224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Common hardware events, generalized by the kernel: 47224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 48224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CPU_CYCLES = 0, 49224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_INSTRUCTIONS = 1, 50224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_REFERENCES = 2, 51224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_MISSES = 3, 52224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_BRANCH_INSTRUCTIONS = 4, 53224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_BRANCH_MISSES = 5, 54224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_BUS_CYCLES = 6, 55224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_STALLED_CYCLES_FRONTEND = 7, 56224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_STALLED_CYCLES_BACKEND = 8, 57224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_REF_CPU_CYCLES = 9, 58224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 59224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_MAX, /* non-ABI */ 60224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 61224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 62224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 63224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Generalized hardware cache events: 64224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 65224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { L1-D, L1-I, LLC, ITLB, DTLB, BPU, NODE } x 66224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { read, write, prefetch } x 67224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { accesses, misses } 68224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 69224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_cache_id { 70224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_L1D = 0, 71224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_L1I = 1, 72224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_LL = 2, 73224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_DTLB = 3, 74224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_ITLB = 4, 75224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_BPU = 5, 76224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_NODE = 6, 77224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 78224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_MAX, /* non-ABI */ 79224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 80224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 81224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_cache_op_id { 82224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_READ = 0, 83224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_WRITE = 1, 84224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_PREFETCH = 2, 85224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 86224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_OP_MAX, /* non-ABI */ 87224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 88224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 89224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_hw_cache_op_result_id { 90224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_RESULT_ACCESS = 0, 91224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_RESULT_MISS = 1, 92224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 93224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_HW_CACHE_RESULT_MAX, /* non-ABI */ 94224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 95224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 96224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 97224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Special "software" events provided by the kernel, even if the hardware 98224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * does not support performance events. These events measure various 99224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * physical and sw events of the kernel (and allow the profiling of them as 100224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * well): 101224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 102224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_sw_ids { 103224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_CPU_CLOCK = 0, 104224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_TASK_CLOCK = 1, 105224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_PAGE_FAULTS = 2, 106224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_CONTEXT_SWITCHES = 3, 107224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_CPU_MIGRATIONS = 4, 108224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_PAGE_FAULTS_MIN = 5, 109224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_PAGE_FAULTS_MAJ = 6, 110224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_ALIGNMENT_FAULTS = 7, 111224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_EMULATION_FAULTS = 8, 112e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_COUNT_SW_DUMMY = 9, 113224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 114224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_COUNT_SW_MAX, /* non-ABI */ 115224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 116224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 117224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 118224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Bits that can be set in attr.sample_type to request information 119224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * in the overflow packets. 120224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 121224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_sample_format { 122224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_IP = 1U << 0, 123224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_TID = 1U << 1, 124224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_TIME = 1U << 2, 125224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_ADDR = 1U << 3, 126224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_READ = 1U << 4, 127224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_CALLCHAIN = 1U << 5, 128224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_ID = 1U << 6, 129224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_CPU = 1U << 7, 130224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_PERIOD = 1U << 8, 131224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_STREAM_ID = 1U << 9, 132224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_RAW = 1U << 10, 133224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_STACK = 1U << 11, 134224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_USER = 1U << 12, 135224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_STACK_USER = 1U << 13, 136224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_WEIGHT = 1U << 14, 137224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_DATA_SRC = 1U << 15, 138e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_SAMPLE_IDENTIFIER = 1U << 16, 139e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_SAMPLE_TRANSACTION = 1U << 17, 140224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 141e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_SAMPLE_MAX = 1U << 18, /* non-ABI */ 142224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 143224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 144224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 145224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * values to program into branch_sample_type when PERF_SAMPLE_BRANCH is set 146224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 147224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If the user does not pass priv level information via branch_sample_type, 148224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * the kernel uses the event's priv level. Branch and event priv levels do 149224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * not have to match. Branch priv level is checked for permissions. 150224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 151224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The branch types can be combined, however BRANCH_ANY covers all types 152224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * of branches and therefore it supersedes all the other types. 153224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 154224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_branch_sample_type { 155224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_USER = 1U << 0, /* user branches */ 156224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_KERNEL = 1U << 1, /* kernel branches */ 157224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_HV = 1U << 2, /* hypervisor branches */ 158224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 159224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_ANY = 1U << 3, /* any branch types */ 160224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_ANY_CALL = 1U << 4, /* any call branch */ 161224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_ANY_RETURN = 1U << 5, /* any return branch */ 162224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_IND_CALL = 1U << 6, /* indirect calls */ 163e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_SAMPLE_BRANCH_ABORT_TX = 1U << 7, /* transaction aborts */ 164e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_SAMPLE_BRANCH_IN_TX = 1U << 8, /* in transaction */ 165e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_SAMPLE_BRANCH_NO_TX = 1U << 9, /* not in transaction */ 166224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 167e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_SAMPLE_BRANCH_MAX = 1U << 10, /* non-ABI */ 168224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 169224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 170224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_SAMPLE_BRANCH_PLM_ALL \ 171224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng (PERF_SAMPLE_BRANCH_USER|\ 172224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_KERNEL|\ 173224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_BRANCH_HV) 174224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 175224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 176224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Values to determine ABI of the registers dump. 177224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 178224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_sample_regs_abi { 179224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_ABI_NONE = 0, 180224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_ABI_32 = 1, 181224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_SAMPLE_REGS_ABI_64 = 2, 182224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 183224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 184224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 185e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Values for the memory transaction event qualifier, mostly for 186e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * abort events. Multiple bits can be set. 187e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 188e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylenum { 189e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_ELISION = (1 << 0), /* From elision */ 190e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_TRANSACTION = (1 << 1), /* From transaction */ 191e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_SYNC = (1 << 2), /* Instruction is related */ 192e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_ASYNC = (1 << 3), /* Instruction not related */ 193e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_RETRY = (1 << 4), /* Retry possible */ 194e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_CONFLICT = (1 << 5), /* Conflict abort */ 195e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_CAPACITY_WRITE = (1 << 6), /* Capacity write abort */ 196e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_CAPACITY_READ = (1 << 7), /* Capacity read abort */ 197e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 198e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_MAX = (1 << 8), /* non-ABI */ 199e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 200e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl /* bits 32..63 are reserved for the abort code */ 201e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 202e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_ABORT_MASK = (0xffffffffULL << 32), 203e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_TXN_ABORT_SHIFT = 32, 204e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 205e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 206e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/* 207224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The format of the data returned by read() on a perf event fd, 208224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * as specified by attr.read_format: 209224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 210224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct read_format { 211224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 value; 212224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 213224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 214224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 id; } && PERF_FORMAT_ID 215224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } && !PERF_FORMAT_GROUP 216224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 217224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 nr; 218224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_enabled; } && PERF_FORMAT_TOTAL_TIME_ENABLED 219224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time_running; } && PERF_FORMAT_TOTAL_TIME_RUNNING 220224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 value; 221224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 id; } && PERF_FORMAT_ID 222224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } cntr[nr]; 223224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } && PERF_FORMAT_GROUP 224224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 225224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 226224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_read_format { 227224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_TOTAL_TIME_ENABLED = 1U << 0, 228224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_TOTAL_TIME_RUNNING = 1U << 1, 229224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_ID = 1U << 2, 230224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_GROUP = 1U << 3, 231224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 232224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_FORMAT_MAX = 1U << 4, /* non-ABI */ 233224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 234224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 235224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER0 64 /* sizeof first published struct */ 236224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER1 72 /* add: config2 */ 237224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER2 80 /* add: branch_sample_type */ 238224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_ATTR_SIZE_VER3 96 /* add: sample_regs_user */ 239224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* add: sample_stack_user */ 240224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 241224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 242224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Hardware event_id to monitor via a performance monitoring event: 243224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 244224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct perf_event_attr { 245224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 246224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 247224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Major type: hardware/software/tracepoint/etc. 248224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 249224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 type; 250224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 251224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 252224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Size of the attr structure, for fwd/bwd compat. 253224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 254224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 size; 255224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 256224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 257224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Type specific configuration information. 258224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 259224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 config; 260224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 261224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 262224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_period; 263224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_freq; 264224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 265224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 266224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_type; 267224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 read_format; 268224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 269224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 disabled : 1, /* off by default */ 270224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng inherit : 1, /* children inherit it */ 271224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng pinned : 1, /* must always be on PMU */ 272224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclusive : 1, /* only group on PMU */ 273224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_user : 1, /* don't count user */ 274224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_kernel : 1, /* ditto kernel */ 275224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_hv : 1, /* ditto hypervisor */ 276224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_idle : 1, /* don't count when idle */ 277224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mmap : 1, /* include mmap data */ 278224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng comm : 1, /* include comm data */ 279224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng freq : 1, /* use freq, not period */ 280224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng inherit_stat : 1, /* per task counts */ 281224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enable_on_exec : 1, /* next exec enables */ 282224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng task : 1, /* trace fork/exit */ 283224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng watermark : 1, /* wakeup_watermark */ 284224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 285224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * precise_ip: 286224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 287224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 0 - SAMPLE_IP can have arbitrary skid 288224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 1 - SAMPLE_IP must have constant skid 289224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 2 - SAMPLE_IP requested to have 0 skid 290224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 3 - SAMPLE_IP must have 0 skid 291224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 292224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * See also PERF_RECORD_MISC_EXACT_IP 293224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 294224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng precise_ip : 2, /* skid constraint */ 295224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mmap_data : 1, /* non-exec mmap data */ 296224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng sample_id_all : 1, /* sample_type all events */ 297224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 298224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_host : 1, /* don't count in host */ 299224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_guest : 1, /* don't count in guest */ 300224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 301224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_callchain_kernel : 1, /* exclude kernel callchains */ 302224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng exclude_callchain_user : 1, /* exclude user callchains */ 303e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl mmap2 : 1, /* include mmap with inode data */ 304224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 305e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __reserved_1 : 40; 306224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 307224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 308224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 wakeup_events; /* wakeup every n events */ 309224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 wakeup_watermark; /* bytes before wakeup */ 310224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 311224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 312224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 bp_type; 313224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 314224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 bp_addr; 315224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 config1; /* extension of config */ 316224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 317224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 318224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 bp_len; 319224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 config2; /* extension of config1 */ 320224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 321224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 branch_sample_type; /* enum perf_branch_sample_type */ 322224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 323224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 324224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Defines set of user regs to dump on samples. 325224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * See asm/perf_regs.h for details. 326224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 327224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 sample_regs_user; 328224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 329224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 330224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Defines size of the user stack to dump on samples. 331224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 332224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 sample_stack_user; 333224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 334224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* Align to u64. */ 335224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 __reserved_2; 336224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 337224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 338224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define perf_flags(attr) (*(&(attr)->read_format + 1)) 339224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 340224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 341224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Ioctls that can be done on a perf event fd: 342224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 343224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_ENABLE _IO ('$', 0) 344224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_DISABLE _IO ('$', 1) 345224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_REFRESH _IO ('$', 2) 346224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_RESET _IO ('$', 3) 347224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_PERIOD _IOW('$', 4, __u64) 348224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_SET_OUTPUT _IO ('$', 5) 349224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_EVENT_IOC_SET_FILTER _IOW('$', 6, char *) 350e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define PERF_EVENT_IOC_ID _IOR('$', 7, __u64 *) 351224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 352224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_ioc_flags { 353224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_IOC_FLAG_GROUP = 1U << 0, 354224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 355224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 356224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 357224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Structure of the page that can be mapped via mmap 358224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 359224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct perf_event_mmap_page { 360224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 version; /* version number of this structure */ 361224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 compat_version; /* lowest version this is compat with */ 362224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 363224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 364224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Bits needed to read the hw events in user-space. 365224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 366224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 seq, time_mult, time_shift, idx, width; 367224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 count, enabled, running; 368224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 cyc, time_offset; 369224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * s64 pmc = 0; 370224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 371224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * do { 372224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * seq = pc->lock; 373224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * barrier() 374224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 375224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * enabled = pc->time_enabled; 376224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * running = pc->time_running; 377224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 378224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * if (pc->cap_usr_time && enabled != running) { 379224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * cyc = rdtsc(); 380224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * time_offset = pc->time_offset; 381224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * time_mult = pc->time_mult; 382224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * time_shift = pc->time_shift; 383224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } 384224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 385224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * idx = pc->index; 386224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * count = pc->offset; 387224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * if (pc->cap_usr_rdpmc && idx) { 388224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * width = pc->pmc_width; 389224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * pmc = rdpmc(idx - 1); 390224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } 391224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 392224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * barrier(); 393224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * } while (pc->lock != seq); 394224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 395224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * NOTE: for obvious reason this only works on self-monitoring 396224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * processes. 397224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 398224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 lock; /* seqlock for synchronization */ 399224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 index; /* hardware event identifier */ 400224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __s64 offset; /* add to hardware event value */ 401224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 time_enabled; /* time event active */ 402224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 time_running; /* time event on cpu */ 403224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng union { 404224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 capabilities; 405e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl struct { 406e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u64 cap_bit0 : 1, /* Always 0, deprecated, see commit 860f085b74e9 */ 407e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl cap_bit0_is_deprecated : 1, /* Always 1, signals that bit 0 is zero */ 408e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 409e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl cap_user_rdpmc : 1, /* The RDPMC instruction can be used to read counts */ 410e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl cap_user_time : 1, /* The time_* fields are used */ 411e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl cap_user_time_zero : 1, /* The time_zero field is used */ 412e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl cap_____res : 59; 413e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl }; 414224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 415224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 416224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 417224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If cap_usr_rdpmc this field provides the bit-width of the value 418224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * read using the rdpmc() or equivalent instruction. This can be used 419224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * to sign extend the result like: 420224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 421224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * pmc <<= 64 - width; 422224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * pmc >>= 64 - width; // signed shift right 423224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * count += pmc; 424224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 425224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 pmc_width; 426224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 427224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 428224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If cap_usr_time the below fields can be used to compute the time 429224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * delta since time_enabled (in ns) using rdtsc or similar. 430224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 431224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 quot, rem; 432224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 delta; 433224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 434224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * quot = (cyc >> time_shift); 435224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * rem = cyc & ((1 << time_shift) - 1); 436224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * delta = time_offset + quot * time_mult + 437224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * ((rem * time_mult) >> time_shift); 438224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 439224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Where time_offset,time_mult,time_shift and cyc are read in the 440224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * seqcount loop described above. This delta can then be added to 441224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * enabled and possible running (if idx), improving the scaling: 442224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 443224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * enabled += delta; 444224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * if (idx) 445224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * running += delta; 446224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 447224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * quot = count / running; 448224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * rem = count % running; 449224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * count = quot * enabled + (rem * enabled) / running; 450224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 451224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 time_shift; 452224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 time_mult; 453224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 time_offset; 454e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl /* 455e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * If cap_usr_time_zero, the hardware clock (e.g. TSC) can be calculated 456e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * from sample timestamps. 457e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 458e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * time = timestamp - time_zero; 459e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * quot = time / time_mult; 460e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * rem = time % time_mult; 461e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * cyc = (quot << time_shift) + (rem << time_shift) / time_mult; 462e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 463e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * And vice versa: 464e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 465e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * quot = cyc >> time_shift; 466e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * rem = cyc & ((1 << time_shift) - 1); 467e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * timestamp = time_zero + quot * time_mult + 468e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * ((rem * time_mult) >> time_shift); 469e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 470e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u64 time_zero; 471e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u32 size; /* Header size up to __reserved[] fields. */ 472224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 473224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 474224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Hole for extension of the self monitor capabilities 475224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 476224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 477e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u8 __reserved[118*8+4]; /* align to 1k. */ 478224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 479224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 480224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Control data for the mmap() data buffer. 481224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 482e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * User-space reading the @data_head value should issue an smp_rmb(), 483e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * after reading this value. 484224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 485224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * When the mapping is PROT_WRITE the @data_tail value should be 486e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * written by userspace to reflect the last read data, after issueing 487e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * an smp_mb() to separate the data read from the ->data_tail store. 488e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * In this case the kernel will not over-write unread data. 489e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 490e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * See perf_output_put_handle() for the data ordering. 491224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 492224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 data_head; /* head in the data section */ 493224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 data_tail; /* user-space written tail */ 494224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 495224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 496224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_CPUMODE_MASK (7 << 0) 497224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_CPUMODE_UNKNOWN (0 << 0) 498224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_KERNEL (1 << 0) 499224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_USER (2 << 0) 500224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_HYPERVISOR (3 << 0) 501224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_GUEST_KERNEL (4 << 0) 502224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_GUEST_USER (5 << 0) 503224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 504224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_MMAP_DATA (1 << 13) 505224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 506224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Indicates that the content of PERF_SAMPLE_IP points to 507224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * the actual instruction that triggered the event. See also 508224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * perf_event_attr::precise_ip. 509224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 510224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_EXACT_IP (1 << 14) 511224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 512224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Reserve the last bit to indicate some extended misc field 513224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 514224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_RECORD_MISC_EXT_RESERVED (1 << 15) 515224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 516224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct perf_event_header { 517224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 type; 518224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 misc; 519224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u16 size; 520224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 521224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 522224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_event_type { 523224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 524224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 525224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * If perf_event_attr.sample_id_all is set then all event types will 526224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * have the sample_type selected fields related to where/when 527e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * (identity) an event took place (TID, TIME, ID, STREAM_ID, CPU, 528e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * IDENTIFIER) described in PERF_RECORD_SAMPLE below, it will be stashed 529e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * just after the perf_event_header and the fields already present for 530e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * the existing fields, i.e. at the end of the payload. That way a newer 531e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * perf.data file will be supported by older perf tools, with these new 532e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * optional fields being ignored. 533224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 534e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id { 535e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u32 pid, tid; } && PERF_SAMPLE_TID 536e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u64 time; } && PERF_SAMPLE_TIME 537e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u64 id; } && PERF_SAMPLE_ID 538e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 539e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u32 cpu, res; } && PERF_SAMPLE_CPU 540e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u64 id; } && PERF_SAMPLE_IDENTIFIER 541e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * } && perf_event_attr::sample_id_all 542e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 543e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. The 544e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * advantage of PERF_SAMPLE_IDENTIFIER is that its position is fixed 545e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * relative to header.size. 546e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 547e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 548e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl /* 549224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The MMAP events record the PROT_EXEC mappings so that we can 550224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * correlate userspace IPs to code. They have the following structure: 551224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 552224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 553224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 554224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 555224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, tid; 556224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 addr; 557224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 len; 558224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 pgoff; 559224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char filename[]; 560e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 561224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 562224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 563224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_MMAP = 1, 564224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 565224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 566224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 567224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 568224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 id; 569224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 lost; 570e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 571224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 572224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 573224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_LOST = 2, 574224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 575224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 576224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 577224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 578224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 579224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, tid; 580224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char comm[]; 581e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 582224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 583224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 584224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_COMM = 3, 585224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 586224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 587224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 588224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 589224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, ppid; 590224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 tid, ptid; 591224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 time; 592e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 593224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 594224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 595224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_EXIT = 4, 596224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 597224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 598224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 599224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 600224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 time; 601224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 id; 602224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 stream_id; 603e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 604224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 605224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 606224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_THROTTLE = 5, 607224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_UNTHROTTLE = 6, 608224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 609224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 610224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 611224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 612224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, ppid; 613224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 tid, ptid; 614224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 time; 615e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 616224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 617224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 618224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_FORK = 7, 619224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 620224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 621224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 622224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 623224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u32 pid, tid; 624224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 625224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct read_format values; 626e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 627224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 628224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 629224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_READ = 8, 630224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 631224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* 632224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct { 633224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * struct perf_event_header header; 634224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 635e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * # 636e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * # Note that PERF_SAMPLE_IDENTIFIER duplicates PERF_SAMPLE_ID. 637e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * # The advantage of PERF_SAMPLE_IDENTIFIER is that its position 638e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * # is fixed relative to header. 639e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * # 640e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 641e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u64 id; } && PERF_SAMPLE_IDENTIFIER 642224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 ip; } && PERF_SAMPLE_IP 643224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u32 pid, tid; } && PERF_SAMPLE_TID 644224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 time; } && PERF_SAMPLE_TIME 645224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 addr; } && PERF_SAMPLE_ADDR 646224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 id; } && PERF_SAMPLE_ID 647224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 stream_id;} && PERF_SAMPLE_STREAM_ID 648224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u32 cpu, res; } && PERF_SAMPLE_CPU 649224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 period; } && PERF_SAMPLE_PERIOD 650224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 651224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { struct read_format values; } && PERF_SAMPLE_READ 652224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 653224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 nr, 654224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 ips[nr]; } && PERF_SAMPLE_CALLCHAIN 655224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 656224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 657224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # The RAW record below is opaque data wrt the ABI 658224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 659224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # That is, the ABI doesn't make any promises wrt to 660224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # the stability of its content, it may vary depending 661224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # on event, hardware, kernel version and phase of 662224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # the moon. 663224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 664224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # In other words, PERF_SAMPLE_RAW contents are not an ABI. 665224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * # 666224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 667224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u32 size; 668224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char data[size];}&& PERF_SAMPLE_RAW 669224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 670224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 nr; 671224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 from, to, flags } lbr[nr];} && PERF_SAMPLE_BRANCH_STACK 672224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 673224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 abi; # enum perf_sample_regs_abi 674224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 regs[weight(mask)]; } && PERF_SAMPLE_REGS_USER 675224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 676224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 size; 677224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * char data[size]; 678224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * u64 dyn_size; } && PERF_SAMPLE_STACK_USER 679224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 680224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * { u64 weight; } && PERF_SAMPLE_WEIGHT 681e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u64 data_src; } && PERF_SAMPLE_DATA_SRC 682e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * { u64 transaction; } && PERF_SAMPLE_TRANSACTION 683224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * }; 684224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 685224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_SAMPLE = 9, 686224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 687e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl /* 688e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * The MMAP2 records are an augmented version of MMAP, they add 689e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * maj, min, ino numbers to be used to uniquely identify each mapping 690e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 691e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct { 692e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct perf_event_header header; 693e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 694e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u32 pid, tid; 695e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u64 addr; 696e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u64 len; 697e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u64 pgoff; 698e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u32 maj; 699e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u32 min; 700e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u64 ino; 701e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * u64 ino_generation; 702e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * char filename[]; 703e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * struct sample_id sample_id; 704e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * }; 705e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 706e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl PERF_RECORD_MMAP2 = 10, 707e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 708224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_RECORD_MAX, /* non-ABI */ 709224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 710224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 711224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MAX_STACK_DEPTH 127 712224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 713224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum perf_callchain_context { 714224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_HV = (__u64)-32, 715224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_KERNEL = (__u64)-128, 716224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_USER = (__u64)-512, 717224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 718224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_GUEST = (__u64)-2048, 719224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_GUEST_KERNEL = (__u64)-2176, 720224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_GUEST_USER = (__u64)-2560, 721224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 722224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng PERF_CONTEXT_MAX = (__u64)-4095, 723224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 724224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 725224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_FLAG_FD_NO_GROUP (1U << 0) 726224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_FLAG_FD_OUTPUT (1U << 1) 727224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_FLAG_PID_CGROUP (1U << 2) /* pid=cgroup id, per-cpu mode only */ 728e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define PERF_FLAG_FD_CLOEXEC (1U << 3) /* O_CLOEXEC */ 729224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 730224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengunion perf_mem_data_src { 731224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 val; 732224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct { 733224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 mem_op:5, /* type of opcode */ 734224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_lvl:14, /* memory hierarchy level */ 735224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_snoop:5, /* snoop mode */ 736224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_lock:2, /* lock instr */ 737224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_dtlb:7, /* tlb access */ 738224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng mem_rsvd:31; 739224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng }; 740224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 741224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 742224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* type of opcode (load/store/prefetch,code) */ 743224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_NA 0x01 /* not available */ 744224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_LOAD 0x02 /* load instruction */ 745224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_STORE 0x04 /* store instruction */ 746224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_PFETCH 0x08 /* prefetch */ 747224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_EXEC 0x10 /* code (execution) */ 748224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_OP_SHIFT 0 749224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 750224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* memory hierarchy (memory level, hit or miss) */ 751224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_NA 0x01 /* not available */ 752224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_HIT 0x02 /* hit level */ 753224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_MISS 0x04 /* miss level */ 754224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_L1 0x08 /* L1 */ 755224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_LFB 0x10 /* Line Fill Buffer */ 756224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_L2 0x20 /* L2 */ 757224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_L3 0x40 /* L3 */ 758224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_LOC_RAM 0x80 /* Local DRAM */ 759224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_RAM1 0x100 /* Remote DRAM (1 hop) */ 760224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_RAM2 0x200 /* Remote DRAM (2 hops) */ 761224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_CCE1 0x400 /* Remote Cache (1 hop) */ 762224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_REM_CCE2 0x800 /* Remote Cache (2 hops) */ 763224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_IO 0x1000 /* I/O memory */ 764224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_UNC 0x2000 /* Uncached memory */ 765224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LVL_SHIFT 5 766224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 767224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* snoop mode */ 768224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_NA 0x01 /* not available */ 769224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_NONE 0x02 /* no snoop */ 770224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_HIT 0x04 /* snoop hit */ 771224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_MISS 0x08 /* snoop miss */ 772224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_HITM 0x10 /* snoop hit modified */ 773224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_SNOOP_SHIFT 19 774224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 775224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* locked instruction */ 776224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LOCK_NA 0x01 /* not available */ 777224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LOCK_LOCKED 0x02 /* locked transaction */ 778224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_LOCK_SHIFT 24 779224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 780224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* TLB access */ 781224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_NA 0x01 /* not available */ 782224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_HIT 0x02 /* hit level */ 783224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_MISS 0x04 /* miss level */ 784224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_L1 0x08 /* L1 */ 785224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_L2 0x10 /* L2 */ 786224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_WK 0x20 /* Hardware Walker*/ 787224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_OS 0x40 /* OS fault handler */ 788224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_TLB_SHIFT 26 789224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 790224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define PERF_MEM_S(a, s) \ 791e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl (((__u64)PERF_MEM_##a##_##s) << PERF_MEM_##a##_SHIFT) 792e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 793e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/* 794e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * single taken branch record layout: 795e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 796e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * from: source instruction (may not always be a branch insn) 797e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * to: branch target 798e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * mispred: branch target was mispredicted 799e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * predicted: branch target was predicted 800e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 801e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * support for mispred, predicted is optional. In case it 802e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * is not supported mispred = predicted = 0. 803e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 804e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * in_tx: running in a hardware transaction 805e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * abort: aborting a hardware transaction 806e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 807e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct perf_branch_entry { 808e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u64 from; 809e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u64 to; 810e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u64 mispred:1, /* target mispredicted */ 811e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl predicted:1,/* target predicted */ 812e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl in_tx:1, /* in transaction */ 813e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl abort:1, /* transaction abort */ 814e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl reserved:60; 815e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 816224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 817224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#endif /* _UAPI_LINUX_PERF_EVENT_H */ 818