184bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//===-- llvm/CodeGen/MachineRegisterInfo.h ----------------------*- C++ -*-===//
284bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//
384bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//                     The LLVM Compiler Infrastructure
484bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//
584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner// This file is distributed under the University of Illinois Open Source
684bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner// License. See LICENSE.TXT for details.
784bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//
884bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//===----------------------------------------------------------------------===//
984bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//
1084bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner// This file defines the MachineRegisterInfo class.
1184bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//
1284bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner//===----------------------------------------------------------------------===//
1384bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner
1484bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#ifndef LLVM_CODEGEN_MACHINEREGISTERINFO_H
1584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#define LLVM_CODEGEN_MACHINEREGISTERINFO_H
1684bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner
1784bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#include "llvm/ADT/BitVector.h"
18994c727b5790e5c976e32c75364d78eb9b22a568Jakob Stoklund Olesen#include "llvm/ADT/IndexedMap.h"
1936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/ADT/iterator_range.h"
20255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/CodeGen/MachineInstrBundle.h"
21d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling#include "llvm/Target/TargetMachine.h"
22255f89faee13dc491cb64fbeae3c763e7e2ea4e6Chandler Carruth#include "llvm/Target/TargetRegisterInfo.h"
2384bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#include <vector>
2484bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner
2584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattnernamespace llvm {
26238bf5ada19ee411c1decff68e140966f7baf479Andrew Trickclass PSetIterator;
2790019479f9a3868d8be90564695097a61a725438Andrew Trick
281213d672653d7fee471d91d05b559e137d70ba56Chris Lattner/// MachineRegisterInfo - Keep track of information for virtual and physical
291213d672653d7fee471d91d05b559e137d70ba56Chris Lattner/// registers, including vreg register classes, use/def chains for registers,
301213d672653d7fee471d91d05b559e137d70ba56Chris Lattner/// etc.
3184bc5427d6883f73cfeae3da640acd011d35c006Chris Lattnerclass MachineRegisterInfo {
3203fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Laceypublic:
3303fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  class Delegate {
34354362524a72b3fa43a6c09380b7ae3b2380cbbaJuergen Ributzka    virtual void anchor();
3503fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  public:
36354362524a72b3fa43a6c09380b7ae3b2380cbbaJuergen Ributzka    virtual void MRI_NoteNewVirtualRegister(unsigned Reg) = 0;
3703fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey
3803fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey    virtual ~Delegate() {}
3903fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  };
4003fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey
4103fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Laceyprivate:
42d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling  const TargetMachine &TM;
4303fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  Delegate *TheDelegate;
44e27e1ca3c90b69e78242c98a669337f84ccded7fJakob Stoklund Olesen
4573e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  /// IsSSA - True when the machine function is in SSA form and virtual
4673e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  /// registers have a single def.
4773e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  bool IsSSA;
4873e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen
49aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// TracksLiveness - True while register liveness is being tracked accurately.
50aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// Basic block live-in lists, kill flags, and implicit defs may not be
51aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// accurate when after this flag is cleared.
52aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  bool TracksLiveness;
53aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen
54994c727b5790e5c976e32c75364d78eb9b22a568Jakob Stoklund Olesen  /// VRegInfo - Information we keep for each virtual register.
5562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  ///
5662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  /// Each element in this list contains the register class of the vreg and the
5762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  /// start of the use/def list for the register.
58994c727b5790e5c976e32c75364d78eb9b22a568Jakob Stoklund Olesen  IndexedMap<std::pair<const TargetRegisterClass*, MachineOperand*>,
59994c727b5790e5c976e32c75364d78eb9b22a568Jakob Stoklund Olesen             VirtReg2IndexFunctor> VRegInfo;
6011a26f3697ea6520022ea6d3fa6a07b3c1b988cdEvan Cheng
6190f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  /// RegAllocHints - This vector records register allocation hints for virtual
62358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng  /// registers. For each virtual register, it keeps a register and hint type
63358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng  /// pair making up the allocation hint. Hint type is target specific except
64358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng  /// for the value 0 which means the second value of the pair is the preferred
65358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng  /// register for allocation. For example, if the hint is <0, 1024>, it means
66358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng  /// the allocator should prefer the physical register allocated to the virtual
6790f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  /// register of the hint.
68994c727b5790e5c976e32c75364d78eb9b22a568Jakob Stoklund Olesen  IndexedMap<std::pair<unsigned, unsigned>, VirtReg2IndexFunctor> RegAllocHints;
6990019479f9a3868d8be90564695097a61a725438Andrew Trick
7062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  /// PhysRegUseDefLists - This is an array of the head of the use/def list for
7162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  /// physical registers.
7290019479f9a3868d8be90564695097a61a725438Andrew Trick  MachineOperand **PhysRegUseDefLists;
7390019479f9a3868d8be90564695097a61a725438Andrew Trick
74ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  /// getRegUseDefListHead - Return the head pointer for the register use/def
75ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  /// list for the specified virtual or physical register.
76ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  MachineOperand *&getRegUseDefListHead(unsigned RegNo) {
77ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen    if (TargetRegisterInfo::isVirtualRegister(RegNo))
78ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen      return VRegInfo[RegNo].second;
79ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen    return PhysRegUseDefLists[RegNo];
80ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  }
81ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen
82ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  MachineOperand *getRegUseDefListHead(unsigned RegNo) const {
83ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen    if (TargetRegisterInfo::isVirtualRegister(RegNo))
84ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen      return VRegInfo[RegNo].second;
85ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen    return PhysRegUseDefLists[RegNo];
86ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  }
87ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen
88fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen  /// Get the next element in the use-def chain.
89fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen  static MachineOperand *getNextOperandForReg(const MachineOperand *MO) {
90fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen    assert(MO && MO->isReg() && "This is not a register operand!");
91fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen    return MO->Contents.Reg.Next;
92fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen  }
93fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen
944b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// UsedRegUnits - This is a bit vector that is computed and set by the
9584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// register allocator, and must be kept up to date by passes that run after
9684bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// register allocation (though most don't modify this).  This is used
9784bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// so that the code generator knows which callee save registers to save and
9884bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// for other target specific uses.
994b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// This vector has bits set for register units that are modified in the
1004b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// current function. It doesn't include registers clobbered by function
1014b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// calls with register mask operands.
1024b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  BitVector UsedRegUnits;
1034b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen
1044b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// UsedPhysRegMask - Additional used physregs including aliases.
1054b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// This bit vector represents all the registers clobbered by function calls.
1064b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// It can model things that UsedRegUnits can't, such as function calls that
1074b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  /// clobber ymm7 but preserve the low half in xmm7.
108d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  BitVector UsedPhysRegMask;
109d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen
110d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// ReservedRegs - This is a bit vector of reserved registers.  The target
111d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// may change its mind about which registers should be reserved.  This
112d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// vector is the frozen set of reserved registers when register allocation
113d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// started.
114d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  BitVector ReservedRegs;
115d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen
116e6dc59891fc53d65b3f6d19772d26e23e0cc1cacJakob Stoklund Olesen  /// Keep track of the physical registers that are live in to the function.
1176acbcd423b2ace94bb13c0de9d98ea66c5dbe00cEli Bendersky  /// Live in values are typically arguments in registers.  LiveIn values are
1186acbcd423b2ace94bb13c0de9d98ea66c5dbe00cEli Bendersky  /// allowed to have virtual registers associated with them, stored in the
1196acbcd423b2ace94bb13c0de9d98ea66c5dbe00cEli Bendersky  /// second element.
12084bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  std::vector<std::pair<unsigned, unsigned> > LiveIns;
12190019479f9a3868d8be90564695097a61a725438Andrew Trick
122001d3dc976d7cda8a3dd8c7fd4020b0b96033f4eCraig Topper  MachineRegisterInfo(const MachineRegisterInfo&) LLVM_DELETED_FUNCTION;
123001d3dc976d7cda8a3dd8c7fd4020b0b96033f4eCraig Topper  void operator=(const MachineRegisterInfo&) LLVM_DELETED_FUNCTION;
12484bc5427d6883f73cfeae3da640acd011d35c006Chris Lattnerpublic:
125d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling  explicit MachineRegisterInfo(const TargetMachine &TM);
12662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner  ~MachineRegisterInfo();
12773e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen
12803dca5e4b6c41e1e7fa4edad3d7ff8d5f6de7008Andrew Trick  const TargetRegisterInfo *getTargetRegisterInfo() const {
12903dca5e4b6c41e1e7fa4edad3d7ff8d5f6de7008Andrew Trick    return TM.getRegisterInfo();
13003dca5e4b6c41e1e7fa4edad3d7ff8d5f6de7008Andrew Trick  }
13103dca5e4b6c41e1e7fa4edad3d7ff8d5f6de7008Andrew Trick
13203fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  void resetDelegate(Delegate *delegate) {
13303fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey    // Ensure another delegate does not take over unless the current
13403fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey    // delegate first unattaches itself. If we ever need to multicast
13503fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey    // notifications, we will need to change to using a list.
13603fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey    assert(TheDelegate == delegate &&
13703fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey           "Only the current delegate can perform reset!");
138dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    TheDelegate = nullptr;
13903fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  }
14003fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey
14103fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  void setDelegate(Delegate *delegate) {
14203fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey    assert(delegate && !TheDelegate &&
14303fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey           "Attempted to set delegate to null, or to change it without "
14403fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey           "first resetting it!");
14503fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey
14603fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey    TheDelegate = delegate;
14703fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey  }
14803fe68e0a9c0fdd196f62899cb44b6f9a56dd7c8Mark Lacey
14973e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  //===--------------------------------------------------------------------===//
15073e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // Function State
15173e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  //===--------------------------------------------------------------------===//
15273e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen
15373e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // isSSA - Returns true when the machine function is in SSA form. Early
15473e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // passes require the machine function to be in SSA form where every virtual
15573e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // register has a single defining instruction.
15673e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  //
15773e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // The TwoAddressInstructionPass and PHIElimination passes take the machine
15873e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // function out of SSA form when they introduce multiple defs per virtual
15973e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // register.
16073e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  bool isSSA() const { return IsSSA; }
16173e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen
16273e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  // leaveSSA - Indicates that the machine function is no longer in SSA form.
16373e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen  void leaveSSA() { IsSSA = false; }
16473e7dced3892f2abb4344526147d4df0f62aee61Jakob Stoklund Olesen
165aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// tracksLiveness - Returns true when tracking register liveness accurately.
166aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  ///
167aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// While this flag is true, register liveness information in basic block
168aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// live-in lists and machine instruction operands is accurate. This means it
169aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// can be used to change the code in ways that affect the values in
170aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// registers, for example by the register scavenger.
171aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  ///
172aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// When this flag is false, liveness is no longer reliable.
173aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  bool tracksLiveness() const { return TracksLiveness; }
174aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen
175aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// invalidateLiveness - Indicates that register liveness is no longer being
176aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// tracked accurately.
177aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  ///
178aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// This should be called by late passes that invalidate the liveness
179aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  /// information.
180aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen  void invalidateLiveness() { TracksLiveness = false; }
181aba6559370c3d453588103fb667ffa3b11b76652Jakob Stoklund Olesen
1826c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  //===--------------------------------------------------------------------===//
1836c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  // Register Info
1846c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  //===--------------------------------------------------------------------===//
1856c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner
186ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  // Strictly for use by MachineInstr.cpp.
187ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  void addRegOperandToUseList(MachineOperand *MO);
188ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen
189ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  // Strictly for use by MachineInstr.cpp.
190ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen  void removeRegOperandFromUseList(MachineOperand *MO);
191ff2b99afc8cbc6cfa73181072888e0f9f07deb7eJakob Stoklund Olesen
192bced5cd924e47818d67e33b3ae1550ab96fc239aJakob Stoklund Olesen  // Strictly for use by MachineInstr.cpp.
193bced5cd924e47818d67e33b3ae1550ab96fc239aJakob Stoklund Olesen  void moveOperands(MachineOperand *Dst, MachineOperand *Src, unsigned NumOps);
194bced5cd924e47818d67e33b3ae1550ab96fc239aJakob Stoklund Olesen
195a58d67af29d38fa37c94f59af37db9df75f349beJakob Stoklund Olesen  /// Verify the sanity of the use list for Reg.
196a58d67af29d38fa37c94f59af37db9df75f349beJakob Stoklund Olesen  void verifyUseList(unsigned Reg) const;
197a58d67af29d38fa37c94f59af37db9df75f349beJakob Stoklund Olesen
198a58d67af29d38fa37c94f59af37db9df75f349beJakob Stoklund Olesen  /// Verify the use list of all registers.
199a58d67af29d38fa37c94f59af37db9df75f349beJakob Stoklund Olesen  void verifyUseLists() const;
200a58d67af29d38fa37c94f59af37db9df75f349beJakob Stoklund Olesen
2016c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  /// reg_begin/reg_end - Provide iteration support to walk over all definitions
2026c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  /// and uses of a register within the MachineFunction that corresponds to this
2036c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  /// MachineRegisterInfo object.
20436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  template<bool Uses, bool Defs, bool SkipDebug,
20536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines           bool ByOperand, bool ByInstr, bool ByBundle>
206c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  class defusechain_iterator;
20736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  template<bool Uses, bool Defs, bool SkipDebug,
20836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines           bool ByOperand, bool ByInstr, bool ByBundle>
20936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  class defusechain_instr_iterator;
210c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner
211fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen  // Make it a friend so it can access getNextOperandForReg().
21236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  template<bool, bool, bool, bool, bool, bool>
21336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    friend class defusechain_iterator;
21436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  template<bool, bool, bool, bool, bool, bool>
21536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    friend class defusechain_instr_iterator;
21636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
21736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
218fdd6484b41ef0fa7eb8c995fb34b728b193c6258Jakob Stoklund Olesen
219c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// reg_iterator/reg_begin/reg_end - Walk all defs and uses of the specified
220c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// register.
22136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_iterator<true,true,false,true,false,false>
22236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          reg_iterator;
2236c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  reg_iterator reg_begin(unsigned RegNo) const {
2246c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner    return reg_iterator(getRegUseDefListHead(RegNo));
2256c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner  }
226dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static reg_iterator reg_end() { return reg_iterator(nullptr); }
227c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner
22836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<reg_iterator>  reg_operands(unsigned Reg) const {
22936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<reg_iterator>(reg_begin(Reg), reg_end());
23036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
23136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
23236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// reg_instr_iterator/reg_instr_begin/reg_instr_end - Walk all defs and uses
23336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// of the specified register, stepping by MachineInstr.
23436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,true,false,false,true,false>
23536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          reg_instr_iterator;
23636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_instr_iterator reg_instr_begin(unsigned RegNo) const {
23736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return reg_instr_iterator(getRegUseDefListHead(RegNo));
23836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
239dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static reg_instr_iterator reg_instr_end() {
240dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return reg_instr_iterator(nullptr);
241dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
24236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
24336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<reg_instr_iterator>
24436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_instructions(unsigned Reg) const {
24536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<reg_instr_iterator>(reg_instr_begin(Reg),
24636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                              reg_instr_end());
24736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
24836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
24936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// reg_bundle_iterator/reg_bundle_begin/reg_bundle_end - Walk all defs and uses
25036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// of the specified register, stepping by bundle.
25136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,true,false,false,false,true>
25236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          reg_bundle_iterator;
25336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_bundle_iterator reg_bundle_begin(unsigned RegNo) const {
25436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return reg_bundle_iterator(getRegUseDefListHead(RegNo));
25536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
256dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static reg_bundle_iterator reg_bundle_end() {
257dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return reg_bundle_iterator(nullptr);
258dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
25936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
26036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<reg_bundle_iterator> reg_bundles(unsigned Reg) const {
26136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<reg_bundle_iterator>(reg_bundle_begin(Reg),
26236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                               reg_bundle_end());
26336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
26436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
26500ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman  /// reg_empty - Return true if there are no instructions using or defining the
26600ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman  /// specified register (it may be live-in).
26700ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman  bool reg_empty(unsigned RegNo) const { return reg_begin(RegNo) == reg_end(); }
26800ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman
269c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  /// reg_nodbg_iterator/reg_nodbg_begin/reg_nodbg_end - Walk all defs and uses
270c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  /// of the specified register, skipping those marked as Debug.
27136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_iterator<true,true,true,true,false,false>
27236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          reg_nodbg_iterator;
273c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  reg_nodbg_iterator reg_nodbg_begin(unsigned RegNo) const {
274c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen    return reg_nodbg_iterator(getRegUseDefListHead(RegNo));
275c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  }
276dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static reg_nodbg_iterator reg_nodbg_end() {
277dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return reg_nodbg_iterator(nullptr);
278dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
279c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen
28036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<reg_nodbg_iterator>
28136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_nodbg_operands(unsigned Reg) const {
28236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<reg_nodbg_iterator>(reg_nodbg_begin(Reg),
28336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                              reg_nodbg_end());
28436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
28536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
28636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// reg_instr_nodbg_iterator/reg_instr_nodbg_begin/reg_instr_nodbg_end - Walk
28736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// all defs and uses of the specified register, stepping by MachineInstr,
28836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// skipping those marked as Debug.
28936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,true,true,false,true,false>
29036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          reg_instr_nodbg_iterator;
29136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_instr_nodbg_iterator reg_instr_nodbg_begin(unsigned RegNo) const {
29236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return reg_instr_nodbg_iterator(getRegUseDefListHead(RegNo));
29336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
29436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  static reg_instr_nodbg_iterator reg_instr_nodbg_end() {
295dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return reg_instr_nodbg_iterator(nullptr);
29636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
29736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
29836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<reg_instr_nodbg_iterator>
29936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_nodbg_instructions(unsigned Reg) const {
30036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<reg_instr_nodbg_iterator>(reg_instr_nodbg_begin(Reg),
30136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                                    reg_instr_nodbg_end());
30236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
30336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
30436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// reg_bundle_nodbg_iterator/reg_bundle_nodbg_begin/reg_bundle_nodbg_end - Walk
30536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// all defs and uses of the specified register, stepping by bundle,
30636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// skipping those marked as Debug.
30736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,true,true,false,false,true>
30836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          reg_bundle_nodbg_iterator;
30936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_bundle_nodbg_iterator reg_bundle_nodbg_begin(unsigned RegNo) const {
31036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return reg_bundle_nodbg_iterator(getRegUseDefListHead(RegNo));
31136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
31236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  static reg_bundle_nodbg_iterator reg_bundle_nodbg_end() {
313dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return reg_bundle_nodbg_iterator(nullptr);
31436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
31536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
31636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<reg_bundle_nodbg_iterator>
31736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  reg_nodbg_bundles(unsigned Reg) const {
31836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<reg_bundle_nodbg_iterator>(reg_bundle_nodbg_begin(Reg),
31936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                                     reg_bundle_nodbg_end());
32036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
32136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
322c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  /// reg_nodbg_empty - Return true if the only instructions using or defining
323c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  /// Reg are Debug instructions.
324c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  bool reg_nodbg_empty(unsigned RegNo) const {
325c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen    return reg_nodbg_begin(RegNo) == reg_nodbg_end();
326c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen  }
327c66c78c6846631a9f6a44fee69d218f900e63140Jakob Stoklund Olesen
328c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// def_iterator/def_begin/def_end - Walk all defs of the specified register.
32936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_iterator<false,true,false,true,false,false>
33036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          def_iterator;
331c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  def_iterator def_begin(unsigned RegNo) const {
332c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner    return def_iterator(getRegUseDefListHead(RegNo));
333c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  }
334dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static def_iterator def_end() { return def_iterator(nullptr); }
335c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner
33636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<def_iterator> def_operands(unsigned Reg) const {
33736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<def_iterator>(def_begin(Reg), def_end());
33836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
33936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
34036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// def_instr_iterator/def_instr_begin/def_instr_end - Walk all defs of the
34136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// specified register, stepping by MachineInst.
34236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<false,true,false,false,true,false>
34336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          def_instr_iterator;
34436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  def_instr_iterator def_instr_begin(unsigned RegNo) const {
34536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return def_instr_iterator(getRegUseDefListHead(RegNo));
34636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
347dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static def_instr_iterator def_instr_end() {
348dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return def_instr_iterator(nullptr);
349dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
35036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
35136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<def_instr_iterator>
35236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  def_instructions(unsigned Reg) const {
35336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<def_instr_iterator>(def_instr_begin(Reg),
35436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                              def_instr_end());
35536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
35636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
35736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// def_bundle_iterator/def_bundle_begin/def_bundle_end - Walk all defs of the
35836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// specified register, stepping by bundle.
35936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<false,true,false,false,false,true>
36036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          def_bundle_iterator;
36136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  def_bundle_iterator def_bundle_begin(unsigned RegNo) const {
36236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return def_bundle_iterator(getRegUseDefListHead(RegNo));
36336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
364dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static def_bundle_iterator def_bundle_end() {
365dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return def_bundle_iterator(nullptr);
366dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
36736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
36836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<def_bundle_iterator> def_bundles(unsigned Reg) const {
36936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<def_bundle_iterator>(def_bundle_begin(Reg),
37036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                               def_bundle_end());
37136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
37236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
37300ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman  /// def_empty - Return true if there are no instructions defining the
37400ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman  /// specified register (it may be live-in).
37500ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman  bool def_empty(unsigned RegNo) const { return def_begin(RegNo) == def_end(); }
37600ffd505d327782eb51fa55e47967fd8e62ba40aDan Gohman
3770492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick  /// hasOneDef - Return true if there is exactly one instruction defining the
3780492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick  /// specified register.
3790492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick  bool hasOneDef(unsigned RegNo) const {
3800492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick    def_iterator DI = def_begin(RegNo);
3810492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick    if (DI == def_end())
3820492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick      return false;
3830492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick    return ++DI == def_end();
3840492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick  }
3850492a8c530df6c7b2ebcfa91fed930c1a1bf664dAndrew Trick
386c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// use_iterator/use_begin/use_end - Walk all uses of the specified register.
38736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_iterator<true,false,false,true,false,false>
38836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          use_iterator;
389c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  use_iterator use_begin(unsigned RegNo) const {
390c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner    return use_iterator(getRegUseDefListHead(RegNo));
391c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  }
392dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static use_iterator use_end() { return use_iterator(nullptr); }
39390019479f9a3868d8be90564695097a61a725438Andrew Trick
39436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<use_iterator> use_operands(unsigned Reg) const {
39536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<use_iterator>(use_begin(Reg), use_end());
39636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
39736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
39836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// use_instr_iterator/use_instr_begin/use_instr_end - Walk all uses of the
39936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// specified register, stepping by MachineInstr.
40036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,false,false,false,true,false>
40136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          use_instr_iterator;
40236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_instr_iterator use_instr_begin(unsigned RegNo) const {
40336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return use_instr_iterator(getRegUseDefListHead(RegNo));
40436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
405dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static use_instr_iterator use_instr_end() {
406dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return use_instr_iterator(nullptr);
407dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
40836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
40936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<use_instr_iterator>
41036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_instructions(unsigned Reg) const {
41136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<use_instr_iterator>(use_instr_begin(Reg),
41236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                              use_instr_end());
41336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
41436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
41536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// use_bundle_iterator/use_bundle_begin/use_bundle_end - Walk all uses of the
41636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// specified register, stepping by bundle.
41736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,false,false,false,false,true>
41836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          use_bundle_iterator;
41936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_bundle_iterator use_bundle_begin(unsigned RegNo) const {
42036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return use_bundle_iterator(getRegUseDefListHead(RegNo));
42136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
422dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static use_bundle_iterator use_bundle_end() {
423dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return use_bundle_iterator(nullptr);
424dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
42536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
42636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<use_bundle_iterator> use_bundles(unsigned Reg) const {
42736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<use_bundle_iterator>(use_bundle_begin(Reg),
42836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                               use_bundle_end());
42936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
43036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
431ce049437d6986cfb4c0dba6bf99cadd8c301351aEvan Cheng  /// use_empty - Return true if there are no instructions using the specified
432ce049437d6986cfb4c0dba6bf99cadd8c301351aEvan Cheng  /// register.
433ce049437d6986cfb4c0dba6bf99cadd8c301351aEvan Cheng  bool use_empty(unsigned RegNo) const { return use_begin(RegNo) == use_end(); }
434ce049437d6986cfb4c0dba6bf99cadd8c301351aEvan Cheng
4351423c70b8f1b1a757c640fac9a17cb015012e8e9Evan Cheng  /// hasOneUse - Return true if there is exactly one instruction using the
4361423c70b8f1b1a757c640fac9a17cb015012e8e9Evan Cheng  /// specified register.
437269120cd9b45b24665433ea28eb7d092c138ca76Andrew Trick  bool hasOneUse(unsigned RegNo) const {
438269120cd9b45b24665433ea28eb7d092c138ca76Andrew Trick    use_iterator UI = use_begin(RegNo);
439269120cd9b45b24665433ea28eb7d092c138ca76Andrew Trick    if (UI == use_end())
440269120cd9b45b24665433ea28eb7d092c138ca76Andrew Trick      return false;
441269120cd9b45b24665433ea28eb7d092c138ca76Andrew Trick    return ++UI == use_end();
442269120cd9b45b24665433ea28eb7d092c138ca76Andrew Trick  }
4431423c70b8f1b1a757c640fac9a17cb015012e8e9Evan Cheng
444a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  /// use_nodbg_iterator/use_nodbg_begin/use_nodbg_end - Walk all uses of the
445a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  /// specified register, skipping those marked as Debug.
44636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_iterator<true,false,true,true,false,false>
44736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          use_nodbg_iterator;
448a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  use_nodbg_iterator use_nodbg_begin(unsigned RegNo) const {
449a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen    return use_nodbg_iterator(getRegUseDefListHead(RegNo));
450a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  }
451dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  static use_nodbg_iterator use_nodbg_end() {
452dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return use_nodbg_iterator(nullptr);
453dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines  }
45490019479f9a3868d8be90564695097a61a725438Andrew Trick
45536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<use_nodbg_iterator>
45636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_nodbg_operands(unsigned Reg) const {
45736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<use_nodbg_iterator>(use_nodbg_begin(Reg),
45836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                              use_nodbg_end());
45936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
46036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
46136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// use_instr_nodbg_iterator/use_instr_nodbg_begin/use_instr_nodbg_end - Walk
46236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// all uses of the specified register, stepping by MachineInstr, skipping
46336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// those marked as Debug.
46436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,false,true,false,true,false>
46536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          use_instr_nodbg_iterator;
46636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_instr_nodbg_iterator use_instr_nodbg_begin(unsigned RegNo) const {
46736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return use_instr_nodbg_iterator(getRegUseDefListHead(RegNo));
46836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
46936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  static use_instr_nodbg_iterator use_instr_nodbg_end() {
470dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return use_instr_nodbg_iterator(nullptr);
47136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
47236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
47336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<use_instr_nodbg_iterator>
47436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_nodbg_instructions(unsigned Reg) const {
47536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<use_instr_nodbg_iterator>(use_instr_nodbg_begin(Reg),
47636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                                    use_instr_nodbg_end());
47736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
47836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
47936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// use_bundle_nodbg_iterator/use_bundle_nodbg_begin/use_bundle_nodbg_end - Walk
48036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// all uses of the specified register, stepping by bundle, skipping
48136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// those marked as Debug.
48236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  typedef defusechain_instr_iterator<true,false,true,false,false,true>
48336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          use_bundle_nodbg_iterator;
48436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_bundle_nodbg_iterator use_bundle_nodbg_begin(unsigned RegNo) const {
48536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return use_bundle_nodbg_iterator(getRegUseDefListHead(RegNo));
48636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
48736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  static use_bundle_nodbg_iterator use_bundle_nodbg_end() {
488dce4a407a24b04eebc6a376f8e62b41aaa7b071fStephen Hines    return use_bundle_nodbg_iterator(nullptr);
48936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
49036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
49136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  inline iterator_range<use_bundle_nodbg_iterator>
49236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  use_nodbg_bundles(unsigned Reg) const {
49336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines    return iterator_range<use_bundle_nodbg_iterator>(use_bundle_nodbg_begin(Reg),
49436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines                                                     use_bundle_nodbg_end());
49536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  }
49636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
497a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  /// use_nodbg_empty - Return true if there are no non-Debug instructions
498a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  /// using the specified register.
499a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  bool use_nodbg_empty(unsigned RegNo) const {
500a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen    return use_nodbg_begin(RegNo) == use_nodbg_end();
501a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  }
502a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen
5031423c70b8f1b1a757c640fac9a17cb015012e8e9Evan Cheng  /// hasOneNonDBGUse - Return true if there is exactly one non-Debug
5041423c70b8f1b1a757c640fac9a17cb015012e8e9Evan Cheng  /// instruction using the specified register.
5051423c70b8f1b1a757c640fac9a17cb015012e8e9Evan Cheng  bool hasOneNonDBGUse(unsigned RegNo) const;
5061423c70b8f1b1a757c640fac9a17cb015012e8e9Evan Cheng
507e138b3dd1ff02d826233482831318708a166ed93Chris Lattner  /// replaceRegWith - Replace all instances of FromReg with ToReg in the
508e138b3dd1ff02d826233482831318708a166ed93Chris Lattner  /// machine function.  This is like llvm-level X->replaceAllUsesWith(Y),
509e138b3dd1ff02d826233482831318708a166ed93Chris Lattner  /// except that it also changes any definitions of the register as well.
5104007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  ///
5114007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  /// Note that it is usually necessary to first constrain ToReg's register
5124007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  /// class to match the FromReg constraints using:
5134007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  ///
5144007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  ///   constrainRegClass(ToReg, getRegClass(FromReg))
5154007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  ///
5164007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  /// That function will return NULL if the virtual registers have incompatible
5174007529d4b014f43a1c7089f9b285a67c1c9b853Jakob Stoklund Olesen  /// constraints.
518e138b3dd1ff02d826233482831318708a166ed93Chris Lattner  void replaceRegWith(unsigned FromReg, unsigned ToReg);
51990019479f9a3868d8be90564695097a61a725438Andrew Trick
5201eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng  /// getVRegDef - Return the machine instr that defines the specified virtual
5211eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng  /// register or null if none is found.  This assumes that the code is in SSA
5221eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng  /// form, so there should only be one definition.
5231eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng  MachineInstr *getVRegDef(unsigned Reg) const;
52449b4589978ca181537c8ae694ac4c8d58d27a09aDan Gohman
52554d69668b22b8c37aa6e45f14445f3988cc430d4Manman Ren  /// getUniqueVRegDef - Return the unique machine instr that defines the
52654d69668b22b8c37aa6e45f14445f3988cc430d4Manman Ren  /// specified virtual register or null if none is found.  If there are
52754d69668b22b8c37aa6e45f14445f3988cc430d4Manman Ren  /// multiple definitions or no definition, return null.
52854d69668b22b8c37aa6e45f14445f3988cc430d4Manman Ren  MachineInstr *getUniqueVRegDef(unsigned Reg) const;
52954d69668b22b8c37aa6e45f14445f3988cc430d4Manman Ren
53049b4589978ca181537c8ae694ac4c8d58d27a09aDan Gohman  /// clearKillFlags - Iterate over all the uses of the given register and
53149b4589978ca181537c8ae694ac4c8d58d27a09aDan Gohman  /// clear the kill flag from the MachineOperand. This function is used by
53249b4589978ca181537c8ae694ac4c8d58d27a09aDan Gohman  /// optimization passes which extend register lifetimes and need only
53349b4589978ca181537c8ae694ac4c8d58d27a09aDan Gohman  /// preserve conservative kill flag information.
53449b4589978ca181537c8ae694ac4c8d58d27a09aDan Gohman  void clearKillFlags(unsigned Reg) const;
53590019479f9a3868d8be90564695097a61a725438Andrew Trick
5361eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng#ifndef NDEBUG
5371eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng  void dumpUses(unsigned RegNo) const;
5381eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng#endif
539c035c940a656f34a58ebe22fcc5f9b2a7d8e97fbJakob Stoklund Olesen
540c035c940a656f34a58ebe22fcc5f9b2a7d8e97fbJakob Stoklund Olesen  /// isConstantPhysReg - Returns true if PhysReg is unallocatable and constant
541c035c940a656f34a58ebe22fcc5f9b2a7d8e97fbJakob Stoklund Olesen  /// throughout the function.  It is safe to move instructions that read such
542c035c940a656f34a58ebe22fcc5f9b2a7d8e97fbJakob Stoklund Olesen  /// a physreg.
543c035c940a656f34a58ebe22fcc5f9b2a7d8e97fbJakob Stoklund Olesen  bool isConstantPhysReg(unsigned PhysReg, const MachineFunction &MF) const;
544c035c940a656f34a58ebe22fcc5f9b2a7d8e97fbJakob Stoklund Olesen
545238bf5ada19ee411c1decff68e140966f7baf479Andrew Trick  /// Get an iterator over the pressure sets affected by the given physical or
546238bf5ada19ee411c1decff68e140966f7baf479Andrew Trick  /// virtual register. If RegUnit is physical, it must be a register unit (from
547238bf5ada19ee411c1decff68e140966f7baf479Andrew Trick  /// MCRegUnitIterator).
548238bf5ada19ee411c1decff68e140966f7baf479Andrew Trick  PSetIterator getPressureSets(unsigned RegUnit) const;
549238bf5ada19ee411c1decff68e140966f7baf479Andrew Trick
55084bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  //===--------------------------------------------------------------------===//
55184bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  // Virtual Register Info
55284bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  //===--------------------------------------------------------------------===//
55390019479f9a3868d8be90564695097a61a725438Andrew Trick
55484bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// getRegClass - Return the register class of the specified virtual register.
55511a26f3697ea6520022ea6d3fa6a07b3c1b988cdEvan Cheng  ///
5561eb5cf9c7d0b0b04402eddc007b0de414488baf4Evan Cheng  const TargetRegisterClass *getRegClass(unsigned Reg) const {
55762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner    return VRegInfo[Reg].first;
55884bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  }
559bdf34bc12bfc39de02c19fa250e83edb5924a6cfEvan Cheng
560bdf34bc12bfc39de02c19fa250e83edb5924a6cfEvan Cheng  /// setRegClass - Set the register class of the specified virtual register.
56111a26f3697ea6520022ea6d3fa6a07b3c1b988cdEvan Cheng  ///
56233f1c68cba4e905fdd2bf7d2848c52052d46fbffDan Gohman  void setRegClass(unsigned Reg, const TargetRegisterClass *RC);
56311a26f3697ea6520022ea6d3fa6a07b3c1b988cdEvan Cheng
564bf4699c56100a0184bbe4fb53937c7204ca1ceb0Jakob Stoklund Olesen  /// constrainRegClass - Constrain the register class of the specified virtual
56591fb536a345dc268e5b73dbddb9bee4cba87b28fJakob Stoklund Olesen  /// register to be a common subclass of RC and the current register class,
56691fb536a345dc268e5b73dbddb9bee4cba87b28fJakob Stoklund Olesen  /// but only if the new class has at least MinNumRegs registers.  Return the
56791fb536a345dc268e5b73dbddb9bee4cba87b28fJakob Stoklund Olesen  /// new register class, or NULL if no such class exists.
568bf4699c56100a0184bbe4fb53937c7204ca1ceb0Jakob Stoklund Olesen  /// This should only be used when the constraint is known to be trivial, like
569bf4699c56100a0184bbe4fb53937c7204ca1ceb0Jakob Stoklund Olesen  /// GR32 -> GR32_NOSP. Beware of increasing register pressure.
5706d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  ///
571bf4699c56100a0184bbe4fb53937c7204ca1ceb0Jakob Stoklund Olesen  const TargetRegisterClass *constrainRegClass(unsigned Reg,
57291fb536a345dc268e5b73dbddb9bee4cba87b28fJakob Stoklund Olesen                                               const TargetRegisterClass *RC,
57391fb536a345dc268e5b73dbddb9bee4cba87b28fJakob Stoklund Olesen                                               unsigned MinNumRegs = 0);
574bf4699c56100a0184bbe4fb53937c7204ca1ceb0Jakob Stoklund Olesen
5756d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  /// recomputeRegClass - Try to find a legal super-class of Reg's register
5766d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  /// class that still satisfies the constraints from the instructions using
5776d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  /// Reg.  Returns true if Reg was upgraded.
5786d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  ///
5796d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  /// This method can be used after constraints have been removed from a
5806d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  /// virtual register, for example after removing instructions or splitting
5816d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  /// the live range.
5826d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  ///
5836d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen  bool recomputeRegClass(unsigned Reg, const TargetMachine&);
5846d1fd0b979cb88809ebb77a24f4da69e1d67606bJakob Stoklund Olesen
58584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// createVirtualRegister - Create and return a new virtual register in the
58684bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// function with the specified register class.
58784bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  ///
5882e3e5bf42742a7421b513829101501f2de6d2b02Dan Gohman  unsigned createVirtualRegister(const TargetRegisterClass *RegClass);
58984bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner
590b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen  /// getNumVirtRegs - Return the number of virtual registers created.
591b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen  ///
592b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen  unsigned getNumVirtRegs() const { return VRegInfo.size(); }
593b421c566f512ed0ec87851866d335e9086c3f8beJakob Stoklund Olesen
59419273aec441411b4d571fdb87c6daa0fbe7a33a0Andrew Trick  /// clearVirtRegs - Remove all virtual registers (after physreg assignment).
59519273aec441411b4d571fdb87c6daa0fbe7a33a0Andrew Trick  void clearVirtRegs();
59619273aec441411b4d571fdb87c6daa0fbe7a33a0Andrew Trick
59790f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  /// setRegAllocationHint - Specify a register allocation hint for the
59890f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  /// specified virtual register.
599358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng  void setRegAllocationHint(unsigned Reg, unsigned Type, unsigned PrefReg) {
60090f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng    RegAllocHints[Reg].first  = Type;
60190f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng    RegAllocHints[Reg].second = PrefReg;
60290f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  }
60390f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng
60490f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  /// getRegAllocationHint - Return the register allocation hint for the
60590f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  /// specified virtual register.
606358dec51804ee52e47ea3a47c9248086e458ad7cEvan Cheng  std::pair<unsigned, unsigned>
60790f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  getRegAllocationHint(unsigned Reg) const {
60890f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng    return RegAllocHints[Reg];
60990f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng  }
61090f95f88c6ce09c6744777dc9d140c3c77203b92Evan Cheng
61151458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen  /// getSimpleHint - Return the preferred register allocation hint, or 0 if a
61251458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen  /// standard simple hint (Type == 0) is not set.
61351458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen  unsigned getSimpleHint(unsigned Reg) const {
61451458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen    std::pair<unsigned, unsigned> Hint = getRegAllocationHint(Reg);
61551458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen    return Hint.first ? 0 : Hint.second;
61651458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen  }
61751458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen
61836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// markUsesInDebugValueAsUndef - Mark every DBG_VALUE referencing the
61936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// specified register as undefined which causes the DBG_VALUE to be
62036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  /// deleted during LiveDebugVariables analysis.
62136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  void markUsesInDebugValueAsUndef(unsigned Reg) const;
62251458ed09e6db0e424cd528e10b879f59915abe4Jakob Stoklund Olesen
62384bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  //===--------------------------------------------------------------------===//
62484bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  // Physical Register Use Info
62584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  //===--------------------------------------------------------------------===//
62690019479f9a3868d8be90564695097a61a725438Andrew Trick
62784bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// isPhysRegUsed - Return true if the specified register is used in this
6289aa6e0a134358c681cc5918ec65b1ec9726b778eJakob Stoklund Olesen  /// function. Also check for clobbered aliases and registers clobbered by
6299aa6e0a134358c681cc5918ec65b1ec9726b778eJakob Stoklund Olesen  /// function calls with register mask operands.
6309aa6e0a134358c681cc5918ec65b1ec9726b778eJakob Stoklund Olesen  ///
6319aa6e0a134358c681cc5918ec65b1ec9726b778eJakob Stoklund Olesen  /// This only works after register allocation. It is primarily used by
6329aa6e0a134358c681cc5918ec65b1ec9726b778eJakob Stoklund Olesen  /// PrologEpilogInserter to determine which callee-saved registers need
6339aa6e0a134358c681cc5918ec65b1ec9726b778eJakob Stoklund Olesen  /// spilling.
634d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  bool isPhysRegUsed(unsigned Reg) const {
635d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen    if (UsedPhysRegMask.test(Reg))
636d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen      return true;
637d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling    for (MCRegUnitIterator Units(Reg, getTargetRegisterInfo());
638d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling         Units.isValid(); ++Units)
6394b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen      if (UsedRegUnits.test(*Units))
640a2a98fd0ddd2ae277be7cdd62aae92f6c5155e07Jakob Stoklund Olesen        return true;
641a2a98fd0ddd2ae277be7cdd62aae92f6c5155e07Jakob Stoklund Olesen    return false;
642a2a98fd0ddd2ae277be7cdd62aae92f6c5155e07Jakob Stoklund Olesen  }
643a2a98fd0ddd2ae277be7cdd62aae92f6c5155e07Jakob Stoklund Olesen
644601158a18e325879b224bd1979d824407ed98bc7Jakob Stoklund Olesen  /// Mark the specified register unit as used in this function.
645601158a18e325879b224bd1979d824407ed98bc7Jakob Stoklund Olesen  /// This should only be called during and after register allocation.
646601158a18e325879b224bd1979d824407ed98bc7Jakob Stoklund Olesen  void setRegUnitUsed(unsigned RegUnit) {
647601158a18e325879b224bd1979d824407ed98bc7Jakob Stoklund Olesen    UsedRegUnits.set(RegUnit);
648601158a18e325879b224bd1979d824407ed98bc7Jakob Stoklund Olesen  }
649601158a18e325879b224bd1979d824407ed98bc7Jakob Stoklund Olesen
65084bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// setPhysRegUsed - Mark the specified register used in this function.
65184bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// This should only be called during and after register allocation.
6524b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  void setPhysRegUsed(unsigned Reg) {
653d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling    for (MCRegUnitIterator Units(Reg, getTargetRegisterInfo());
654d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling         Units.isValid(); ++Units)
6554b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen      UsedRegUnits.set(*Units);
6564b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen  }
65782b07dc4995d48065bd95affff4d8513a5cad4f2Jakob Stoklund Olesen
658d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  /// addPhysRegsUsedFromRegMask - Mark any registers not in RegMask as used.
659d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  /// This corresponds to the bit mask attached to register mask operands.
660d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  void addPhysRegsUsedFromRegMask(const uint32_t *RegMask) {
661d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen    UsedPhysRegMask.setBitsNotInMask(RegMask);
662d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  }
663d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen
66484bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// setPhysRegUnused - Mark the specified register unused in this function.
66584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// This should only be called during and after register allocation.
666d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  void setPhysRegUnused(unsigned Reg) {
667d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen    UsedPhysRegMask.reset(Reg);
668d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling    for (MCRegUnitIterator Units(Reg, getTargetRegisterInfo());
669d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling         Units.isValid(); ++Units)
6704b1aa961fdbb75035a963f8c6a01c8c5f1dc3f16Jakob Stoklund Olesen      UsedRegUnits.reset(*Units);
671d9f0ff56a1878347fe5a0f162ef8c2ef2b63aeb5Jakob Stoklund Olesen  }
67284bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner
673d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen
674d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  //===--------------------------------------------------------------------===//
675d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  // Reserved Register Info
676d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  //===--------------------------------------------------------------------===//
677d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  //
678d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  // The set of reserved registers must be invariant during register
679d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  // allocation.  For example, the target cannot suddenly decide it needs a
680d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  // frame pointer when the register allocator has already used the frame
681d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  // pointer register for something else.
682d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  //
683d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  // These methods can be used by target hooks like hasFP() to avoid changing
684d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  // the reserved register set during register allocation.
685d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen
686d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// freezeReservedRegs - Called by the register allocator to freeze the set
687d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// of reserved registers before allocation begins.
688d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  void freezeReservedRegs(const MachineFunction&);
689d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen
690d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// reservedRegsFrozen - Returns true after freezeReservedRegs() was called
691d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// to ensure the set of reserved registers stays constant.
692d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  bool reservedRegsFrozen() const {
693d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen    return !ReservedRegs.empty();
694d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  }
695d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen
696d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// canReserveReg - Returns true if PhysReg can be used as a reserved
697d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// register.  Any register can be reserved before freezeReservedRegs() is
698d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  /// called.
699d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  bool canReserveReg(unsigned PhysReg) const {
700d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen    return !reservedRegsFrozen() || ReservedRegs.test(PhysReg);
701d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen  }
702d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen
703e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// getReservedRegs - Returns a reference to the frozen set of reserved
704e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// registers. This method should always be preferred to calling
705e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// TRI::getReservedRegs() when possible.
706e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  const BitVector &getReservedRegs() const {
707e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen    assert(reservedRegsFrozen() &&
708e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen           "Reserved registers haven't been frozen yet. "
709e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen           "Use TRI::getReservedRegs().");
710e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen    return ReservedRegs;
711e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  }
712e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen
713e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// isReserved - Returns true when PhysReg is a reserved register.
714e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  ///
715e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// Reserved registers may belong to an allocatable register class, but the
716e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// target has explicitly requested that they are not used.
717e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  ///
718e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  bool isReserved(unsigned PhysReg) const {
719e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen    return getReservedRegs().test(PhysReg);
720e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  }
721e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen
722e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// isAllocatable - Returns true when PhysReg belongs to an allocatable
723e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// register class and it hasn't been reserved.
724e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  ///
725e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// Allocatable registers may show up in the allocation order of some virtual
726e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// register, so a register allocator needs to track its liveness and
727e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  /// availability.
728e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  bool isAllocatable(unsigned PhysReg) const {
729d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling    return getTargetRegisterInfo()->isInAllocatableClass(PhysReg) &&
730d10fa8b1caf010fe4943ae5526c2c3b921339f72Bill Wendling      !isReserved(PhysReg);
731e4f273908bd37df5f0f6b2c575dcb2af99f6b85bJakob Stoklund Olesen  }
732d9e5c764bfea339fc5082bf17e558db959fd6d28Jakob Stoklund Olesen
73384bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  //===--------------------------------------------------------------------===//
7346acbcd423b2ace94bb13c0de9d98ea66c5dbe00cEli Bendersky  // LiveIn Management
73584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  //===--------------------------------------------------------------------===//
73690019479f9a3868d8be90564695097a61a725438Andrew Trick
7376acbcd423b2ace94bb13c0de9d98ea66c5dbe00cEli Bendersky  /// addLiveIn - Add the specified register as a live-in.  Note that it
73884bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  /// is an error to add the same register to the same set more than once.
73984bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  void addLiveIn(unsigned Reg, unsigned vreg = 0) {
74084bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner    LiveIns.push_back(std::make_pair(Reg, vreg));
74184bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  }
74290019479f9a3868d8be90564695097a61a725438Andrew Trick
7436acbcd423b2ace94bb13c0de9d98ea66c5dbe00cEli Bendersky  // Iteration support for the live-ins set.  It's kept in sorted order
7446acbcd423b2ace94bb13c0de9d98ea66c5dbe00cEli Bendersky  // by register number.
74584bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  typedef std::vector<std::pair<unsigned,unsigned> >::const_iterator
74684bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  livein_iterator;
74784bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  livein_iterator livein_begin() const { return LiveIns.begin(); }
74884bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  livein_iterator livein_end()   const { return LiveIns.end(); }
74984bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner  bool            livein_empty() const { return LiveIns.empty(); }
7506d69ba8a6901c69d78488cbc41f8dbf080618fdeDan Gohman
75113e73f483ef2ba630962dad3125393292533b756Dan Gohman  bool isLiveIn(unsigned Reg) const;
7526d69ba8a6901c69d78488cbc41f8dbf080618fdeDan Gohman
7532ad0fcf794924f618a7240741cc14a39be99d0f2Evan Cheng  /// getLiveInPhysReg - If VReg is a live-in virtual register, return the
7542ad0fcf794924f618a7240741cc14a39be99d0f2Evan Cheng  /// corresponding live-in physical register.
7552ad0fcf794924f618a7240741cc14a39be99d0f2Evan Cheng  unsigned getLiveInPhysReg(unsigned VReg) const;
7562ad0fcf794924f618a7240741cc14a39be99d0f2Evan Cheng
7573946043a80a043b3cf43b34bf068feaadc46485bEvan Cheng  /// getLiveInVirtReg - If PReg is a live-in physical register, return the
7583946043a80a043b3cf43b34bf068feaadc46485bEvan Cheng  /// corresponding live-in physical register.
7593946043a80a043b3cf43b34bf068feaadc46485bEvan Cheng  unsigned getLiveInVirtReg(unsigned PReg) const;
7603946043a80a043b3cf43b34bf068feaadc46485bEvan Cheng
76198708260f55cab997a5db77e930a2bd35f4172aaDan Gohman  /// EmitLiveInCopies - Emit copies to initialize livein virtual registers
76298708260f55cab997a5db77e930a2bd35f4172aaDan Gohman  /// into the given entry block.
76398708260f55cab997a5db77e930a2bd35f4172aaDan Gohman  void EmitLiveInCopies(MachineBasicBlock *EntryMBB,
76498708260f55cab997a5db77e930a2bd35f4172aaDan Gohman                        const TargetRegisterInfo &TRI,
76598708260f55cab997a5db77e930a2bd35f4172aaDan Gohman                        const TargetInstrInfo &TII);
76698708260f55cab997a5db77e930a2bd35f4172aaDan Gohman
767c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// defusechain_iterator - This class provides iterator support for machine
768c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// operands in the function that use or define a specific register.  If
769c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// ReturnUses is true it returns uses of registers, if ReturnDefs is true it
770c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  /// returns defs.  If neither are true then you are silly and it always
771a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  /// returns end().  If SkipDebug is true it skips uses marked Debug
772a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen  /// when incrementing.
77336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines  template<bool ReturnUses, bool ReturnDefs, bool SkipDebug,
77436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines           bool ByOperand, bool ByInstr, bool ByBundle>
775c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner  class defusechain_iterator
776f0891be8bdbeeadb39da5575273b6645755fa383Gabor Greif    : public std::iterator<std::forward_iterator_tag, MachineInstr, ptrdiff_t> {
7776c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner    MachineOperand *Op;
7781327f69d98a2cb527b275ffc93080cf31ddf6dc5Dan Gohman    explicit defusechain_iterator(MachineOperand *op) : Op(op) {
779c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner      // If the first node isn't one we're interested in, advance to one that
780c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner      // we are interested in.
781c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner      if (op) {
782ae9f3a3b7c915f725aef5a7250e88eaeddda03c6Anton Korobeynikov        if ((!ReturnUses && op->isUse()) ||
783a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen            (!ReturnDefs && op->isDef()) ||
784a65aa0f0bba1ef2322d63d05c074a92168684c63Dale Johannesen            (SkipDebug && op->isDebug()))
78536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines          advance();
786c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner      }
787c637d6f4525e417260cf2ce08643dc62283e523fChris Lattner    }
7886c5757e4e85bb190097be13c1630bb107a1fbcfeChris Lattner    friend class MachineRegisterInfo;
78936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines
79036b56886974eae4f9c5ebc96befd3e7bfe5de338