TargetInstrInfo.h revision 551ccae044b0ff658fe629dd67edd5ffe75d10e8
1075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner//===-- llvm/Target/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===// 26fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 56fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// This file was developed by the LLVM research group and is distributed under 66fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// the University of Illinois Open Source License. See LICENSE.TXT for details. 76fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 10a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// This file describes the target machine instructions to the code generator. 11a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 12f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner//===----------------------------------------------------------------------===// 13a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 143501feab811c86c9659248a4875fc31a3165f84dChris Lattner#ifndef LLVM_TARGET_TARGETINSTRINFO_H 153501feab811c86c9659248a4875fc31a3165f84dChris Lattner#define LLVM_TARGET_TARGETINSTRINFO_H 16a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 17905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos#include "llvm/CodeGen/MachineBasicBlock.h" 18551ccae044b0ff658fe629dd67edd5ffe75d10e8Reid Spencer#include "llvm/Support/DataTypes.h" 192cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner#include <vector> 20be67780f31958b05ad3c510ca3a973d327517e86Chris Lattner#include <cassert> 21a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 22d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 23d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 245684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass MachineInstr; 25f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattnerclass TargetMachine; 265684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Value; 27588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adveclass Type; 285684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Instruction; 292cc214c06cbb94f95928636981c9805d6300cff1Chris Lattnerclass Constant; 30e7506a366e8bd56c97d10beb68e4db953aebaecaChris Lattnerclass Function; 31c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adveclass MachineCodeForInstruction; 32a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 33f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 34f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner// Data types used to define information about a single machine instruction 35f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 36a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 37ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenostypedef short MachineOpCode; 38c188b733babbcdb0ff51613d0bb133e0496963b6Chris Lattnertypedef unsigned InstrSchedClass; 39a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 40a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//--------------------------------------------------------------------------- 413501feab811c86c9659248a4875fc31a3165f84dChris Lattner// struct TargetInstrDescriptor: 42a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Predefined information about each machine instruction. 43a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Designed to initialized statically. 443501feab811c86c9659248a4875fc31a3165f84dChris Lattner// 45a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 46075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_NOP_FLAG = 1 << 0; 47075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_BRANCH_FLAG = 1 << 1; 48075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CALL_FLAG = 1 << 2; 49075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_RET_FLAG = 1 << 3; 502441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattnerconst unsigned M_BARRIER_FLAG = 1 << 4; 51075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CC_FLAG = 1 << 6; 52075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_LOAD_FLAG = 1 << 10; 53075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_STORE_FLAG = 1 << 12; 549ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub 55075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_2_ADDR_FLAG = 1 << 15; 56a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 57075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// M_TERMINATOR_FLAG - Is this instruction part of the terminator for a basic 58075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// block? Typically this is things like return and branch instructions. 59075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// Various passes use this to insert code into the bottom of a basic block, but 60075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// before control flow occurs. 61075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_TERMINATOR_FLAG = 1 << 16; 62075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner 63075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerstruct TargetInstrDescriptor { 644683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char * Name; // Assembly language mnemonic for the opcode. 65c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int numOperands; // Number of args; -1 if variable #args 66c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int resultPos; // Position of the result; -1 if no result 67e28adaa633393d5beea7f8e97951cbe1e3cd1646Brian Gaeke unsigned maxImmedConst; // Largest +ve constant in IMMED field or 0. 68697954c15da58bd8b186dbafdedd8b06db770201Chris Lattner bool immedIsSignExtended; // Is IMMED field sign-extended? If so, 6975e961ae6b2e2801160e560057ad97ece4443986Chris Lattner // smallest -ve value is -(maxImmedConst+1). 70c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numDelaySlots; // Number of delay slots after instruction 7175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned latency; // Latency in machine cycles 7275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner InstrSchedClass schedClass; // enum identifying instr sched class 7375e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned Flags; // flags identifying machine instr class 7475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned TSFlags; // Target Specific Flag values 75f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitUses; // Registers implicitly read by this instr 76f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitDefs; // Registers implicitly defined by this instr 77a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 78a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 79a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 803501feab811c86c9659248a4875fc31a3165f84dChris Lattner//--------------------------------------------------------------------------- 813501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// 823501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// TargetInstrInfo - Interface to description of machine instructions 833501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// 84075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerclass TargetInstrInfo { 85075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner const TargetInstrDescriptor* desc; // raw array to allow static init'n 86bceb68807fdb86c794bc8d8f8aef0940f12c2cebChris Lattner unsigned NumOpcodes; // number of entries in the desc array 87075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned numRealOpCodes; // number of non-dummy op codes 88a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 89075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner TargetInstrInfo(const TargetInstrInfo &); // DO NOT IMPLEMENT 90075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner void operator=(const TargetInstrInfo &); // DO NOT IMPLEMENT 91a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Advepublic: 92bceb68807fdb86c794bc8d8f8aef0940f12c2cebChris Lattner TargetInstrInfo(const TargetInstrDescriptor *desc, unsigned NumOpcodes); 93075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner virtual ~TargetInstrInfo(); 9470535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner 959ca5a2a33e98b0a93dc335a00f4d63aeb9a192b8Chris Lattner // Invariant: All instruction sets use opcode #0 as the PHI instruction 969ca5a2a33e98b0a93dc335a00f4d63aeb9a192b8Chris Lattner enum { PHI = 0 }; 97a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 98bceb68807fdb86c794bc8d8f8aef0940f12c2cebChris Lattner unsigned getNumOpcodes() const { return NumOpcodes; } 99a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 100e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// get - Return the machine instruction descriptor that corresponds to the 101e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// specified instruction opcode. 102e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// 1032441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const TargetInstrDescriptor& get(MachineOpCode Opcode) const { 1042441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner assert((unsigned)Opcode < NumOpcodes); 1052441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return desc[Opcode]; 106a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 1074683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner 1082441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const char *getName(MachineOpCode Opcode) const { 1092441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Name; 1104683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner } 111a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 1122441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner int getNumOperands(MachineOpCode Opcode) const { 1132441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).numOperands; 114a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 115450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 116450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 1172441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner InstrSchedClass getSchedClass(MachineOpCode Opcode) const { 1182441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).schedClass; 119a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 120d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 1212441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const unsigned *getImplicitUses(MachineOpCode Opcode) const { 1222441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).ImplicitUses; 123d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 124d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 1252441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const unsigned *getImplicitDefs(MachineOpCode Opcode) const { 1262441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).ImplicitDefs; 127d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 128d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 129450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 130a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 131a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Query instruction class flags according to the machine-independent 132a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // flags listed above. 133a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 1342441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isReturn(MachineOpCode Opcode) const { 1352441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_RET_FLAG; 136a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 137450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 1382441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isTwoAddrInstr(MachineOpCode Opcode) const { 1392441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_2_ADDR_FLAG; 1409ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman } 141075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isTerminatorInstr(unsigned Opcode) const { 142075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner return get(Opcode).Flags & M_TERMINATOR_FLAG; 143075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner } 144d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 1450cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// Return true if the instruction is a register to register move 1460cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// and leave the source and dest operands in the passed parameters. 1475e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos virtual bool isMoveInstr(const MachineInstr& MI, 1485e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& sourceReg, 1495e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& destReg) const { 1505e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos return false; 1515e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos } 1525e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos 153e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos /// Insert a goto (unconditional branch) sequence to TMBB, at the 154e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos /// end of MBB 155e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos virtual void insertGoto(MachineBasicBlock& MBB, 156e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos MachineBasicBlock& TMBB) const { 157905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos assert(0 && "Target didn't implement insertGoto!"); 158905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos } 159450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 1600cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// Reverses the branch condition of the MachineInstr pointed by 1610cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// MI. The instruction is replaced and the new MI is returned. 162905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos virtual MachineBasicBlock::iterator 163096f58b09adb03b5b060e12b327cff57329909f7Alkis Evlogimenos reverseBranchCondition(MachineBasicBlock::iterator MI) const { 164905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos assert(0 && "Target didn't implement reverseBranchCondition!"); 165c2df129da9828406d97f708989b5151ed04dec6bChris Lattner abort(); 166c2df129da9828406d97f708989b5151ed04dec6bChris Lattner return MI; 167905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos } 168450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 169450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner //------------------------------------------------------------------------- 170450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner // Code generation support for creating individual machine instructions 171450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner // 172450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner // WARNING: These methods are Sparc specific 173450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner // 174450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner // DO NOT USE ANY OF THESE METHODS THEY ARE DEPRECATED! 175450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner // 176450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner //------------------------------------------------------------------------- 177450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 1782441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner unsigned getNumDelaySlots(MachineOpCode Opcode) const { 1792441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).numDelaySlots; 180450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner } 1812441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isCCInstr(MachineOpCode Opcode) const { 1822441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_CC_FLAG; 183450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner } 1842441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isNop(MachineOpCode Opcode) const { 1852441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_NOP_FLAG; 186450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner } 1872441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isBranch(MachineOpCode Opcode) const { 1882441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_BRANCH_FLAG; 189450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner } 1902441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner /// isBarrier - Returns true if the specified instruction stops control flow 1912441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner /// from executing the instruction immediately following it. Examples include 1922441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner /// unconditional branches and return instructions. 1932441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isBarrier(MachineOpCode Opcode) const { 1942441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_BARRIER_FLAG; 195450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner } 1962441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isCall(MachineOpCode Opcode) const { 1972441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_CALL_FLAG; 198450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner } 1992441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isLoad(MachineOpCode Opcode) const { 2002441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_LOAD_FLAG; 201450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner } 2022441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isStore(MachineOpCode Opcode) const { 2032441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_STORE_FLAG; 2042441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner } 2052441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner virtual bool hasResultInterlock(MachineOpCode Opcode) const { 206a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return true; 207a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 208b2f30a3792c84790fcf7f20bf581b963bb0a25d3Brian Gaeke 209a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 210a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Latencies for individual instructions and instruction pairs 211a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 2122441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner virtual int minLatency(MachineOpCode Opcode) const { 2132441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).latency; 214a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 215a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 2162441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner virtual int maxLatency(MachineOpCode Opcode) const { 2172441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).latency; 218a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 2194c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve 2204c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 2214c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // Which operand holds an immediate constant? Returns -1 if none 2224c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 2232441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner virtual int getImmedConstantPos(MachineOpCode Opcode) const { 2244c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve return -1; // immediate position is machine specific, so say -1 == "none" 2254c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve } 226a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 227a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Check if the specified constant fits in the immediate field 228a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction 229a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 2302441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner virtual bool constantFitsInImmedField(MachineOpCode Opcode, 231a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int64_t intValue) const; 232a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 233e28adaa633393d5beea7f8e97951cbe1e3cd1646Brian Gaeke // Return the largest positive constant that can be held in the IMMED field 234a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction. 235a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // isSignExtended is set to true if the value is sign-extended before use 236a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // (this is true for all immediate fields in SPARC instructions). 237a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Return 0 if the instruction has no IMMED field. 238a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 2392441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner virtual uint64_t maxImmedConstant(MachineOpCode Opcode, 240a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool &isSignExtended) const { 2412441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner isSignExtended = get(Opcode).immedIsSignExtended; 2422441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).maxImmedConst; 243a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 244a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 245a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 246d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 247d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 248a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#endif 249