TargetInstrInfo.h revision 60f09928a0d22d5927ff0a40fe9163cf1ba1014a
1075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner//===-- llvm/Target/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===// 234695381d626485a560594f162701088079589dfMisha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 56fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// This file was developed by the LLVM research group and is distributed under 66fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// the University of Illinois Open Source License. See LICENSE.TXT for details. 734695381d626485a560594f162701088079589dfMisha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 10a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// This file describes the target machine instructions to the code generator. 11a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 12f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner//===----------------------------------------------------------------------===// 13a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 143501feab811c86c9659248a4875fc31a3165f84dChris Lattner#ifndef LLVM_TARGET_TARGETINSTRINFO_H 153501feab811c86c9659248a4875fc31a3165f84dChris Lattner#define LLVM_TARGET_TARGETINSTRINFO_H 16a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 17905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos#include "llvm/CodeGen/MachineBasicBlock.h" 18551ccae044b0ff658fe629dd67edd5ffe75d10e8Reid Spencer#include "llvm/Support/DataTypes.h" 192cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner#include <vector> 20be67780f31958b05ad3c510ca3a973d327517e86Chris Lattner#include <cassert> 21a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 22d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 23d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 245684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass MachineInstr; 25f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattnerclass TargetMachine; 265684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Value; 27588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adveclass Type; 285684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Instruction; 292cc214c06cbb94f95928636981c9805d6300cff1Chris Lattnerclass Constant; 30e7506a366e8bd56c97d10beb68e4db953aebaecaChris Lattnerclass Function; 31c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adveclass MachineCodeForInstruction; 32ae72f4a642192abab5a2d10592200a94fcba61deChris Lattnerclass TargetRegisterClass; 33a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 34f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 35f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner// Data types used to define information about a single machine instruction 36f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 37a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 38ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenostypedef short MachineOpCode; 39c188b733babbcdb0ff51613d0bb133e0496963b6Chris Lattnertypedef unsigned InstrSchedClass; 40a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 41a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//--------------------------------------------------------------------------- 423501feab811c86c9659248a4875fc31a3165f84dChris Lattner// struct TargetInstrDescriptor: 4300876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman// Predefined information about each machine instruction. 4400876a2808f1a8061f7e0852c7949fc5074ecb04Misha Brukman// Designed to initialized statically. 453501feab811c86c9659248a4875fc31a3165f84dChris Lattner// 46a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 47f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_BRANCH_FLAG = 1 << 0; 48f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_CALL_FLAG = 1 << 1; 49f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_RET_FLAG = 1 << 2; 50f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_BARRIER_FLAG = 1 << 3; 51f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_DELAY_SLOT_FLAG = 1 << 4; 52f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_LOAD_FLAG = 1 << 5; 53f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_STORE_FLAG = 1 << 6; 5415f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner 5515f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner// M_2_ADDR_FLAG - 3-addr instructions which really work like 2-addr ones. 56f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_2_ADDR_FLAG = 1 << 7; 5715f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner 5815f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner// M_CONVERTIBLE_TO_3_ADDR - This is a M_2_ADDR_FLAG instruction which can be 5915f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner// changed into a 3-address instruction if the first two operands cannot be 6015f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner// assigned to the same register. The target must implement the 6115f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner// TargetInstrInfo::convertToThreeAddress method for this instruction. 62f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_CONVERTIBLE_TO_3_ADDR = 1 << 8; 6315f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner 6415f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner// This M_COMMUTABLE - is a 2- or 3-address instruction (of the form X = op Y, 6515f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner// Z), which produces the same result if Y and Z are exchanged. 66f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_COMMUTABLE = 1 << 9; 67a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 68075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// M_TERMINATOR_FLAG - Is this instruction part of the terminator for a basic 69075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// block? Typically this is things like return and branch instructions. 70075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// Various passes use this to insert code into the bottom of a basic block, but 71075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// before control flow occurs. 72f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_TERMINATOR_FLAG = 1 << 10; 73075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner 7409321dcf5a3d8acb89dfcad2191c630a54938458Chris Lattner// M_USES_CUSTOM_DAG_SCHED_INSERTION - Set if this instruction requires custom 7509321dcf5a3d8acb89dfcad2191c630a54938458Chris Lattner// insertion support when the DAG scheduler is inserting it into a machine basic 7609321dcf5a3d8acb89dfcad2191c630a54938458Chris Lattner// block. 77f7fb31ea33c78f1bc46c23d9edbf9580b7756bbeChris Lattnerconst unsigned M_USES_CUSTOM_DAG_SCHED_INSERTION = 1 << 11; 7809321dcf5a3d8acb89dfcad2191c630a54938458Chris Lattner 798d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng// M_VARIABLE_OPS - Set if this instruction can have a variable number of extra 808d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng// operands in addition to the minimum number operands specified. 818d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Chengconst unsigned M_VARIABLE_OPS = 1 << 12; 828d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng 8321d03f2de0087d60dbf575d95924404a97852879Evan Cheng// Machine operand flags 8421d03f2de0087d60dbf575d95924404a97852879Evan Cheng// M_LOOK_UP_PTR_REG_CLASS - Set if this operand is a pointer value and it 8521d03f2de0087d60dbf575d95924404a97852879Evan Cheng// requires a callback to look up its register class. 8621d03f2de0087d60dbf575d95924404a97852879Evan Chengconst unsigned M_LOOK_UP_PTR_REG_CLASS = 1 << 0; 8721d03f2de0087d60dbf575d95924404a97852879Evan Cheng 88ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner/// TargetOperandInfo - This holds information about one operand of a machine 89ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner/// instruction, indicating the register class for register operands, etc. 90ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner/// 91ae72f4a642192abab5a2d10592200a94fcba61deChris Lattnerclass TargetOperandInfo { 92ae72f4a642192abab5a2d10592200a94fcba61deChris Lattnerpublic: 9360f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// RegClass - This specifies the register class enumeration of the operand 9460f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey /// if the operand is a register. If not, this contains 0. 9560f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned short RegClass; 9660f09928a0d22d5927ff0a40fe9163cf1ba1014aJim Laskey unsigned short Flags; 97ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner /// Currently no other information. 98ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner}; 99ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner 100ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner 1011fca5ff62bb2ecb5bfc8974f4dbfc56e9d3ca721Chris Lattnerclass TargetInstrDescriptor { 1021fca5ff62bb2ecb5bfc8974f4dbfc56e9d3ca721Chris Lattnerpublic: 1034683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char * Name; // Assembly language mnemonic for the opcode. 1048d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng unsigned numOperands; // Num of args (may be more if variable_ops). 10575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner InstrSchedClass schedClass; // enum identifying instr sched class 10675e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned Flags; // flags identifying machine instr class 10775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned TSFlags; // Target Specific Flag values 108f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitUses; // Registers implicitly read by this instr 109f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitDefs; // Registers implicitly defined by this instr 110ae72f4a642192abab5a2d10592200a94fcba61deChris Lattner const TargetOperandInfo *OpInfo; // 'numOperands' entries about operands. 111a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 112a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 113a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 1143501feab811c86c9659248a4875fc31a3165f84dChris Lattner//--------------------------------------------------------------------------- 11534695381d626485a560594f162701088079589dfMisha Brukman/// 1163501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// TargetInstrInfo - Interface to description of machine instructions 11734695381d626485a560594f162701088079589dfMisha Brukman/// 118075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerclass TargetInstrInfo { 119075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner const TargetInstrDescriptor* desc; // raw array to allow static init'n 120bceb68807fdb86c794bc8d8f8aef0940f12c2cebChris Lattner unsigned NumOpcodes; // number of entries in the desc array 121075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned numRealOpCodes; // number of non-dummy op codes 12234695381d626485a560594f162701088079589dfMisha Brukman 123075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner TargetInstrInfo(const TargetInstrInfo &); // DO NOT IMPLEMENT 124075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner void operator=(const TargetInstrInfo &); // DO NOT IMPLEMENT 125a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Advepublic: 126bceb68807fdb86c794bc8d8f8aef0940f12c2cebChris Lattner TargetInstrInfo(const TargetInstrDescriptor *desc, unsigned NumOpcodes); 127075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner virtual ~TargetInstrInfo(); 12870535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner 1294ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner // Invariant opcodes: All instruction sets have these as their low opcodes. 1304ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner enum { 1314ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner PHI = 0, 1324ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner INLINEASM = 1 1334ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner }; 13434695381d626485a560594f162701088079589dfMisha Brukman 135bceb68807fdb86c794bc8d8f8aef0940f12c2cebChris Lattner unsigned getNumOpcodes() const { return NumOpcodes; } 13634695381d626485a560594f162701088079589dfMisha Brukman 137e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// get - Return the machine instruction descriptor that corresponds to the 138e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// specified instruction opcode. 139e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// 1402441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const TargetInstrDescriptor& get(MachineOpCode Opcode) const { 1412441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner assert((unsigned)Opcode < NumOpcodes); 1422441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return desc[Opcode]; 143a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 1444683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner 1452441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const char *getName(MachineOpCode Opcode) const { 1462441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Name; 1474683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner } 14834695381d626485a560594f162701088079589dfMisha Brukman 1492441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner int getNumOperands(MachineOpCode Opcode) const { 1502441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).numOperands; 151a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 152450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 1532441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner InstrSchedClass getSchedClass(MachineOpCode Opcode) const { 1542441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).schedClass; 155a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 156d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 1572441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const unsigned *getImplicitUses(MachineOpCode Opcode) const { 1582441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).ImplicitUses; 159d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 160d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 1612441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner const unsigned *getImplicitDefs(MachineOpCode Opcode) const { 1622441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).ImplicitDefs; 163d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 164d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 165450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 166a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 167a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Query instruction class flags according to the machine-independent 168a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // flags listed above. 16934695381d626485a560594f162701088079589dfMisha Brukman // 1702441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isReturn(MachineOpCode Opcode) const { 1712441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_RET_FLAG; 172a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 173450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 1742441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner bool isTwoAddrInstr(MachineOpCode Opcode) const { 1752441d6a895c1aad171bfbdc84cd6e246171b101dChris Lattner return get(Opcode).Flags & M_2_ADDR_FLAG; 1769ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman } 17713d41b9d721f98372b97d2ec119e6c91932ab0aeEvan Cheng bool isCommutableInstr(MachineOpCode Opcode) const { 17813d41b9d721f98372b97d2ec119e6c91932ab0aeEvan Cheng return get(Opcode).Flags & M_COMMUTABLE; 17913d41b9d721f98372b97d2ec119e6c91932ab0aeEvan Cheng } 180075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isTerminatorInstr(unsigned Opcode) const { 181075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner return get(Opcode).Flags & M_TERMINATOR_FLAG; 182075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner } 1830271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner 1840271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner bool isBranch(MachineOpCode Opcode) const { 1850271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner return get(Opcode).Flags & M_BRANCH_FLAG; 1860271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner } 1870271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner 1880271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner /// isBarrier - Returns true if the specified instruction stops control flow 1890271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner /// from executing the instruction immediately following it. Examples include 1900271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner /// unconditional branches and return instructions. 1910271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner bool isBarrier(MachineOpCode Opcode) const { 1920271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner return get(Opcode).Flags & M_BARRIER_FLAG; 1930271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner } 1940271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner 1950271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner bool isCall(MachineOpCode Opcode) const { 1960271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner return get(Opcode).Flags & M_CALL_FLAG; 1970271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner } 1980271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner bool isLoad(MachineOpCode Opcode) const { 1990271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner return get(Opcode).Flags & M_LOAD_FLAG; 2000271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner } 2010271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner bool isStore(MachineOpCode Opcode) const { 2020271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner return get(Opcode).Flags & M_STORE_FLAG; 2030271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner } 2040271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner 2050271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner /// usesCustomDAGSchedInsertionHook - Return true if this instruction requires 2060271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner /// custom insertion support when the DAG scheduler is inserting it into a 2070271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner /// machine basic block. 2080271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner bool usesCustomDAGSchedInsertionHook(unsigned Opcode) const { 2090271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner return get(Opcode).Flags & M_USES_CUSTOM_DAG_SCHED_INSERTION; 2100271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner } 211d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 2128d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng bool hasVariableOperands(MachineOpCode Opcode) const { 2138d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng return get(Opcode).Flags & M_VARIABLE_OPS; 2148d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng } 2158d3af5e7d082dbd029c3987ceadbdcf9e49af6d7Evan Cheng 2160cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// Return true if the instruction is a register to register move 2170cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// and leave the source and dest operands in the passed parameters. 2185e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos virtual bool isMoveInstr(const MachineInstr& MI, 2195e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& sourceReg, 2205e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& destReg) const { 2215e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos return false; 2225e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos } 223af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner 224af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// isLoadFromStackSlot - If the specified machine instruction is a direct 225af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// load from a stack slot, return the virtual or physical register number of 226af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// the destination along with the FrameIndex of the loaded stack slot. If 227af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// not, return 0. This predicate must return 0 if the instruction has 228af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// any side effects other than loading from the stack slot. 229af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const{ 230af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner return 0; 231af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner } 232af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner 233af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// isStoreToStackSlot - If the specified machine instruction is a direct 234af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// store to a stack slot, return the virtual or physical register number of 235af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// the source reg along with the FrameIndex of the loaded stack slot. If 236af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// not, return 0. This predicate must return 0 if the instruction has 237af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// any side effects other than storing to the stack slot. 238af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const { 239af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner return 0; 240af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner } 2415e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos 24215f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// convertToThreeAddress - This method must be implemented by targets that 24315f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target 24415f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// may be able to convert a two-address instruction into a true 24515f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// three-address instruction on demand. This allows the X86 target (for 24615f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// example) to convert ADD and SHL instructions into LEA instructions if they 24715f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// would require register copies due to two-addressness. 24815f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// 24915f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// This method returns a null pointer if the transformation cannot be 25015f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// performed, otherwise it returns the new instruction. 25115f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// 25215f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner virtual MachineInstr *convertToThreeAddress(MachineInstr *TA) const { 25315f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner return 0; 25415f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner } 25515f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner 256d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// commuteInstruction - If a target has any instructions that are commutable, 257d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// but require converting to a different instruction or making non-trivial 258d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// changes to commute them, this method can overloaded to do this. The 259d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// default implementation of this method simply swaps the first two operands 260d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// of MI and returns it. 261d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// 262d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// If a target wants to make more aggressive changes, they can construct and 263d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// return a new machine instruction. If an instruction cannot commute, it 264d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// can also return null. 265d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// 266d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner virtual MachineInstr *commuteInstruction(MachineInstr *MI) const; 267d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner 268e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos /// Insert a goto (unconditional branch) sequence to TMBB, at the 269e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos /// end of MBB 270e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos virtual void insertGoto(MachineBasicBlock& MBB, 271e4d32f6cf96566f8d37e50212e4f67330150ee20Alkis Evlogimenos MachineBasicBlock& TMBB) const { 272905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos assert(0 && "Target didn't implement insertGoto!"); 273905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos } 274450b6d29988fa01e828e5b7917a47726a4dd46ecChris Lattner 2750cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// Reverses the branch condition of the MachineInstr pointed by 2760cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// MI. The instruction is replaced and the new MI is returned. 277905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos virtual MachineBasicBlock::iterator 278096f58b09adb03b5b060e12b327cff57329909f7Alkis Evlogimenos reverseBranchCondition(MachineBasicBlock::iterator MI) const { 279905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos assert(0 && "Target didn't implement reverseBranchCondition!"); 280c2df129da9828406d97f708989b5151ed04dec6bChris Lattner abort(); 281c2df129da9828406d97f708989b5151ed04dec6bChris Lattner return MI; 282905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos } 2830271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner 28465e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner /// insertNoop - Insert a noop into the instruction stream at the specified 28565e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner /// point. 28665e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner virtual void insertNoop(MachineBasicBlock &MBB, 28765e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner MachineBasicBlock::iterator MI) const { 28865e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner assert(0 && "Target didn't implement insertNoop!"); 28965e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner abort(); 29065e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner } 29121d03f2de0087d60dbf575d95924404a97852879Evan Cheng 29221d03f2de0087d60dbf575d95924404a97852879Evan Cheng /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 29321d03f2de0087d60dbf575d95924404a97852879Evan Cheng /// values. 29421d03f2de0087d60dbf575d95924404a97852879Evan Cheng virtual const TargetRegisterClass *getPointerRegClass() const { 29521d03f2de0087d60dbf575d95924404a97852879Evan Cheng assert(0 && "Target didn't implement getPointerRegClass!"); 29621d03f2de0087d60dbf575d95924404a97852879Evan Cheng abort(); 29721d03f2de0087d60dbf575d95924404a97852879Evan Cheng } 2980271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner 299dcc4a6f705bacb66b98c58bb3b8c738d3e6df37bChris Lattner /// hasDelaySlot - Returns true if the specified instruction has a delay slot 300dcc4a6f705bacb66b98c58bb3b8c738d3e6df37bChris Lattner /// which must be filled by the code generator. 301dcc4a6f705bacb66b98c58bb3b8c738d3e6df37bChris Lattner bool hasDelaySlot(unsigned Opcode) const { 30249db6fe193168239be2f5aa8b4201614b739e840Chris Lattner return get(Opcode).Flags & M_DELAY_SLOT_FLAG; 303dcc4a6f705bacb66b98c58bb3b8c738d3e6df37bChris Lattner } 304a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 305a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 306d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 307d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 308a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#endif 309