TargetInstrInfo.h revision 75e961ae6b2e2801160e560057ad97ece4443986
1a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//===-- llvm/Target/InstrInfo.h - Target Instruction Information --*-C++-*-==// 2a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 3a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// This file describes the target machine instructions to the code generator. 4a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 5a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//===---------------------------------------------------------------------===// 6a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 7a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#ifndef LLVM_TARGET_MACHINEINSTRINFO_H 8a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#define LLVM_TARGET_MACHINEINSTRINFO_H 9a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 10360e17eaf1a2abda82b02235dc57d26d8f83c937Chris Lattner#include "Support/DataTypes.h" 112cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner#include <vector> 12a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 13a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adveclass MachineInstrDescriptor; 145684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass MachineInstr; 15f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattnerclass TargetMachine; 165684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Value; 175684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Instruction; 182cc214c06cbb94f95928636981c9805d6300cff1Chris Lattnerclass Constant; 19e7506a366e8bd56c97d10beb68e4db953aebaecaChris Lattnerclass Function; 20c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adveclass MachineCodeForInstruction; 21a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 22f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 23f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner// Data types used to define information about a single machine instruction 24f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 25a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 26f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattnertypedef int MachineOpCode; 27c188b733babbcdb0ff51613d0bb133e0496963b6Chris Lattnertypedef unsigned InstrSchedClass; 28a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 29851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adveconst MachineOpCode INVALID_MACHINE_OPCODE = -1; 30851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve 31851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve 32a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//--------------------------------------------------------------------------- 33a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// struct MachineInstrDescriptor: 34a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Predefined information about each machine instruction. 35a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Designed to initialized statically. 36a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 37a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// class MachineInstructionInfo 38a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Interface to description of machine instructions 39a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 40a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//--------------------------------------------------------------------------- 41a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 42c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_NOP_FLAG = 1 << 0; 43c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_BRANCH_FLAG = 1 << 1; 44c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_CALL_FLAG = 1 << 2; 45c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_RET_FLAG = 1 << 3; 46c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_ARITH_FLAG = 1 << 4; 47c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_CC_FLAG = 1 << 6; 48c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_LOGICAL_FLAG = 1 << 6; 49c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_INT_FLAG = 1 << 7; 50c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_FLOAT_FLAG = 1 << 8; 51c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_CONDL_FLAG = 1 << 9; 52c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_LOAD_FLAG = 1 << 10; 53c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_PREFETCH_FLAG = 1 << 11; 54c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_STORE_FLAG = 1 << 12; 55c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_DUMMY_PHI_FLAG = 1 << 13; 56c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattnerconst unsigned M_PSEUDO_FLAG = 1 << 14; 57a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 58a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 59a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Advestruct MachineInstrDescriptor { 604683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char * Name; // Assembly language mnemonic for the opcode. 61c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int numOperands; // Number of args; -1 if variable #args 62c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int resultPos; // Position of the result; -1 if no result 63c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned maxImmedConst; // Largest +ve constant in IMMMED field or 0. 64697954c15da58bd8b186dbafdedd8b06db770201Chris Lattner bool immedIsSignExtended; // Is IMMED field sign-extended? If so, 6575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner // smallest -ve value is -(maxImmedConst+1). 66c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numDelaySlots; // Number of delay slots after instruction 6775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned latency; // Latency in machine cycles 6875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner InstrSchedClass schedClass; // enum identifying instr sched class 6975e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned Flags; // flags identifying machine instr class 7075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned TSFlags; // Target Specific Flag values 71a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 72a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 73a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 742cc214c06cbb94f95928636981c9805d6300cff1Chris Lattnerclass MachineInstrInfo { 75a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve const MachineInstrDescriptor* desc; // raw array to allow static init'n 76c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned descSize; // number of entries in the desc array 77c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numRealOpCodes; // number of non-dummy op codes 78a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 792cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner MachineInstrInfo(const MachineInstrInfo &); // DO NOT IMPLEMENT 802cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner void operator=(const MachineInstrInfo &); // DO NOT IMPLEMENT 81a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Advepublic: 82d020801aeaacbee4dc139bb08f81e44bc53b872eChris Lattner MachineInstrInfo(const MachineInstrDescriptor *desc, unsigned descSize, 83a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned numRealOpCodes); 84a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual ~MachineInstrInfo(); 85a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 86a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumRealOpCodes() const { return numRealOpCodes; } 87a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumTotalOpCodes() const { return descSize; } 88a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 89e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// get - Return the machine instruction descriptor that corresponds to the 90e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// specified instruction opcode. 91e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// 92e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner const MachineInstrDescriptor& get(MachineOpCode opCode) const { 93a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve assert(opCode >= 0 && opCode < (int)descSize); 94a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return desc[opCode]; 95a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 964683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner 974683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char *getName(MachineOpCode opCode) const { 984683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner return get(opCode).Name; 994683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner } 100a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 101a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int getNumOperands(MachineOpCode opCode) const { 102e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).numOperands; 103a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 104a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 105a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int getResultPos(MachineOpCode opCode) const { 106e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).resultPos; 107a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 108a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 109a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumDelaySlots(MachineOpCode opCode) const { 110e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).numDelaySlots; 111a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 112a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 113a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve InstrSchedClass getSchedClass(MachineOpCode opCode) const { 114e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).schedClass; 115a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 116a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 117a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 118a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Query instruction class flags according to the machine-independent 119a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // flags listed above. 120a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 121a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isNop(MachineOpCode opCode) const { 12275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_NOP_FLAG; 123a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 124a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isBranch(MachineOpCode opCode) const { 12575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_BRANCH_FLAG; 126a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 127a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isCall(MachineOpCode opCode) const { 12875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CALL_FLAG; 129a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 130a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isReturn(MachineOpCode opCode) const { 13175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_RET_FLAG; 132a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 133a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isControlFlow(MachineOpCode opCode) const { 13475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_BRANCH_FLAG 13575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_CALL_FLAG 13675e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_RET_FLAG; 137a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 138a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isArith(MachineOpCode opCode) const { 13975e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_ARITH_FLAG; 140a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 141a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isCCInstr(MachineOpCode opCode) const { 14275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CC_FLAG; 143a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 144a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLogical(MachineOpCode opCode) const { 14575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOGICAL_FLAG; 146a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 147a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isIntInstr(MachineOpCode opCode) const { 14875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_INT_FLAG; 149a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 150a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isFloatInstr(MachineOpCode opCode) const { 15175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_FLOAT_FLAG; 152a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 153502374a58fcd1c28065170a8c4a210be002ff190Chris Lattner bool isConditional(MachineOpCode opCode) const { 15475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CONDL_FLAG; 155a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 156a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLoad(MachineOpCode opCode) const { 15775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG; 158a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 159a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isPrefetch(MachineOpCode opCode) const { 16075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_PREFETCH_FLAG; 161a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 162a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLoadOrPrefetch(MachineOpCode opCode) const { 16375e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG 16475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_PREFETCH_FLAG; 165a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 166a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isStore(MachineOpCode opCode) const { 16775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_STORE_FLAG; 168a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 169a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isMemoryAccess(MachineOpCode opCode) const { 17075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG 17175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_PREFETCH_FLAG 17275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_STORE_FLAG; 173a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 1740d3ea0268f44f8fd4ddf7a15f3624b384b0691dbRuchira Sasanka bool isDummyPhiInstr(const MachineOpCode opCode) const { 17575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_DUMMY_PHI_FLAG; 176a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 177b9f550ddfbaf963a0aced2df8cd40c71021fd3e5Ruchira Sasanka bool isPseudoInstr(const MachineOpCode opCode) const { 17875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_PSEUDO_FLAG; 179b9f550ddfbaf963a0aced2df8cd40c71021fd3e5Ruchira Sasanka } 180d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 181a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Check if an instruction can be issued before its operands are ready, 182a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // or if a subsequent instruction that uses its result can be issued 183a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // before the results are ready. 184a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Default to true since most instructions on many architectures allow this. 185a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 186a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool hasOperandInterlock(MachineOpCode opCode) const { 187a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return true; 188a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 189a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 190a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool hasResultInterlock(MachineOpCode opCode) const { 191a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return true; 192a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 193a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 194a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 195a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Latencies for individual instructions and instruction pairs 196a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 197a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual int minLatency(MachineOpCode opCode) const { 198e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).latency; 199a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 200a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 201a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual int maxLatency(MachineOpCode opCode) const { 202e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).latency; 203a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 2044c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve 2054c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 2064c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // Which operand holds an immediate constant? Returns -1 if none 2074c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 208851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve virtual int getImmedConstantPos(MachineOpCode opCode) const { 2094c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve return -1; // immediate position is machine specific, so say -1 == "none" 2104c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve } 211a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 212a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Check if the specified constant fits in the immediate field 213a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction 214a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 215a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool constantFitsInImmedField(MachineOpCode opCode, 216a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int64_t intValue) const; 217a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 218a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Return the largest +ve constant that can be held in the IMMMED field 219a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction. 220a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // isSignExtended is set to true if the value is sign-extended before use 221a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // (this is true for all immediate fields in SPARC instructions). 222a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Return 0 if the instruction has no IMMED field. 223a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 224a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual uint64_t maxImmedConstant(MachineOpCode opCode, 225a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool &isSignExtended) const { 226e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner isSignExtended = get(opCode).immedIsSignExtended; 227e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).maxImmedConst; 228a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 2295684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve 2305684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve //------------------------------------------------------------------------- 2314900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // Queries about representation of LLVM quantities (e.g., constants) 2324900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve //------------------------------------------------------------------------- 2334900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 2342cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// ConstantTypeMustBeLoaded - Test if this type of constant must be loaded 2352cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// from memory into a register, i.e., cannot be set bitwise in register and 2362cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// cannot use immediate fields of instructions. Note that this only makes 2372cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// sense for primitive types. 2382cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// 2392cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner virtual bool ConstantTypeMustBeLoaded(const Constant* CV) const; 2404900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 2414900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // Test if this constant may not fit in the immediate field of the 2424900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // machine instructions (probably) generated for this instruction. 2434900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // 2444900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve virtual bool ConstantMayNotFitInImmedField(const Constant* CV, 2454900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve const Instruction* I) const { 2464900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve return true; // safe but very conservative 2474900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve } 2484900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 2494900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve //------------------------------------------------------------------------- 2505684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // Code generation support for creating individual machine instructions 2515684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve //------------------------------------------------------------------------- 252d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 253d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // Get certain common op codes for the current target. this and all the 254d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // Create* methods below should be moved to a machine code generation class 255d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // 256d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve virtual MachineOpCode getNOPOpCode() const = 0; 257d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 2585684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // Create an instruction sequence to put the constant `val' into 259e9bb2df410f7a22decad9a883f7139d5857c1520Chris Lattner // the virtual register `dest'. `val' may be a Constant or a 2605684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // GlobalValue, viz., the constant address of a global variable or function. 261c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 262c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 263bba2485c709adecd65526fbcfea77f2344d29d69Vikram S. Adve // Symbolic constants or constants that must be accessed from memory 264fce1143bcfa73f61845002fa50473d1a01384202Misha Brukman // are added to the constant pool via MachineFunction::get(F). 2655684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // 266c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateCodeToLoadConst(const TargetMachine& target, 267c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 268851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve Value* val, 2695684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve Instruction* dest, 270c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 271bba2485c709adecd65526fbcfea77f2344d29d69Vikram S. Adve MachineCodeForInstruction& mcfi) const=0; 272bba2485c709adecd65526fbcfea77f2344d29d69Vikram S. Adve 2734938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // Create an instruction sequence to copy an integer value `val' 2744938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // to a floating point value `dest' by copying to memory and back. 2754938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // val must be an integral type. dest must be a Float or Double. 276c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 277c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 278c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 27944508e333cc1d36e699aa330d84312d1c8fc655aVikram S. Adve // 280c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateCodeToCopyIntToFloat(const TargetMachine& target, 281c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 282c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Value* val, 283c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Instruction* dest, 284c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 285c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve MachineCodeForInstruction& mcfi)const=0; 2864938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve 2874938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // Similarly, create an instruction sequence to copy an FP value 2884938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // `val' to an integer value `dest' by copying to memory and back. 289c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 290c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 291c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 292c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // 293c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateCodeToCopyFloatToInt(const TargetMachine& target, 294c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 295c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Value* val, 296c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Instruction* dest, 297c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 298c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve MachineCodeForInstruction& mcfi)const=0; 299c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve 300c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Create instruction(s) to copy src to dest, for arbitrary types 301c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 302c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 303c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 3044938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // 305851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve virtual void CreateCopyInstructionsByType(const TargetMachine& target, 306c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 307c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Value* src, 308c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Instruction* dest, 309c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 310c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve MachineCodeForInstruction& mcfi)const=0; 311c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve 312c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Create instruction sequence to produce a sign-extended register value 313c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // from an arbitrary sized value (sized in bits, not bytes). 31468f716190baa08675793adba428605797eb658a4Vikram S. Adve // The generated instructions are appended to `mvec'. 31568f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 316c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 317c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // 318c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateSignExtensionInstructions(const TargetMachine& target, 319c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 32068f716190baa08675793adba428605797eb658a4Vikram S. Adve Value* srcVal, 3219d0168d2d54008729632f676475ce710448cf8a8Vikram S. Adve Value* destVal, 322c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numLowBits, 323c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 32468f716190baa08675793adba428605797eb658a4Vikram S. Adve MachineCodeForInstruction& mcfi) const=0; 32568f716190baa08675793adba428605797eb658a4Vikram S. Adve 32668f716190baa08675793adba428605797eb658a4Vikram S. Adve // Create instruction sequence to produce a zero-extended register value 32768f716190baa08675793adba428605797eb658a4Vikram S. Adve // from an arbitrary sized value (sized in bits, not bytes). 32868f716190baa08675793adba428605797eb658a4Vikram S. Adve // The generated instructions are appended to `mvec'. 32968f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 33068f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any stack space required is allocated via mcff. 33168f716190baa08675793adba428605797eb658a4Vikram S. Adve // 33268f716190baa08675793adba428605797eb658a4Vikram S. Adve virtual void CreateZeroExtensionInstructions(const TargetMachine& target, 33368f716190baa08675793adba428605797eb658a4Vikram S. Adve Function* F, 33468f716190baa08675793adba428605797eb658a4Vikram S. Adve Value* srcVal, 3359d0168d2d54008729632f676475ce710448cf8a8Vikram S. Adve Value* destVal, 336c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned srcSizeInBits, 33768f716190baa08675793adba428605797eb658a4Vikram S. Adve std::vector<MachineInstr*>& mvec, 33868f716190baa08675793adba428605797eb658a4Vikram S. Adve MachineCodeForInstruction& mcfi) const=0; 339a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 340a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 341a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#endif 342