TargetInstrInfo.h revision a6548d0f29d848ce5e2c10ebd6aae196ce3d8651
1075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner//===-- llvm/Target/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===// 234695381d626485a560594f162701088079589dfMisha Brukman// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 57ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// This file is distributed under the University of Illinois Open Source 67ed47a13356daed2a34cd2209a31f92552e3bdd8Chris Lattner// License. See LICENSE.TXT for details. 734695381d626485a560594f162701088079589dfMisha Brukman// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 1061e804f22bde414b2e8a8da22daf575a7e8ad816Dan Gohman// This file describes the target machine instruction set to the code generator. 11a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 12f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner//===----------------------------------------------------------------------===// 13a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 143501feab811c86c9659248a4875fc31a3165f84dChris Lattner#ifndef LLVM_TARGET_TARGETINSTRINFO_H 153501feab811c86c9659248a4875fc31a3165f84dChris Lattner#define LLVM_TARGET_TARGETINSTRINFO_H 16a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 17d3f99e2bbf5e62261c8948127aacfe9a7d3b2456Chris Lattner#include "llvm/Target/TargetInstrDesc.h" 186c14147d934bd644fc9d24a3b36f3c38799a3401Evan Cheng#include "llvm/CodeGen/MachineFunction.h" 19a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 20d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 21d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 22ae72f4a642192abab5a2d10592200a94fcba61deChris Lattnerclass TargetRegisterClass; 236c14147d934bd644fc9d24a3b36f3c38799a3401Evan Chengclass LiveVariables; 24d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Andersonclass CalleeSavedInfo; 2543dbe05279b753aabda571d9c83eaeb36987001aOwen Andersonclass SDNode; 2643dbe05279b753aabda571d9c83eaeb36987001aOwen Andersonclass SelectionDAG; 27a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 28f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Andersontemplate<class T> class SmallVectorImpl; 29f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 30a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 313501feab811c86c9659248a4875fc31a3165f84dChris Lattner//--------------------------------------------------------------------------- 3234695381d626485a560594f162701088079589dfMisha Brukman/// 3361e804f22bde414b2e8a8da22daf575a7e8ad816Dan Gohman/// TargetInstrInfo - Interface to description of machine instruction set 3434695381d626485a560594f162701088079589dfMisha Brukman/// 35075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerclass TargetInstrInfo { 36749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc *Descriptors; // Raw array to allow static init'n 37749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner unsigned NumOpcodes; // Number of entries in the desc array 3834695381d626485a560594f162701088079589dfMisha Brukman 39075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner TargetInstrInfo(const TargetInstrInfo &); // DO NOT IMPLEMENT 40075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner void operator=(const TargetInstrInfo &); // DO NOT IMPLEMENT 41a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Advepublic: 42749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner TargetInstrInfo(const TargetInstrDesc *desc, unsigned NumOpcodes); 43075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner virtual ~TargetInstrInfo(); 4470535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner 454ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner // Invariant opcodes: All instruction sets have these as their low opcodes. 464ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner enum { 474ed88eb8229848cd6add06a1ec90e497e382306fChris Lattner PHI = 0, 481ee29257428960fede862fcfdbe80d5d007927e9Jim Laskey INLINEASM = 1, 494406604047423576e36657c7ede266ca42e79642Dan Gohman DBG_LABEL = 2, 504406604047423576e36657c7ede266ca42e79642Dan Gohman EH_LABEL = 3, 514406604047423576e36657c7ede266ca42e79642Dan Gohman GC_LABEL = 4, 524406604047423576e36657c7ede266ca42e79642Dan Gohman DECLARE = 5, 534406604047423576e36657c7ede266ca42e79642Dan Gohman EXTRACT_SUBREG = 6, 544406604047423576e36657c7ede266ca42e79642Dan Gohman INSERT_SUBREG = 7, 554406604047423576e36657c7ede266ca42e79642Dan Gohman IMPLICIT_DEF = 8, 564406604047423576e36657c7ede266ca42e79642Dan Gohman SUBREG_TO_REG = 9 576634e26aa11b0e2eabde8b3b463bb943364f8d9dChristopher Lamb }; 5834695381d626485a560594f162701088079589dfMisha Brukman 59bceb68807fdb86c794bc8d8f8aef0940f12c2cebChris Lattner unsigned getNumOpcodes() const { return NumOpcodes; } 6034695381d626485a560594f162701088079589dfMisha Brukman 61e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// get - Return the machine instruction descriptor that corresponds to the 62e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// specified instruction opcode. 63e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// 64749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &get(unsigned Opcode) const { 65749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner assert(Opcode < NumOpcodes && "Invalid opcode!"); 66749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner return Descriptors[Opcode]; 67a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 684683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner 69041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// isTriviallyReMaterializable - Return true if the instruction is trivially 70d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohman /// rematerializable, meaning it has no side effects and requires no operands 71d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohman /// that aren't always available. 729f8fea3531f8f8d04d1e183ff570be37d41d13f5Bill Wendling bool isTriviallyReMaterializable(const MachineInstr *MI) const { 73749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner return MI->getDesc().isRematerializable() && 74041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling isReallyTriviallyReMaterializable(MI); 75d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohman } 76d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohman 77d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohmanprotected: 78041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// isReallyTriviallyReMaterializable - For instructions with opcodes for 79041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// which the M_REMATERIALIZABLE flag is set, this function tests whether the 80041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// instruction itself is actually trivially rematerializable, considering 81041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// its operands. This is used for targets that have instructions that are 82041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// only trivially rematerializable for specific uses. This predicate must 83041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// return false if the instruction has any side effects other than 84041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// producing a value, or if it requres any address registers that are not 85041b3f835682588cb63df7e609d726369dd6b7d3Bill Wendling /// always available. 869f8fea3531f8f8d04d1e183ff570be37d41d13f5Bill Wendling virtual bool isReallyTriviallyReMaterializable(const MachineInstr *MI) const { 87d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohman return true; 88d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohman } 89d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohman 90d45eddd214061bf12ad1e6b86497a41725e61d75Dan Gohmanpublic: 910cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// Return true if the instruction is a register to register move 920cad9f53b15b7308e977864d681f710646e7d376Alkis Evlogimenos /// and leave the source and dest operands in the passed parameters. 935e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos virtual bool isMoveInstr(const MachineInstr& MI, 945e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& sourceReg, 955e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& destReg) const { 965e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos return false; 975e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos } 98af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner 99af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// isLoadFromStackSlot - If the specified machine instruction is a direct 100af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// load from a stack slot, return the virtual or physical register number of 101af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// the destination along with the FrameIndex of the loaded stack slot. If 102af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// not, return 0. This predicate must return 0 if the instruction has 103af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// any side effects other than loading from the stack slot. 104af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner virtual unsigned isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const{ 105af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner return 0; 106af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner } 107af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner 108af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// isStoreToStackSlot - If the specified machine instruction is a direct 109af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// store to a stack slot, return the virtual or physical register number of 110af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// the source reg along with the FrameIndex of the loaded stack slot. If 111af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// not, return 0. This predicate must return 0 if the instruction has 112af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner /// any side effects other than storing to the stack slot. 113af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner virtual unsigned isStoreToStackSlot(MachineInstr *MI, int &FrameIndex) const { 114af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner return 0; 115af9fa2bd0c1ee25f3adda96b3e5d7129fbab393aChris Lattner } 1165e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos 117ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng /// reMaterialize - Re-issue the specified 'original' instruction at the 118ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng /// specific location targeting a new destination register. 119ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng virtual void reMaterialize(MachineBasicBlock &MBB, 120ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng MachineBasicBlock::iterator MI, 121ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng unsigned DestReg, 122ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng const MachineInstr *Orig) const = 0; 123ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng 124a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner /// isInvariantLoad - Return true if the specified instruction (which is 125a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner /// marked mayLoad) is loading from a location whose value is invariant across 126a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner /// the function. For example, loading a value from the constant pool or from 127a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner /// from the argument area of a function if it does not change. This should 128a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner /// only return true of *all* loads the instruction does are invariant (if it 129a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner /// does multiple loads). 130a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner virtual bool isInvariantLoad(MachineInstr *MI) const { 131a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner return false; 132a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner } 133a22edc82cab86be4cb8876da1e6e78f82bb47a3eChris Lattner 13415f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// convertToThreeAddress - This method must be implemented by targets that 13515f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// set the M_CONVERTIBLE_TO_3_ADDR flag. When this flag is set, the target 1362c8c3e2e31e641085060edce0ddde3833ffa53daDan Gohman /// may be able to convert a two-address instruction into one or more true 1376c14147d934bd644fc9d24a3b36f3c38799a3401Evan Cheng /// three-address instructions on demand. This allows the X86 target (for 13815f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// example) to convert ADD and SHL instructions into LEA instructions if they 13915f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// would require register copies due to two-addressness. 14015f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// 14115f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// This method returns a null pointer if the transformation cannot be 1426c14147d934bd644fc9d24a3b36f3c38799a3401Evan Cheng /// performed, otherwise it returns the last new instruction. 14315f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner /// 1446c14147d934bd644fc9d24a3b36f3c38799a3401Evan Cheng virtual MachineInstr * 1456c14147d934bd644fc9d24a3b36f3c38799a3401Evan Cheng convertToThreeAddress(MachineFunction::iterator &MFI, 146f660c171c838793b87b7e58e91609cecf256378dOwen Anderson MachineBasicBlock::iterator &MBBI, LiveVariables *LV) const { 14715f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner return 0; 14815f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner } 14915f63ad2e59998f0bf1a3a23547582074391f650Chris Lattner 150d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// commuteInstruction - If a target has any instructions that are commutable, 151d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// but require converting to a different instruction or making non-trivial 152d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// changes to commute them, this method can overloaded to do this. The 153d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// default implementation of this method simply swaps the first two operands 154d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// of MI and returns it. 155d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// 156d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// If a target wants to make more aggressive changes, they can construct and 157d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// return a new machine instruction. If an instruction cannot commute, it 158d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// can also return null. 159d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner /// 16058dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng /// If NewMI is true, then a new machine instruction must be created. 16158dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng /// 16258dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng virtual MachineInstr *commuteInstruction(MachineInstr *MI, 16358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool NewMI = false) const = 0; 164d7e2fe40e42dffa04a770191c3414446d5e8c30aChris Lattner 165f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng /// CommuteChangesDestination - Return true if commuting the specified 166f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng /// instruction will also changes the destination operand. Also return the 167f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng /// current operand index of the would be new destination register by 168f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng /// reference. This can happen when the commutable instruction is also a 169f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng /// two-address instruction. 170f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng virtual bool CommuteChangesDestination(MachineInstr *MI, 171f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng unsigned &OpIdx) const = 0; 172f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng 173b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// AnalyzeBranch - Analyze the branching code at the end of MBB, returning 174b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// true if it cannot be understood (e.g. it's a switch dispatch or isn't 175b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// implemented for a target). Upon success, this returns false and returns 176b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// with the following information in various cases: 177b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// 17872dc5852684bd56af68b3f344b295d9ff5c3a13fChris Lattner /// 1. If this block ends with no branches (it just falls through to its succ) 17972dc5852684bd56af68b3f344b295d9ff5c3a13fChris Lattner /// just return false, leaving TBB/FBB null. 18072dc5852684bd56af68b3f344b295d9ff5c3a13fChris Lattner /// 2. If this block ends with only an unconditional branch, it sets TBB to be 181b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// the destination block. 1826c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// 3. If this block ends with an conditional branch and it falls through to 1836c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// an successor block, it sets TBB to be the branch destination block and a 1846c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// list of operands that evaluate the condition. These 1856c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// operands can be passed to other TargetInstrInfo methods to create new 1866c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// branches. 1876c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// 4. If this block ends with an conditional branch and an unconditional 1886c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// block, it returns the 'true' destination in TBB, the 'false' destination 1896c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// in FBB, and a list of operands that evaluate the condition. These 1906c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// operands can be passed to other TargetInstrInfo methods to create new 1916c1d2b90e31ea3337705372d1757727d6764686dEvan Cheng /// branches. 192b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// 193b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// Note that RemoveBranch and InsertBranch must be implemented to support 194b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// cases where this method returns success. 195b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// 196b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner virtual bool AnalyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB, 197b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner MachineBasicBlock *&FBB, 19844eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson SmallVectorImpl<MachineOperand> &Cond) const { 199b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner return true; 200905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos } 201b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner 202b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// RemoveBranch - Remove the branching code at the end of the specific MBB. 203b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng /// this is only invoked in cases where AnalyzeBranch returns success. It 204b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng /// returns the number of instructions that were removed. 205b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng virtual unsigned RemoveBranch(MachineBasicBlock &MBB) const { 206b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner assert(0 && "Target didn't implement TargetInstrInfo::RemoveBranch!"); 207b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 208b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner } 209b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner 210b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// InsertBranch - Insert a branch into the end of the specified 211b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner /// MachineBasicBlock. This operands to this method are the same as those 21233644ba8d22a91b8fe0f0da3d73fc7cf38a46b06Chris Lattner /// returned by AnalyzeBranch. This is invoked in cases where AnalyzeBranch 21333644ba8d22a91b8fe0f0da3d73fc7cf38a46b06Chris Lattner /// returns success and when an unconditional branch (TBB is non-null, FBB is 214b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng /// null, Cond is empty) needs to be inserted. It returns the number of 215b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng /// instructions inserted. 216b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng virtual unsigned InsertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB, 217d51c87f22f9b666204b27b301af771bc5badc142Chris Lattner MachineBasicBlock *FBB, 21844eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson const SmallVectorImpl<MachineOperand> &Cond) const { 21924321d7e23a482cbd0b7502f43e9026f87a3684dRafael Espindola assert(0 && "Target didn't implement TargetInstrInfo::InsertBranch!"); 220b5cdaa257e167a08a8a54ea9249d847ccc415ce0Evan Cheng return 0; 221b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner } 222b2cd26127973b97c3ed8d74a063e70a259369e44Chris Lattner 223a6548d0f29d848ce5e2c10ebd6aae196ce3d8651Evan Cheng /// copyRegToReg - Emit instructions to copy between a pair of registers. It 224a6548d0f29d848ce5e2c10ebd6aae196ce3d8651Evan Cheng /// returns false if the target does not how to copy between the specified 225a6548d0f29d848ce5e2c10ebd6aae196ce3d8651Evan Cheng /// registers. 226940f83e772ca2007d62faffc83094bd7e8da6401Owen Anderson virtual bool copyRegToReg(MachineBasicBlock &MBB, 227d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson MachineBasicBlock::iterator MI, 228d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson unsigned DestReg, unsigned SrcReg, 229d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *DestRC, 230d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson const TargetRegisterClass *SrcRC) const { 231d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson assert(0 && "Target didn't implement TargetInstrInfo::copyRegToReg!"); 232c93457053cfecb24105ee3800c8e53921b950d8fCedric Venet return false; 233d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson } 234d10fd9791c20fd8368fa0ce94b626b769c6c8ba0Owen Anderson 235f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void storeRegToStackSlot(MachineBasicBlock &MBB, 236f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineBasicBlock::iterator MI, 237f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned SrcReg, bool isKill, int FrameIndex, 238f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson const TargetRegisterClass *RC) const { 239f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Target didn't implement TargetInstrInfo::storeRegToStackSlot!"); 240f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 241f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 242f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void storeRegToAddr(MachineFunction &MF, unsigned SrcReg, bool isKill, 243f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineOperand> &Addr, 244f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson const TargetRegisterClass *RC, 245f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineInstr*> &NewMIs) const { 246f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Target didn't implement TargetInstrInfo::storeRegToAddr!"); 247f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 248f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 249f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void loadRegFromStackSlot(MachineBasicBlock &MBB, 250f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson MachineBasicBlock::iterator MI, 251f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson unsigned DestReg, int FrameIndex, 252f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson const TargetRegisterClass *RC) const { 253f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromStackSlot!"); 254f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 255f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 256f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson virtual void loadRegFromAddr(MachineFunction &MF, unsigned DestReg, 257f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineOperand> &Addr, 258f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson const TargetRegisterClass *RC, 259f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson SmallVectorImpl<MachineInstr*> &NewMIs) const { 260f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson assert(0 && "Target didn't implement TargetInstrInfo::loadRegFromAddr!"); 261f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson } 262f6372aa1cc568df19da7c5023e83c75aa9404a07Owen Anderson 263d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// spillCalleeSavedRegisters - Issues instruction(s) to spill all callee 264d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// saved registers and returns true if it isn't possible / profitable to do 265d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// so by issuing a series of store instructions via 266d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// storeRegToStackSlot(). Returns false otherwise. 267d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson virtual bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 268d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson MachineBasicBlock::iterator MI, 269d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson const std::vector<CalleeSavedInfo> &CSI) const { 270d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson return false; 271d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson } 272d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson 273d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// restoreCalleeSavedRegisters - Issues instruction(s) to restore all callee 274d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// saved registers and returns true if it isn't possible / profitable to do 275d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// so by issuing a series of load instructions via loadRegToStackSlot(). 276d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson /// Returns false otherwise. 277d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson virtual bool restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 278d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson MachineBasicBlock::iterator MI, 279d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson const std::vector<CalleeSavedInfo> &CSI) const { 280d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson return false; 281d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson } 282d94b6a16fec7d5021e3922b0e34f9ddb268d54b1Owen Anderson 28343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// foldMemoryOperand - Attempt to fold a load or store of the specified stack 28443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// slot into the specified machine instruction for the specified operand(s). 28543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// If this is possible, a new instruction is returned with the specified 28643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// operand folded, otherwise NULL is returned. The client is responsible for 28743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// removing the old instruction and adding the new one in the instruction 28843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// stream. 2895fd79d0560570fed977788a86fa038b898564dfaEvan Cheng virtual MachineInstr* foldMemoryOperand(MachineFunction &MF, 2905fd79d0560570fed977788a86fa038b898564dfaEvan Cheng MachineInstr* MI, 29143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<unsigned> &Ops, 29243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson int FrameIndex) const { 29343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return 0; 29443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 29543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 29643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// foldMemoryOperand - Same as the previous version except it allows folding 29743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// of any load and store from / to any address, not just from a specific 29843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// stack slot. 2995fd79d0560570fed977788a86fa038b898564dfaEvan Cheng virtual MachineInstr* foldMemoryOperand(MachineFunction &MF, 3005fd79d0560570fed977788a86fa038b898564dfaEvan Cheng MachineInstr* MI, 30143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<unsigned> &Ops, 30243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson MachineInstr* LoadMI) const { 30343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return 0; 30443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 30543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 30643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// canFoldMemoryOperand - Returns true if the specified load / store is 30743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// folding is possible. 30843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson virtual 30943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson bool canFoldMemoryOperand(MachineInstr *MI, 31043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<unsigned> &Ops) const{ 31143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return false; 31243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 31343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 31443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// unfoldMemoryOperand - Separate a single instruction which folded a load or 31543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// a store or a load and a store into two or more instruction. If this is 31643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// possible, returns true as well as the new instructions by reference. 31743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson virtual bool unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI, 31843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson unsigned Reg, bool UnfoldLoad, bool UnfoldStore, 31943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<MachineInstr*> &NewMIs) const{ 32043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return false; 32143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 32243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 32343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson virtual bool unfoldMemoryOperand(SelectionDAG &DAG, SDNode *N, 32443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson SmallVectorImpl<SDNode*> &NewNodes) const { 32543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return false; 32643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 32743dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 32843dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// getOpcodeAfterMemoryUnfold - Returns the opcode of the would be new 32943dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// instruction after load / store are unfolded from an instruction of the 33043dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// specified opcode. It returns zero if the specified unfolding is not 33143dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson /// possible. 33243dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson virtual unsigned getOpcodeAfterMemoryUnfold(unsigned Opc, 33343dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson bool UnfoldLoad, bool UnfoldStore) const { 33443dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson return 0; 33543dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson } 33643dbe05279b753aabda571d9c83eaeb36987001aOwen Anderson 337c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner /// BlockHasNoFallThrough - Return true if the specified block does not 338c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner /// fall-through into its successor block. This is primarily used when a 339c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner /// branch is unanalyzable. It is useful for things like unconditional 340c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner /// indirect branches (jump tables). 341c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner virtual bool BlockHasNoFallThrough(MachineBasicBlock &MBB) const { 342c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner return false; 343c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner } 344c24ff8ed12d01a1b1d2fac57876fc7580024ec49Chris Lattner 3455f1e4dbdf77de6887441af20857967a3d24c01abChris Lattner /// ReverseBranchCondition - Reverses the branch condition of the specified 3465f1e4dbdf77de6887441af20857967a3d24c01abChris Lattner /// condition list, returning false on success and true if it cannot be 3475f1e4dbdf77de6887441af20857967a3d24c01abChris Lattner /// reversed. 34844eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson virtual 34944eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson bool ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const { 3505f1e4dbdf77de6887441af20857967a3d24c01abChris Lattner return true; 351905f7af59cb85ea71b6c011f1e79f24f8db16efcAlkis Evlogimenos } 3520271077eba5f62796f4c725baa8e7fc88bf97650Chris Lattner 35365e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner /// insertNoop - Insert a noop into the instruction stream at the specified 35465e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner /// point. 35565e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner virtual void insertNoop(MachineBasicBlock &MBB, 35665e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner MachineBasicBlock::iterator MI) const { 35765e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner assert(0 && "Target didn't implement insertNoop!"); 35865e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner abort(); 35965e9f3969bec427f14d41f0aaef12ed689ca85b5Chris Lattner } 36021d03f2de0087d60dbf575d95924404a97852879Evan Cheng 361bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng /// isPredicated - Returns true if the instruction is already predicated. 3624f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng /// 363f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng virtual bool isPredicated(const MachineInstr *MI) const { 3644f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng return false; 3654f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng } 3664f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng 367bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng /// isUnpredicatedTerminator - Returns true if the instruction is a 368bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng /// terminator instruction that has not been predicated. 369318093b6f8d21ac8eab34573b0526984895fe941Dale Johannesen virtual bool isUnpredicatedTerminator(const MachineInstr *MI) const; 370bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng 3710402e170e8058cc5256e0c7b94ae37484253d73dEvan Cheng /// PredicateInstruction - Convert the instruction into a predicated 37202c602b333ed2a1a13a17981f3c3f2f5463d5e5cEvan Cheng /// instruction. It returns true if the operation was successful. 373f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng virtual 374f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng bool PredicateInstruction(MachineInstr *MI, 37544eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson const SmallVectorImpl<MachineOperand> &Pred) const = 0; 3764f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng 377bfd2ec4a8ef51ebe982363a7e8d7156fdb3827d8Evan Cheng /// SubsumesPredicate - Returns true if the first specified predicate 3784f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng /// subsumes the second, e.g. GE subsumes GT. 379f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng virtual 38044eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson bool SubsumesPredicate(const SmallVectorImpl<MachineOperand> &Pred1, 38144eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson const SmallVectorImpl<MachineOperand> &Pred2) const { 3824f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng return false; 3834f85cd77046d76bd9091aa6caa06e767bd22f64cEvan Cheng } 3840402e170e8058cc5256e0c7b94ae37484253d73dEvan Cheng 385ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng /// DefinesPredicate - If the specified instruction defines any predicate 386ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng /// or condition code register(s) used for predication, returns true as well 387ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng /// as the definition predicate(s) by reference. 388ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng virtual bool DefinesPredicate(MachineInstr *MI, 389ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng std::vector<MachineOperand> &Pred) const { 390ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng return false; 391ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng } 392ed80ef6089ef83bd1c79f1477d7a12a949474af5Evan Cheng 39321d03f2de0087d60dbf575d95924404a97852879Evan Cheng /// getPointerRegClass - Returns a TargetRegisterClass used for pointer 39421d03f2de0087d60dbf575d95924404a97852879Evan Cheng /// values. 39521d03f2de0087d60dbf575d95924404a97852879Evan Cheng virtual const TargetRegisterClass *getPointerRegClass() const { 39621d03f2de0087d60dbf575d95924404a97852879Evan Cheng assert(0 && "Target didn't implement getPointerRegClass!"); 39721d03f2de0087d60dbf575d95924404a97852879Evan Cheng abort(); 398fb062ece96092e70a835c0d462613b07228d60a3Jeff Cohen return 0; // Must return a value in order to compile with VS 2005 39921d03f2de0087d60dbf575d95924404a97852879Evan Cheng } 40052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 40152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray /// GetInstSize - Returns the size of the specified Instruction. 40252e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray /// 40352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray virtual unsigned GetInstSizeInBytes(const MachineInstr *MI) const { 40452e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray assert(0 && "Target didn't implement TargetInstrInfo::GetInstSize!"); 40552e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray return 0; 40652e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray } 40752e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 40852e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray /// GetFunctionSizeInBytes - Returns the size of the specified MachineFunction. 40952e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray /// 41052e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const = 0; 41152e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray 412a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 413a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 414641055225092833197efe8e5bce01d50bcf1daaeChris Lattner/// TargetInstrInfoImpl - This is the default implementation of 415641055225092833197efe8e5bce01d50bcf1daaeChris Lattner/// TargetInstrInfo, which just provides a couple of default implementations 416641055225092833197efe8e5bce01d50bcf1daaeChris Lattner/// for various methods. This separated out because it is implemented in 417641055225092833197efe8e5bce01d50bcf1daaeChris Lattner/// libcodegen, not in libtarget. 418641055225092833197efe8e5bce01d50bcf1daaeChris Lattnerclass TargetInstrInfoImpl : public TargetInstrInfo { 419641055225092833197efe8e5bce01d50bcf1daaeChris Lattnerprotected: 420749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner TargetInstrInfoImpl(const TargetInstrDesc *desc, unsigned NumOpcodes) 421641055225092833197efe8e5bce01d50bcf1daaeChris Lattner : TargetInstrInfo(desc, NumOpcodes) {} 422641055225092833197efe8e5bce01d50bcf1daaeChris Lattnerpublic: 42358dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng virtual MachineInstr *commuteInstruction(MachineInstr *MI, 42458dcb0e0cd3fa973b5fd005aecab1df6aeea5cd6Evan Cheng bool NewMI = false) const; 425f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng virtual bool CommuteChangesDestination(MachineInstr *MI, 426f20db159541bf27f5d2fdf8d4ba1c8b270b936dfEvan Cheng unsigned &OpIdx) const; 427641055225092833197efe8e5bce01d50bcf1daaeChris Lattner virtual bool PredicateInstruction(MachineInstr *MI, 42844eb65cf58e3ab9b5621ce72256d1621a18aeed7Owen Anderson const SmallVectorImpl<MachineOperand> &Pred) const; 429ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng virtual void reMaterialize(MachineBasicBlock &MBB, 430ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng MachineBasicBlock::iterator MI, 431ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng unsigned DestReg, 432ca1267c02b025cc719190b05f9e1a5d174a9caf7Evan Cheng const MachineInstr *Orig) const; 43352e724ad7e679ee590f4bd763d55280586a8f1bcNicolas Geoffray virtual unsigned GetFunctionSizeInBytes(const MachineFunction &MF) const; 434641055225092833197efe8e5bce01d50bcf1daaeChris Lattner}; 435641055225092833197efe8e5bce01d50bcf1daaeChris Lattner 436d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 437d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 438a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#endif 439