TargetInstrInfo.h revision ab8672c8bb83e722b856eac67863542ea7e0cbb2
1075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner//===-- llvm/Target/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===// 26fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 36fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// The LLVM Compiler Infrastructure 46fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 56fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// This file was developed by the LLVM research group and is distributed under 66fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// the University of Illinois Open Source License. See LICENSE.TXT for details. 76fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell// 86fbcc26f1460eaee4e0eb8b426fc1ff0c7af11beJohn Criswell//===----------------------------------------------------------------------===// 9a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 10a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// This file describes the target machine instructions to the code generator. 11a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 12f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner//===----------------------------------------------------------------------===// 13a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 143501feab811c86c9659248a4875fc31a3165f84dChris Lattner#ifndef LLVM_TARGET_TARGETINSTRINFO_H 153501feab811c86c9659248a4875fc31a3165f84dChris Lattner#define LLVM_TARGET_TARGETINSTRINFO_H 16a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 17360e17eaf1a2abda82b02235dc57d26d8f83c937Chris Lattner#include "Support/DataTypes.h" 182cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner#include <vector> 19be67780f31958b05ad3c510ca3a973d327517e86Chris Lattner#include <cassert> 20a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 21d0fde30ce850b78371fd1386338350591f9ff494Brian Gaekenamespace llvm { 22d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 235684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass MachineInstr; 24f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattnerclass TargetMachine; 255684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Value; 26588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adveclass Type; 275684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Instruction; 282cc214c06cbb94f95928636981c9805d6300cff1Chris Lattnerclass Constant; 29e7506a366e8bd56c97d10beb68e4db953aebaecaChris Lattnerclass Function; 30c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adveclass MachineCodeForInstruction; 31a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 32f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 33f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner// Data types used to define information about a single machine instruction 34f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 35a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 36ab8672c8bb83e722b856eac67863542ea7e0cbb2Alkis Evlogimenostypedef short MachineOpCode; 37c188b733babbcdb0ff51613d0bb133e0496963b6Chris Lattnertypedef unsigned InstrSchedClass; 38a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 39851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adveconst MachineOpCode INVALID_MACHINE_OPCODE = -1; 40851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve 41851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve 42a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//--------------------------------------------------------------------------- 433501feab811c86c9659248a4875fc31a3165f84dChris Lattner// struct TargetInstrDescriptor: 44a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Predefined information about each machine instruction. 45a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Designed to initialized statically. 463501feab811c86c9659248a4875fc31a3165f84dChris Lattner// 47a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 48075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_NOP_FLAG = 1 << 0; 49075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_BRANCH_FLAG = 1 << 1; 50075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CALL_FLAG = 1 << 2; 51075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_RET_FLAG = 1 << 3; 52075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_ARITH_FLAG = 1 << 4; 53075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CC_FLAG = 1 << 6; 54075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_LOGICAL_FLAG = 1 << 6; 55075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_INT_FLAG = 1 << 7; 56075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_FLOAT_FLAG = 1 << 8; 57075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CONDL_FLAG = 1 << 9; 58075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_LOAD_FLAG = 1 << 10; 59075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_PREFETCH_FLAG = 1 << 11; 60075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_STORE_FLAG = 1 << 12; 61075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_DUMMY_PHI_FLAG = 1 << 13; 62075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_PSEUDO_FLAG = 1 << 14; // Pseudo instruction 639ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub 64075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_2_ADDR_FLAG = 1 << 15; 65a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 66075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// M_TERMINATOR_FLAG - Is this instruction part of the terminator for a basic 67075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// block? Typically this is things like return and branch instructions. 68075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// Various passes use this to insert code into the bottom of a basic block, but 69075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// before control flow occurs. 70075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_TERMINATOR_FLAG = 1 << 16; 71075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner 72075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerstruct TargetInstrDescriptor { 734683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char * Name; // Assembly language mnemonic for the opcode. 74c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int numOperands; // Number of args; -1 if variable #args 75c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int resultPos; // Position of the result; -1 if no result 76e28adaa633393d5beea7f8e97951cbe1e3cd1646Brian Gaeke unsigned maxImmedConst; // Largest +ve constant in IMMED field or 0. 77697954c15da58bd8b186dbafdedd8b06db770201Chris Lattner bool immedIsSignExtended; // Is IMMED field sign-extended? If so, 7875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner // smallest -ve value is -(maxImmedConst+1). 79c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numDelaySlots; // Number of delay slots after instruction 8075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned latency; // Latency in machine cycles 8175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner InstrSchedClass schedClass; // enum identifying instr sched class 8275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned Flags; // flags identifying machine instr class 8375e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned TSFlags; // Target Specific Flag values 84f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitUses; // Registers implicitly read by this instr 85f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitDefs; // Registers implicitly defined by this instr 86a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 87a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 88a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 893501feab811c86c9659248a4875fc31a3165f84dChris Lattner//--------------------------------------------------------------------------- 903501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// 913501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// TargetInstrInfo - Interface to description of machine instructions 923501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// 93075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerclass TargetInstrInfo { 94075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner const TargetInstrDescriptor* desc; // raw array to allow static init'n 95075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned descSize; // number of entries in the desc array 96075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned numRealOpCodes; // number of non-dummy op codes 97a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 98075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner TargetInstrInfo(const TargetInstrInfo &); // DO NOT IMPLEMENT 99075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner void operator=(const TargetInstrInfo &); // DO NOT IMPLEMENT 100a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Advepublic: 101075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner TargetInstrInfo(const TargetInstrDescriptor *desc, unsigned descSize, 102075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned numRealOpCodes); 103075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner virtual ~TargetInstrInfo(); 10470535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner 1059ca5a2a33e98b0a93dc335a00f4d63aeb9a192b8Chris Lattner // Invariant: All instruction sets use opcode #0 as the PHI instruction 1069ca5a2a33e98b0a93dc335a00f4d63aeb9a192b8Chris Lattner enum { PHI = 0 }; 107a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 108a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumRealOpCodes() const { return numRealOpCodes; } 109a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumTotalOpCodes() const { return descSize; } 110a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 111e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// get - Return the machine instruction descriptor that corresponds to the 112e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// specified instruction opcode. 113e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// 114075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner const TargetInstrDescriptor& get(MachineOpCode opCode) const { 115a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve assert(opCode >= 0 && opCode < (int)descSize); 116a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return desc[opCode]; 117a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 1184683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner 1194683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char *getName(MachineOpCode opCode) const { 1204683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner return get(opCode).Name; 1214683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner } 122a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 123a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int getNumOperands(MachineOpCode opCode) const { 124e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).numOperands; 125a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 126a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 127a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int getResultPos(MachineOpCode opCode) const { 128e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).resultPos; 129a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 130a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 131a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumDelaySlots(MachineOpCode opCode) const { 132e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).numDelaySlots; 133a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 134a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 135a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve InstrSchedClass getSchedClass(MachineOpCode opCode) const { 136e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).schedClass; 137a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 138d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 139d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke const unsigned *getImplicitUses(MachineOpCode opCode) const { 140d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke return get(opCode).ImplicitUses; 141d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 142d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 143d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke const unsigned *getImplicitDefs(MachineOpCode opCode) const { 144d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke return get(opCode).ImplicitDefs; 145d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 146d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 147a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 148a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Query instruction class flags according to the machine-independent 149a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // flags listed above. 150a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 151a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isNop(MachineOpCode opCode) const { 15275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_NOP_FLAG; 153a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 154a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isBranch(MachineOpCode opCode) const { 15575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_BRANCH_FLAG; 156a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 157a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isCall(MachineOpCode opCode) const { 15875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CALL_FLAG; 159a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 160a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isReturn(MachineOpCode opCode) const { 16175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_RET_FLAG; 162a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 163a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isControlFlow(MachineOpCode opCode) const { 16475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_BRANCH_FLAG 16575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_CALL_FLAG 16675e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_RET_FLAG; 167a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 168a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isArith(MachineOpCode opCode) const { 16975e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_ARITH_FLAG; 170a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 171a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isCCInstr(MachineOpCode opCode) const { 17275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CC_FLAG; 173a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 174a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLogical(MachineOpCode opCode) const { 17575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOGICAL_FLAG; 176a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 177a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isIntInstr(MachineOpCode opCode) const { 17875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_INT_FLAG; 179a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 180a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isFloatInstr(MachineOpCode opCode) const { 18175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_FLOAT_FLAG; 182a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 183502374a58fcd1c28065170a8c4a210be002ff190Chris Lattner bool isConditional(MachineOpCode opCode) const { 18475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CONDL_FLAG; 185a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 186a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLoad(MachineOpCode opCode) const { 18775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG; 188a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 189a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isPrefetch(MachineOpCode opCode) const { 19075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_PREFETCH_FLAG; 191a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 192a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLoadOrPrefetch(MachineOpCode opCode) const { 19375e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG 19475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_PREFETCH_FLAG; 195a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 196a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isStore(MachineOpCode opCode) const { 19775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_STORE_FLAG; 198a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 199a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isMemoryAccess(MachineOpCode opCode) const { 20075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG 20175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_PREFETCH_FLAG 20275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_STORE_FLAG; 203a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 204075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isDummyPhiInstr(MachineOpCode opCode) const { 20575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_DUMMY_PHI_FLAG; 206a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 207075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isPseudoInstr(MachineOpCode opCode) const { 20875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_PSEUDO_FLAG; 209b9f550ddfbaf963a0aced2df8cd40c71021fd3e5Ruchira Sasanka } 210075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isTwoAddrInstr(MachineOpCode opCode) const { 2119ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman return get(opCode).Flags & M_2_ADDR_FLAG; 2129ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman } 213075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isTerminatorInstr(unsigned Opcode) const { 214075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner return get(Opcode).Flags & M_TERMINATOR_FLAG; 215075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner } 216d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 2175e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos // 2185e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos // Return true if the instruction is a register to register move and 2195e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos // leave the source and dest operands in the passed parameters. 2205e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos // 2215e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos virtual bool isMoveInstr(const MachineInstr& MI, 2225e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& sourceReg, 2235e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos unsigned& destReg) const { 2245e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos return false; 2255e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos } 2265e30002af70ef09a42cac155d9196f7f0f3b1695Alkis Evlogimenos 227a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Check if an instruction can be issued before its operands are ready, 228a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // or if a subsequent instruction that uses its result can be issued 229a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // before the results are ready. 230a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Default to true since most instructions on many architectures allow this. 231a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 232a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool hasOperandInterlock(MachineOpCode opCode) const { 233a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return true; 234a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 235a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 236a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool hasResultInterlock(MachineOpCode opCode) const { 237a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return true; 238a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 239a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 240a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 241a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Latencies for individual instructions and instruction pairs 242a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 243a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual int minLatency(MachineOpCode opCode) const { 244e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).latency; 245a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 246a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 247a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual int maxLatency(MachineOpCode opCode) const { 248e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).latency; 249a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 2504c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve 2514c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 2524c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // Which operand holds an immediate constant? Returns -1 if none 2534c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 254851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve virtual int getImmedConstantPos(MachineOpCode opCode) const { 2554c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve return -1; // immediate position is machine specific, so say -1 == "none" 2564c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve } 257a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 258a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Check if the specified constant fits in the immediate field 259a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction 260a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 261a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool constantFitsInImmedField(MachineOpCode opCode, 262a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int64_t intValue) const; 263a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 264e28adaa633393d5beea7f8e97951cbe1e3cd1646Brian Gaeke // Return the largest positive constant that can be held in the IMMED field 265a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction. 266a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // isSignExtended is set to true if the value is sign-extended before use 267a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // (this is true for all immediate fields in SPARC instructions). 268a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Return 0 if the instruction has no IMMED field. 269a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 270a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual uint64_t maxImmedConstant(MachineOpCode opCode, 271a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool &isSignExtended) const { 272e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner isSignExtended = get(opCode).immedIsSignExtended; 273e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).maxImmedConst; 274a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 2755684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve 2765684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve //------------------------------------------------------------------------- 2774900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // Queries about representation of LLVM quantities (e.g., constants) 2784900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve //------------------------------------------------------------------------- 2794900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 2802cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// ConstantTypeMustBeLoaded - Test if this type of constant must be loaded 2812cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// from memory into a register, i.e., cannot be set bitwise in register and 2822cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// cannot use immediate fields of instructions. Note that this only makes 2832cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// sense for primitive types. 2842cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// 2852cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner virtual bool ConstantTypeMustBeLoaded(const Constant* CV) const; 2864900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 2874900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // Test if this constant may not fit in the immediate field of the 2884900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // machine instructions (probably) generated for this instruction. 2894900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // 2904900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve virtual bool ConstantMayNotFitInImmedField(const Constant* CV, 2914900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve const Instruction* I) const { 2924900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve return true; // safe but very conservative 2934900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve } 2944900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 29500b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman 29600b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// createNOPinstr - returns the target's implementation of NOP, which is 29700b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// usually a pseudo-instruction, implemented by a degenerate version of 29800b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// another instruction, e.g. X86: xchg ax, ax; SparcV9: sethi g0, 0 29900b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// 30000b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman virtual MachineInstr* createNOPinstr() const = 0; 30100b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman 30212745c55e1d5a6e76d41684f1b507ea7c6b888acMisha Brukman /// isNOPinstr - not having a special NOP opcode, we need to know if a given 30312745c55e1d5a6e76d41684f1b507ea7c6b888acMisha Brukman /// instruction is interpreted as an `official' NOP instr, i.e., there may be 30412745c55e1d5a6e76d41684f1b507ea7c6b888acMisha Brukman /// more than one way to `do nothing' but only one canonical way to slack off. 30500b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// 30600b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman virtual bool isNOPinstr(const MachineInstr &MI) const = 0; 30700b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman 3084900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve //------------------------------------------------------------------------- 3095684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // Code generation support for creating individual machine instructions 3105fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner // 3115fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner // WARNING: These methods are Sparc specific 3125fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner // 3135684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve //------------------------------------------------------------------------- 314d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 315d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // Get certain common op codes for the current target. this and all the 316d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // Create* methods below should be moved to a machine code generation class 317d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // 3185fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner virtual MachineOpCode getNOPOpCode() const { abort(); } 319d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 320588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // Get the value of an integral constant in the form that must 321588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // be put into the machine register. The specified constant is interpreted 322588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // as (i.e., converted if necessary to) the specified destination type. The 323588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // result is always returned as an uint64_t, since the representation of 324588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // int64_t and uint64_t are identical. The argument can be any known const. 325588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // 326588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // isValidConstant is set to true if a valid constant was found. 327588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve // 328588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve virtual uint64_t ConvertConstantToIntType(const TargetMachine &target, 329588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve const Value *V, 330588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve const Type *destType, 331588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve bool &isValidConstant) const { 332588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve abort(); 333588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve } 334588668d4681bf928e09534c373b1bcf86757f899Vikram S. Adve 3355684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // Create an instruction sequence to put the constant `val' into 336e9bb2df410f7a22decad9a883f7139d5857c1520Chris Lattner // the virtual register `dest'. `val' may be a Constant or a 3375684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // GlobalValue, viz., the constant address of a global variable or function. 338c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 339c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 340bba2485c709adecd65526fbcfea77f2344d29d69Vikram S. Adve // Symbolic constants or constants that must be accessed from memory 341fce1143bcfa73f61845002fa50473d1a01384202Misha Brukman // are added to the constant pool via MachineFunction::get(F). 3425684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // 343c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateCodeToLoadConst(const TargetMachine& target, 344c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 345851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve Value* val, 3465684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve Instruction* dest, 347c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 3485fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& mcfi) const { 3495fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3505fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 351bba2485c709adecd65526fbcfea77f2344d29d69Vikram S. Adve 3524938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // Create an instruction sequence to copy an integer value `val' 3534938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // to a floating point value `dest' by copying to memory and back. 3544938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // val must be an integral type. dest must be a Float or Double. 355c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 356c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 357c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 35844508e333cc1d36e699aa330d84312d1c8fc655aVikram S. Adve // 3595fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner virtual void CreateCodeToCopyIntToFloat(const TargetMachine& target, 3605fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Function* F, 3615fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Value* val, 3625fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Instruction* dest, 3635fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner std::vector<MachineInstr*>& mvec, 3645fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 3655fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3665fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 3674938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve 3684938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // Similarly, create an instruction sequence to copy an FP value 3694938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // `val' to an integer value `dest' by copying to memory and back. 370c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 371c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 372c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 373c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // 3745fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner virtual void CreateCodeToCopyFloatToInt(const TargetMachine& target, 3755fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Function* F, 3765fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Value* val, 3775fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Instruction* dest, 3785fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner std::vector<MachineInstr*>& mvec, 3795fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 3805fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3815fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 382c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve 383c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Create instruction(s) to copy src to dest, for arbitrary types 384c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 385c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 386c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 3874938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // 388851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve virtual void CreateCopyInstructionsByType(const TargetMachine& target, 3895fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Function* F, 3905fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Value* src, 3915fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Instruction* dest, 3925fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner std::vector<MachineInstr*>& mvec, 3935fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 3945fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3955fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 396c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve 397c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Create instruction sequence to produce a sign-extended register value 398c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // from an arbitrary sized value (sized in bits, not bytes). 39968f716190baa08675793adba428605797eb658a4Vikram S. Adve // The generated instructions are appended to `mvec'. 40068f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 401c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 402c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // 403c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateSignExtensionInstructions(const TargetMachine& target, 404c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 40568f716190baa08675793adba428605797eb658a4Vikram S. Adve Value* srcVal, 4069d0168d2d54008729632f676475ce710448cf8a8Vikram S. Adve Value* destVal, 407c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numLowBits, 408c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 4095fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 4105fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 4115fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 41268f716190baa08675793adba428605797eb658a4Vikram S. Adve 41368f716190baa08675793adba428605797eb658a4Vikram S. Adve // Create instruction sequence to produce a zero-extended register value 41468f716190baa08675793adba428605797eb658a4Vikram S. Adve // from an arbitrary sized value (sized in bits, not bytes). 41568f716190baa08675793adba428605797eb658a4Vikram S. Adve // The generated instructions are appended to `mvec'. 41668f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 41768f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any stack space required is allocated via mcff. 41868f716190baa08675793adba428605797eb658a4Vikram S. Adve // 41968f716190baa08675793adba428605797eb658a4Vikram S. Adve virtual void CreateZeroExtensionInstructions(const TargetMachine& target, 42068f716190baa08675793adba428605797eb658a4Vikram S. Adve Function* F, 42168f716190baa08675793adba428605797eb658a4Vikram S. Adve Value* srcVal, 4229d0168d2d54008729632f676475ce710448cf8a8Vikram S. Adve Value* destVal, 423c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned srcSizeInBits, 42468f716190baa08675793adba428605797eb658a4Vikram S. Adve std::vector<MachineInstr*>& mvec, 4255fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& mcfi) const { 4265fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 4275fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 428a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 429a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 430d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke} // End llvm namespace 431d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 432a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#endif 433