TargetInstrInfo.h revision be67780f31958b05ad3c510ca3a973d327517e86
1075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner//===-- llvm/Target/TargetInstrInfo.h - Instruction Info --------*- C++ -*-===// 2a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 3a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// This file describes the target machine instructions to the code generator. 4a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// 5f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner//===----------------------------------------------------------------------===// 6a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 73501feab811c86c9659248a4875fc31a3165f84dChris Lattner#ifndef LLVM_TARGET_TARGETINSTRINFO_H 83501feab811c86c9659248a4875fc31a3165f84dChris Lattner#define LLVM_TARGET_TARGETINSTRINFO_H 9a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 10360e17eaf1a2abda82b02235dc57d26d8f83c937Chris Lattner#include "Support/DataTypes.h" 112cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner#include <vector> 12be67780f31958b05ad3c510ca3a973d327517e86Chris Lattner#include <cassert> 13a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 145684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass MachineInstr; 15f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattnerclass TargetMachine; 165684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Value; 175684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adveclass Instruction; 182cc214c06cbb94f95928636981c9805d6300cff1Chris Lattnerclass Constant; 19e7506a366e8bd56c97d10beb68e4db953aebaecaChris Lattnerclass Function; 20c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adveclass MachineCodeForInstruction; 21a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 22f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 23f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner// Data types used to define information about a single machine instruction 24f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattner//--------------------------------------------------------------------------- 25a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 26f3aaadf48277acddc3f6fdc4cc8d18b13d313595Chris Lattnertypedef int MachineOpCode; 27c188b733babbcdb0ff51613d0bb133e0496963b6Chris Lattnertypedef unsigned InstrSchedClass; 28a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 29851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adveconst MachineOpCode INVALID_MACHINE_OPCODE = -1; 30851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve 31851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve 32a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve//--------------------------------------------------------------------------- 333501feab811c86c9659248a4875fc31a3165f84dChris Lattner// struct TargetInstrDescriptor: 34a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Predefined information about each machine instruction. 35a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve// Designed to initialized statically. 363501feab811c86c9659248a4875fc31a3165f84dChris Lattner// 37a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 38075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_NOP_FLAG = 1 << 0; 39075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_BRANCH_FLAG = 1 << 1; 40075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CALL_FLAG = 1 << 2; 41075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_RET_FLAG = 1 << 3; 42075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_ARITH_FLAG = 1 << 4; 43075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CC_FLAG = 1 << 6; 44075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_LOGICAL_FLAG = 1 << 6; 45075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_INT_FLAG = 1 << 7; 46075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_FLOAT_FLAG = 1 << 8; 47075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_CONDL_FLAG = 1 << 9; 48075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_LOAD_FLAG = 1 << 10; 49075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_PREFETCH_FLAG = 1 << 11; 50075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_STORE_FLAG = 1 << 12; 51075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_DUMMY_PHI_FLAG = 1 << 13; 52075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_PSEUDO_FLAG = 1 << 14; // Pseudo instruction 539ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman// 3-addr instructions which really work like 2-addr ones, eg. X86 add/sub 54075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_2_ADDR_FLAG = 1 << 15; 55a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 56075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// M_TERMINATOR_FLAG - Is this instruction part of the terminator for a basic 57075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// block? Typically this is things like return and branch instructions. 58075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// Various passes use this to insert code into the bottom of a basic block, but 59075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner// before control flow occurs. 60075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerconst unsigned M_TERMINATOR_FLAG = 1 << 16; 61075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner 62075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerstruct TargetInstrDescriptor { 634683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char * Name; // Assembly language mnemonic for the opcode. 64c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int numOperands; // Number of args; -1 if variable #args 65c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner int resultPos; // Position of the result; -1 if no result 66c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned maxImmedConst; // Largest +ve constant in IMMMED field or 0. 67697954c15da58bd8b186dbafdedd8b06db770201Chris Lattner bool immedIsSignExtended; // Is IMMED field sign-extended? If so, 6875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner // smallest -ve value is -(maxImmedConst+1). 69c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numDelaySlots; // Number of delay slots after instruction 7075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned latency; // Latency in machine cycles 7175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner InstrSchedClass schedClass; // enum identifying instr sched class 7275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned Flags; // flags identifying machine instr class 7375e961ae6b2e2801160e560057ad97ece4443986Chris Lattner unsigned TSFlags; // Target Specific Flag values 74f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitUses; // Registers implicitly read by this instr 75f6d12fbd9cc0355978a739f5ab213eff85b75a19Chris Lattner const unsigned *ImplicitDefs; // Registers implicitly defined by this instr 76a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 77a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 78a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 793501feab811c86c9659248a4875fc31a3165f84dChris Lattner//--------------------------------------------------------------------------- 803501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// 813501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// TargetInstrInfo - Interface to description of machine instructions 823501feab811c86c9659248a4875fc31a3165f84dChris Lattner/// 83075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattnerclass TargetInstrInfo { 84075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner const TargetInstrDescriptor* desc; // raw array to allow static init'n 85075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned descSize; // number of entries in the desc array 86075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned numRealOpCodes; // number of non-dummy op codes 87a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 88075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner TargetInstrInfo(const TargetInstrInfo &); // DO NOT IMPLEMENT 89075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner void operator=(const TargetInstrInfo &); // DO NOT IMPLEMENT 90a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Advepublic: 91075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner TargetInstrInfo(const TargetInstrDescriptor *desc, unsigned descSize, 92075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner unsigned numRealOpCodes); 93075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner virtual ~TargetInstrInfo(); 9470535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner 9570535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner // Invariant: All instruction sets use opcode #0 as the PHI instruction and 9670535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner // opcode #1 as the noop instruction. 9770535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner enum { 9870535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner PHI = 0, NOOP = 1 9970535c608d88ce25fb992dba3b6d3d0176153a09Chris Lattner }; 100a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 101a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumRealOpCodes() const { return numRealOpCodes; } 102a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumTotalOpCodes() const { return descSize; } 103a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 104e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// get - Return the machine instruction descriptor that corresponds to the 105e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// specified instruction opcode. 106e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner /// 107075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner const TargetInstrDescriptor& get(MachineOpCode opCode) const { 108a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve assert(opCode >= 0 && opCode < (int)descSize); 109a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return desc[opCode]; 110a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 1114683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner 1124683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner const char *getName(MachineOpCode opCode) const { 1134683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner return get(opCode).Name; 1144683f9bfb4dc2f5557e8a7a229912e7f2ed366caChris Lattner } 115a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 116a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int getNumOperands(MachineOpCode opCode) const { 117e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).numOperands; 118a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 119a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 120a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int getResultPos(MachineOpCode opCode) const { 121e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).resultPos; 122a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 123a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 124a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve unsigned getNumDelaySlots(MachineOpCode opCode) const { 125e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).numDelaySlots; 126a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 127a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 128a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve InstrSchedClass getSchedClass(MachineOpCode opCode) const { 129e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).schedClass; 130a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 131d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 132d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke const unsigned *getImplicitUses(MachineOpCode opCode) const { 133d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke return get(opCode).ImplicitUses; 134d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 135d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 136d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke const unsigned *getImplicitDefs(MachineOpCode opCode) const { 137d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke return get(opCode).ImplicitDefs; 138d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke } 139d7908f679eeadc108e09e2aca5faba0b5410ea4aBrian Gaeke 140a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 141a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Query instruction class flags according to the machine-independent 142a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // flags listed above. 143a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 144a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isNop(MachineOpCode opCode) const { 14575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_NOP_FLAG; 146a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 147a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isBranch(MachineOpCode opCode) const { 14875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_BRANCH_FLAG; 149a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 150a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isCall(MachineOpCode opCode) const { 15175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CALL_FLAG; 152a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 153a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isReturn(MachineOpCode opCode) const { 15475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_RET_FLAG; 155a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 156a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isControlFlow(MachineOpCode opCode) const { 15775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_BRANCH_FLAG 15875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_CALL_FLAG 15975e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_RET_FLAG; 160a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 161a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isArith(MachineOpCode opCode) const { 16275e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_ARITH_FLAG; 163a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 164a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isCCInstr(MachineOpCode opCode) const { 16575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CC_FLAG; 166a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 167a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLogical(MachineOpCode opCode) const { 16875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOGICAL_FLAG; 169a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 170a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isIntInstr(MachineOpCode opCode) const { 17175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_INT_FLAG; 172a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 173a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isFloatInstr(MachineOpCode opCode) const { 17475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_FLOAT_FLAG; 175a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 176502374a58fcd1c28065170a8c4a210be002ff190Chris Lattner bool isConditional(MachineOpCode opCode) const { 17775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_CONDL_FLAG; 178a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 179a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLoad(MachineOpCode opCode) const { 18075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG; 181a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 182a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isPrefetch(MachineOpCode opCode) const { 18375e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_PREFETCH_FLAG; 184a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 185a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isLoadOrPrefetch(MachineOpCode opCode) const { 18675e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG 18775e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_PREFETCH_FLAG; 188a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 189a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isStore(MachineOpCode opCode) const { 19075e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_STORE_FLAG; 191a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 192a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool isMemoryAccess(MachineOpCode opCode) const { 19375e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_LOAD_FLAG 19475e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_PREFETCH_FLAG 19575e961ae6b2e2801160e560057ad97ece4443986Chris Lattner || get(opCode).Flags & M_STORE_FLAG; 196a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 197075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isDummyPhiInstr(MachineOpCode opCode) const { 19875e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_DUMMY_PHI_FLAG; 199a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 200075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isPseudoInstr(MachineOpCode opCode) const { 20175e961ae6b2e2801160e560057ad97ece4443986Chris Lattner return get(opCode).Flags & M_PSEUDO_FLAG; 202b9f550ddfbaf963a0aced2df8cd40c71021fd3e5Ruchira Sasanka } 203075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isTwoAddrInstr(MachineOpCode opCode) const { 2049ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman return get(opCode).Flags & M_2_ADDR_FLAG; 2059ada014ec09579a7dd3833f779a1de82bd71bce1Misha Brukman } 206075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner bool isTerminatorInstr(unsigned Opcode) const { 207075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner return get(Opcode).Flags & M_TERMINATOR_FLAG; 208075b4a066db31f48e0f6daec34b1ff463523cd3fChris Lattner } 209d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 210a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Check if an instruction can be issued before its operands are ready, 211a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // or if a subsequent instruction that uses its result can be issued 212a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // before the results are ready. 213a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Default to true since most instructions on many architectures allow this. 214a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 215a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool hasOperandInterlock(MachineOpCode opCode) const { 216a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return true; 217a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 218a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 219a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool hasResultInterlock(MachineOpCode opCode) const { 220a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve return true; 221a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 222a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 223a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 224a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Latencies for individual instructions and instruction pairs 225a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 226a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual int minLatency(MachineOpCode opCode) const { 227e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).latency; 228a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 229a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 230a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual int maxLatency(MachineOpCode opCode) const { 231e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).latency; 232a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 2334c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve 2344c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 2354c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // Which operand holds an immediate constant? Returns -1 if none 2364c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve // 237851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve virtual int getImmedConstantPos(MachineOpCode opCode) const { 2384c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve return -1; // immediate position is machine specific, so say -1 == "none" 2394c5fe2d3ed4043c34f3305c081297ba4ca26ddc2Vikram S. Adve } 240a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 241a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Check if the specified constant fits in the immediate field 242a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction 243a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 244a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual bool constantFitsInImmedField(MachineOpCode opCode, 245a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve int64_t intValue) const; 246a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 247a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Return the largest +ve constant that can be held in the IMMMED field 248a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // of this machine instruction. 249a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // isSignExtended is set to true if the value is sign-extended before use 250a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // (this is true for all immediate fields in SPARC instructions). 251a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // Return 0 if the instruction has no IMMED field. 252a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve // 253a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve virtual uint64_t maxImmedConstant(MachineOpCode opCode, 254a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve bool &isSignExtended) const { 255e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner isSignExtended = get(opCode).immedIsSignExtended; 256e30eeaaf72b461aebf3dfcdd7c119eea76458561Chris Lattner return get(opCode).maxImmedConst; 257a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve } 2585684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve 2595684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve //------------------------------------------------------------------------- 2604900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // Queries about representation of LLVM quantities (e.g., constants) 2614900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve //------------------------------------------------------------------------- 2624900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 2632cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// ConstantTypeMustBeLoaded - Test if this type of constant must be loaded 2642cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// from memory into a register, i.e., cannot be set bitwise in register and 2652cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// cannot use immediate fields of instructions. Note that this only makes 2662cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// sense for primitive types. 2672cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner /// 2682cc214c06cbb94f95928636981c9805d6300cff1Chris Lattner virtual bool ConstantTypeMustBeLoaded(const Constant* CV) const; 2694900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 2704900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // Test if this constant may not fit in the immediate field of the 2714900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // machine instructions (probably) generated for this instruction. 2724900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve // 2734900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve virtual bool ConstantMayNotFitInImmedField(const Constant* CV, 2744900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve const Instruction* I) const { 2754900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve return true; // safe but very conservative 2764900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve } 2774900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve 27800b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman 27900b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// createNOPinstr - returns the target's implementation of NOP, which is 28000b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// usually a pseudo-instruction, implemented by a degenerate version of 28100b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// another instruction, e.g. X86: xchg ax, ax; SparcV9: sethi g0, 0 28200b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// 28300b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman virtual MachineInstr* createNOPinstr() const = 0; 28400b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman 28512745c55e1d5a6e76d41684f1b507ea7c6b888acMisha Brukman /// isNOPinstr - not having a special NOP opcode, we need to know if a given 28612745c55e1d5a6e76d41684f1b507ea7c6b888acMisha Brukman /// instruction is interpreted as an `official' NOP instr, i.e., there may be 28712745c55e1d5a6e76d41684f1b507ea7c6b888acMisha Brukman /// more than one way to `do nothing' but only one canonical way to slack off. 28800b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman /// 28900b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman virtual bool isNOPinstr(const MachineInstr &MI) const = 0; 29000b05bd703b0d50133aecf4ce9f48e96d14504b3Misha Brukman 2914900116ab0c17252bdca2e66b87d8b6da1839b54Vikram S. Adve //------------------------------------------------------------------------- 2925684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // Code generation support for creating individual machine instructions 2935fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner // 2945fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner // WARNING: These methods are Sparc specific 2955fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner // 2965684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve //------------------------------------------------------------------------- 297d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 298d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // Get certain common op codes for the current target. this and all the 299d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // Create* methods below should be moved to a machine code generation class 300d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve // 3015fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner virtual MachineOpCode getNOPOpCode() const { abort(); } 302d55697cf136150b697b9bbddce9088e87a1be963Vikram S. Adve 3035684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // Create an instruction sequence to put the constant `val' into 304e9bb2df410f7a22decad9a883f7139d5857c1520Chris Lattner // the virtual register `dest'. `val' may be a Constant or a 3055684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // GlobalValue, viz., the constant address of a global variable or function. 306c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 307c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 308bba2485c709adecd65526fbcfea77f2344d29d69Vikram S. Adve // Symbolic constants or constants that must be accessed from memory 309fce1143bcfa73f61845002fa50473d1a01384202Misha Brukman // are added to the constant pool via MachineFunction::get(F). 3105684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve // 311c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateCodeToLoadConst(const TargetMachine& target, 312c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 313851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve Value* val, 3145684c4e2b41f1d6ddf70b116a84f438040f66297Vikram S. Adve Instruction* dest, 315c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 3165fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& mcfi) const { 3175fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3185fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 319bba2485c709adecd65526fbcfea77f2344d29d69Vikram S. Adve 3204938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // Create an instruction sequence to copy an integer value `val' 3214938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // to a floating point value `dest' by copying to memory and back. 3224938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // val must be an integral type. dest must be a Float or Double. 323c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 324c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 325c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 32644508e333cc1d36e699aa330d84312d1c8fc655aVikram S. Adve // 3275fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner virtual void CreateCodeToCopyIntToFloat(const TargetMachine& target, 3285fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Function* F, 3295fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Value* val, 3305fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Instruction* dest, 3315fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner std::vector<MachineInstr*>& mvec, 3325fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 3335fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3345fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 3354938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve 3364938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // Similarly, create an instruction sequence to copy an FP value 3374938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // `val' to an integer value `dest' by copying to memory and back. 338c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 339c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 340c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 341c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // 3425fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner virtual void CreateCodeToCopyFloatToInt(const TargetMachine& target, 3435fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Function* F, 3445fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Value* val, 3455fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Instruction* dest, 3465fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner std::vector<MachineInstr*>& mvec, 3475fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 3485fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3495fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 350c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve 351c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Create instruction(s) to copy src to dest, for arbitrary types 352c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // The generated instructions are returned in `mvec'. 353c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 354c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 3554938d4528f80dd015c58dec9d6d72bc27bf26bbdVikram S. Adve // 356851597c3b34a03b700f48d284fb9b186ccf9ef91Vikram S. Adve virtual void CreateCopyInstructionsByType(const TargetMachine& target, 3575fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Function* F, 3585fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Value* src, 3595fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner Instruction* dest, 3605fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner std::vector<MachineInstr*>& mvec, 3615fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 3625fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3635fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 364c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve 365c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Create instruction sequence to produce a sign-extended register value 366c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // from an arbitrary sized value (sized in bits, not bytes). 36768f716190baa08675793adba428605797eb658a4Vikram S. Adve // The generated instructions are appended to `mvec'. 36868f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 369c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // Any stack space required is allocated via mcff. 370c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve // 371c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve virtual void CreateSignExtensionInstructions(const TargetMachine& target, 372c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve Function* F, 37368f716190baa08675793adba428605797eb658a4Vikram S. Adve Value* srcVal, 3749d0168d2d54008729632f676475ce710448cf8a8Vikram S. Adve Value* destVal, 375c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned numLowBits, 376c864fde15c68fe56d2af48ddeaddfd4e13006f4aVikram S. Adve std::vector<MachineInstr*>& mvec, 3775fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& MI) const { 3785fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3795fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 38068f716190baa08675793adba428605797eb658a4Vikram S. Adve 38168f716190baa08675793adba428605797eb658a4Vikram S. Adve // Create instruction sequence to produce a zero-extended register value 38268f716190baa08675793adba428605797eb658a4Vikram S. Adve // from an arbitrary sized value (sized in bits, not bytes). 38368f716190baa08675793adba428605797eb658a4Vikram S. Adve // The generated instructions are appended to `mvec'. 38468f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any temp. registers (TmpInstruction) created are recorded in mcfi. 38568f716190baa08675793adba428605797eb658a4Vikram S. Adve // Any stack space required is allocated via mcff. 38668f716190baa08675793adba428605797eb658a4Vikram S. Adve // 38768f716190baa08675793adba428605797eb658a4Vikram S. Adve virtual void CreateZeroExtensionInstructions(const TargetMachine& target, 38868f716190baa08675793adba428605797eb658a4Vikram S. Adve Function* F, 38968f716190baa08675793adba428605797eb658a4Vikram S. Adve Value* srcVal, 3909d0168d2d54008729632f676475ce710448cf8a8Vikram S. Adve Value* destVal, 391c7e65fb7d850d010a141420d7b1d8ddad484d3b3Chris Lattner unsigned srcSizeInBits, 39268f716190baa08675793adba428605797eb658a4Vikram S. Adve std::vector<MachineInstr*>& mvec, 3935fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner MachineCodeForInstruction& mcfi) const { 3945fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner abort(); 3955fa01b9c7a33ecd0e006427ae2a44170cf60422dChris Lattner } 396a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve}; 397a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve 398a578a6d054e8219c730840700d8d5fd29f15a962Vikram S. Adve#endif 399