TargetLowering.h revision 030dae5bcec6ba82ccfbf633354d1766ee70b084
1//===-- llvm/Target/TargetLowering.h - Target Lowering Info -----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes how to lower LLVM code to machine code. This has two 11// main components: 12// 13// 1. Which ValueTypes are natively supported by the target. 14// 2. Which operations are supported for supported ValueTypes. 15// 3. Cost thresholds for alternative implementations of certain operations. 16// 17// In addition it has a few other components, like information about FP 18// immediates. 19// 20//===----------------------------------------------------------------------===// 21 22#ifndef LLVM_TARGET_TARGETLOWERING_H 23#define LLVM_TARGET_TARGETLOWERING_H 24 25#include "llvm/Type.h" 26#include "llvm/CodeGen/ValueTypes.h" 27#include "llvm/Support/DataTypes.h" 28#include <vector> 29 30namespace llvm { 31 class Value; 32 class Function; 33 class TargetMachine; 34 class TargetData; 35 class TargetRegisterClass; 36 class SDNode; 37 class SDOperand; 38 class SelectionDAG; 39 class MachineBasicBlock; 40 class MachineInstr; 41 42//===----------------------------------------------------------------------===// 43/// TargetLowering - This class defines information used to lower LLVM code to 44/// legal SelectionDAG operators that the target instruction selector can accept 45/// natively. 46/// 47/// This class also defines callbacks that targets must implement to lower 48/// target-specific constructs to SelectionDAG operators. 49/// 50class TargetLowering { 51public: 52 /// LegalizeAction - This enum indicates whether operations are valid for a 53 /// target, and if not, what action should be used to make them valid. 54 enum LegalizeAction { 55 Legal, // The target natively supports this operation. 56 Promote, // This operation should be executed in a larger type. 57 Expand, // Try to expand this to other ops, otherwise use a libcall. 58 Custom, // Use the LowerOperation hook to implement custom lowering. 59 }; 60 61 enum OutOfRangeShiftAmount { 62 Undefined, // Oversized shift amounts are undefined (default). 63 Mask, // Shift amounts are auto masked (anded) to value size. 64 Extend, // Oversized shift pulls in zeros or sign bits. 65 }; 66 67 enum SetCCResultValue { 68 UndefinedSetCCResult, // SetCC returns a garbage/unknown extend. 69 ZeroOrOneSetCCResult, // SetCC returns a zero extended result. 70 ZeroOrNegativeOneSetCCResult, // SetCC returns a sign extended result. 71 }; 72 73 enum SchedPreference { 74 SchedulingForLatency, // Scheduling for shortest total latency. 75 SchedulingForRegPressure, // Scheduling for lowest register pressure. 76 }; 77 78 TargetLowering(TargetMachine &TM); 79 virtual ~TargetLowering(); 80 81 TargetMachine &getTargetMachine() const { return TM; } 82 const TargetData &getTargetData() const { return TD; } 83 84 bool isLittleEndian() const { return IsLittleEndian; } 85 MVT::ValueType getPointerTy() const { return PointerTy; } 86 MVT::ValueType getShiftAmountTy() const { return ShiftAmountTy; } 87 OutOfRangeShiftAmount getShiftAmountFlavor() const {return ShiftAmtHandling; } 88 89 /// isSetCCExpensive - Return true if the setcc operation is expensive for 90 /// this target. 91 bool isSetCCExpensive() const { return SetCCIsExpensive; } 92 93 /// isIntDivCheap() - Return true if integer divide is usually cheaper than 94 /// a sequence of several shifts, adds, and multiplies for this target. 95 bool isIntDivCheap() const { return IntDivIsCheap; } 96 97 /// isPow2DivCheap() - Return true if pow2 div is cheaper than a chain of 98 /// srl/add/sra. 99 bool isPow2DivCheap() const { return Pow2DivIsCheap; } 100 101 /// getSetCCResultTy - Return the ValueType of the result of setcc operations. 102 /// 103 MVT::ValueType getSetCCResultTy() const { return SetCCResultTy; } 104 105 /// getSetCCResultContents - For targets without boolean registers, this flag 106 /// returns information about the contents of the high-bits in the setcc 107 /// result register. 108 SetCCResultValue getSetCCResultContents() const { return SetCCResultContents;} 109 110 /// getSchedulingPreference - Return target scheduling preference. 111 SchedPreference getSchedulingPreference() const { 112 return SchedPreferenceInfo; 113 } 114 115 /// getRegClassFor - Return the register class that should be used for the 116 /// specified value type. This may only be called on legal types. 117 TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const { 118 TargetRegisterClass *RC = RegClassForVT[VT]; 119 assert(RC && "This value type is not natively supported!"); 120 return RC; 121 } 122 123 /// isTypeLegal - Return true if the target has native support for the 124 /// specified value type. This means that it has a register that directly 125 /// holds it without promotions or expansions. 126 bool isTypeLegal(MVT::ValueType VT) const { 127 return RegClassForVT[VT] != 0; 128 } 129 130 class ValueTypeActionImpl { 131 /// ValueTypeActions - This is a bitvector that contains two bits for each 132 /// value type, where the two bits correspond to the LegalizeAction enum. 133 /// This can be queried with "getTypeAction(VT)". 134 uint32_t ValueTypeActions[2]; 135 public: 136 ValueTypeActionImpl() { 137 ValueTypeActions[0] = ValueTypeActions[1] = 0; 138 } 139 ValueTypeActionImpl(const ValueTypeActionImpl &RHS) { 140 ValueTypeActions[0] = RHS.ValueTypeActions[0]; 141 ValueTypeActions[1] = RHS.ValueTypeActions[1]; 142 } 143 144 LegalizeAction getTypeAction(MVT::ValueType VT) const { 145 return (LegalizeAction)((ValueTypeActions[VT>>4] >> ((2*VT) & 31)) & 3); 146 } 147 void setTypeAction(MVT::ValueType VT, LegalizeAction Action) { 148 assert(unsigned(VT >> 4) < 149 sizeof(ValueTypeActions)/sizeof(ValueTypeActions[0])); 150 ValueTypeActions[VT>>4] |= Action << ((VT*2) & 31); 151 } 152 }; 153 154 const ValueTypeActionImpl &getValueTypeActions() const { 155 return ValueTypeActions; 156 } 157 158 /// getTypeAction - Return how we should legalize values of this type, either 159 /// it is already legal (return 'Legal') or we need to promote it to a larger 160 /// type (return 'Promote'), or we need to expand it into multiple registers 161 /// of smaller integer type (return 'Expand'). 'Custom' is not an option. 162 LegalizeAction getTypeAction(MVT::ValueType VT) const { 163 return ValueTypeActions.getTypeAction(VT); 164 } 165 166 /// getTypeToTransformTo - For types supported by the target, this is an 167 /// identity function. For types that must be promoted to larger types, this 168 /// returns the larger type to promote to. For types that are larger than the 169 /// largest integer register, this contains one step in the expansion to get 170 /// to the smaller register. 171 MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const { 172 return TransformToType[VT]; 173 } 174 175 typedef std::vector<double>::const_iterator legal_fpimm_iterator; 176 legal_fpimm_iterator legal_fpimm_begin() const { 177 return LegalFPImmediates.begin(); 178 } 179 legal_fpimm_iterator legal_fpimm_end() const { 180 return LegalFPImmediates.end(); 181 } 182 183 /// getOperationAction - Return how this operation should be treated: either 184 /// it is legal, needs to be promoted to a larger size, needs to be 185 /// expanded to some other code sequence, or the target has a custom expander 186 /// for it. 187 LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const { 188 return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3); 189 } 190 191 /// isOperationLegal - Return true if the specified operation is legal on this 192 /// target. 193 bool isOperationLegal(unsigned Op, MVT::ValueType VT) const { 194 return getOperationAction(Op, VT) == Legal; 195 } 196 197 /// getTypeToPromoteTo - If the action for this operation is to promote, this 198 /// method returns the ValueType to promote to. 199 MVT::ValueType getTypeToPromoteTo(unsigned Op, MVT::ValueType VT) const { 200 assert(getOperationAction(Op, VT) == Promote && 201 "This operation isn't promoted!"); 202 MVT::ValueType NVT = VT; 203 do { 204 NVT = (MVT::ValueType)(NVT+1); 205 assert(MVT::isInteger(NVT) == MVT::isInteger(VT) && NVT != MVT::isVoid && 206 "Didn't find type to promote to!"); 207 } while (!isTypeLegal(NVT) || 208 getOperationAction(Op, NVT) == Promote); 209 return NVT; 210 } 211 212 /// getValueType - Return the MVT::ValueType corresponding to this LLVM type. 213 /// This is fixed by the LLVM operations except for the pointer size. 214 MVT::ValueType getValueType(const Type *Ty) const { 215 switch (Ty->getTypeID()) { 216 default: assert(0 && "Unknown type!"); 217 case Type::VoidTyID: return MVT::isVoid; 218 case Type::BoolTyID: return MVT::i1; 219 case Type::UByteTyID: 220 case Type::SByteTyID: return MVT::i8; 221 case Type::ShortTyID: 222 case Type::UShortTyID: return MVT::i16; 223 case Type::IntTyID: 224 case Type::UIntTyID: return MVT::i32; 225 case Type::LongTyID: 226 case Type::ULongTyID: return MVT::i64; 227 case Type::FloatTyID: return MVT::f32; 228 case Type::DoubleTyID: return MVT::f64; 229 case Type::PointerTyID: return PointerTy; 230 case Type::PackedTyID: return MVT::Vector; 231 } 232 } 233 234 /// getNumElements - Return the number of registers that this ValueType will 235 /// eventually require. This is always one for all non-integer types, is 236 /// one for any types promoted to live in larger registers, but may be more 237 /// than one for types (like i64) that are split into pieces. 238 unsigned getNumElements(MVT::ValueType VT) const { 239 return NumElementsForVT[VT]; 240 } 241 242 /// This function returns the maximum number of store operations permitted 243 /// to replace a call to llvm.memset. The value is set by the target at the 244 /// performance threshold for such a replacement. 245 /// @brief Get maximum # of store operations permitted for llvm.memset 246 unsigned getMaxStoresPerMemSet() const { return maxStoresPerMemSet; } 247 248 /// This function returns the maximum number of store operations permitted 249 /// to replace a call to llvm.memcpy. The value is set by the target at the 250 /// performance threshold for such a replacement. 251 /// @brief Get maximum # of store operations permitted for llvm.memcpy 252 unsigned getMaxStoresPerMemCpy() const { return maxStoresPerMemCpy; } 253 254 /// This function returns the maximum number of store operations permitted 255 /// to replace a call to llvm.memmove. The value is set by the target at the 256 /// performance threshold for such a replacement. 257 /// @brief Get maximum # of store operations permitted for llvm.memmove 258 unsigned getMaxStoresPerMemMove() const { return maxStoresPerMemMove; } 259 260 /// This function returns true if the target allows unaligned memory accesses. 261 /// This is used, for example, in situations where an array copy/move/set is 262 /// converted to a sequence of store operations. It's use helps to ensure that 263 /// such replacements don't generate code that causes an alignment error 264 /// (trap) on the target machine. 265 /// @brief Determine if the target supports unaligned memory accesses. 266 bool allowsUnalignedMemoryAccesses() const { 267 return allowUnalignedMemoryAccesses; 268 } 269 270 /// usesUnderscoreSetJmpLongJmp - Determine if we should use _setjmp or setjmp 271 /// to implement llvm.setjmp. 272 bool usesUnderscoreSetJmpLongJmp() const { 273 return UseUnderscoreSetJmpLongJmp; 274 } 275 276 /// getStackPointerRegisterToSaveRestore - If a physical register, this 277 /// specifies the register that llvm.savestack/llvm.restorestack should save 278 /// and restore. 279 unsigned getStackPointerRegisterToSaveRestore() const { 280 return StackPointerRegisterToSaveRestore; 281 } 282 283 //===--------------------------------------------------------------------===// 284 // TargetLowering Configuration Methods - These methods should be invoked by 285 // the derived class constructor to configure this object for the target. 286 // 287 288protected: 289 290 /// setShiftAmountType - Describe the type that should be used for shift 291 /// amounts. This type defaults to the pointer type. 292 void setShiftAmountType(MVT::ValueType VT) { ShiftAmountTy = VT; } 293 294 /// setSetCCResultType - Describe the type that shoudl be used as the result 295 /// of a setcc operation. This defaults to the pointer type. 296 void setSetCCResultType(MVT::ValueType VT) { SetCCResultTy = VT; } 297 298 /// setSetCCResultContents - Specify how the target extends the result of a 299 /// setcc operation in a register. 300 void setSetCCResultContents(SetCCResultValue Ty) { SetCCResultContents = Ty; } 301 302 /// setSchedulingPreference - Specify the target scheduling preference. 303 void setSchedulingPreference(SchedPreference Pref) { 304 SchedPreferenceInfo = Pref; 305 } 306 307 /// setShiftAmountFlavor - Describe how the target handles out of range shift 308 /// amounts. 309 void setShiftAmountFlavor(OutOfRangeShiftAmount OORSA) { 310 ShiftAmtHandling = OORSA; 311 } 312 313 /// setUseUnderscoreSetJmpLongJmp - Indicate whether this target prefers to 314 /// use _setjmp and _longjmp to or implement llvm.setjmp/llvm.longjmp or 315 /// the non _ versions. Defaults to false. 316 void setUseUnderscoreSetJmpLongJmp(bool Val) { 317 UseUnderscoreSetJmpLongJmp = Val; 318 } 319 320 /// setStackPointerRegisterToSaveRestore - If set to a physical register, this 321 /// specifies the register that llvm.savestack/llvm.restorestack should save 322 /// and restore. 323 void setStackPointerRegisterToSaveRestore(unsigned R) { 324 StackPointerRegisterToSaveRestore = R; 325 } 326 327 /// setSetCCIxExpensive - This is a short term hack for targets that codegen 328 /// setcc as a conditional branch. This encourages the code generator to fold 329 /// setcc operations into other operations if possible. 330 void setSetCCIsExpensive() { SetCCIsExpensive = true; } 331 332 /// setIntDivIsCheap - Tells the code generator that integer divide is 333 /// expensive, and if possible, should be replaced by an alternate sequence 334 /// of instructions not containing an integer divide. 335 void setIntDivIsCheap(bool isCheap = true) { IntDivIsCheap = isCheap; } 336 337 /// setPow2DivIsCheap - Tells the code generator that it shouldn't generate 338 /// srl/add/sra for a signed divide by power of two, and let the target handle 339 /// it. 340 void setPow2DivIsCheap(bool isCheap = true) { Pow2DivIsCheap = isCheap; } 341 342 /// addRegisterClass - Add the specified register class as an available 343 /// regclass for the specified value type. This indicates the selector can 344 /// handle values of that class natively. 345 void addRegisterClass(MVT::ValueType VT, TargetRegisterClass *RC) { 346 AvailableRegClasses.push_back(std::make_pair(VT, RC)); 347 RegClassForVT[VT] = RC; 348 } 349 350 /// computeRegisterProperties - Once all of the register classes are added, 351 /// this allows us to compute derived properties we expose. 352 void computeRegisterProperties(); 353 354 /// setOperationAction - Indicate that the specified operation does not work 355 /// with the specified type and indicate what to do about it. 356 void setOperationAction(unsigned Op, MVT::ValueType VT, 357 LegalizeAction Action) { 358 assert(VT < 32 && Op < sizeof(OpActions)/sizeof(OpActions[0]) && 359 "Table isn't big enough!"); 360 OpActions[Op] |= Action << VT*2; 361 } 362 363 /// addLegalFPImmediate - Indicate that this target can instruction select 364 /// the specified FP immediate natively. 365 void addLegalFPImmediate(double Imm) { 366 LegalFPImmediates.push_back(Imm); 367 } 368 369public: 370 371 //===--------------------------------------------------------------------===// 372 // Lowering methods - These methods must be implemented by targets so that 373 // the SelectionDAGLowering code knows how to lower these. 374 // 375 376 /// LowerArguments - This hook must be implemented to indicate how we should 377 /// lower the arguments for the specified function, into the specified DAG. 378 virtual std::vector<SDOperand> 379 LowerArguments(Function &F, SelectionDAG &DAG) = 0; 380 381 /// LowerCallTo - This hook lowers an abstract call to a function into an 382 /// actual call. This returns a pair of operands. The first element is the 383 /// return value for the function (if RetTy is not VoidTy). The second 384 /// element is the outgoing token chain. 385 typedef std::vector<std::pair<SDOperand, const Type*> > ArgListTy; 386 virtual std::pair<SDOperand, SDOperand> 387 LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, 388 unsigned CallingConv, bool isTailCall, SDOperand Callee, 389 ArgListTy &Args, SelectionDAG &DAG) = 0; 390 391 /// LowerFrameReturnAddress - This hook lowers a call to llvm.returnaddress or 392 /// llvm.frameaddress (depending on the value of the first argument). The 393 /// return values are the result pointer and the resultant token chain. If 394 /// not implemented, both of these intrinsics will return null. 395 virtual std::pair<SDOperand, SDOperand> 396 LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, 397 SelectionDAG &DAG); 398 399 /// LowerOperation - This callback is invoked for operations that are 400 /// unsupported by the target, which are registered to use 'custom' lowering, 401 /// and whose defined values are all legal. 402 /// If the target has no operations that require custom lowering, it need not 403 /// implement this. The default implementation of this aborts. 404 virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); 405 406 /// CustomPromoteOperation - This callback is invoked for operations that are 407 /// unsupported by the target, are registered to use 'custom' lowering, and 408 /// whose type needs to be promoted. 409 virtual SDOperand CustomPromoteOperation(SDOperand Op, SelectionDAG &DAG); 410 411 /// getTargetNodeName() - This method returns the name of a target specific 412 /// DAG node. 413 virtual const char *getTargetNodeName(unsigned Opcode) const; 414 415 /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to 416 /// be zero. Op is expected to be a target specific node. Used by DAG 417 /// combiner. MVIZ is a function pointer to the main MaskedValueIsZero 418 /// function. 419 typedef bool (*MVIZFnPtr)(const SDOperand&, uint64_t, const TargetLowering &); 420 virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op,uint64_t Mask, 421 MVIZFnPtr MVIZ) const; 422 423 //===--------------------------------------------------------------------===// 424 // Inline Asm Support hooks 425 // 426 427 /// getRegForInlineAsmConstraint - Given a constraint letter or register 428 /// name (e.g. "r" or "edx"), return a list of registers that can be used to 429 /// satisfy the constraint. If the constraint isn't supported, or isn't a 430 /// register constraint, return an empty list. 431 virtual std::vector<unsigned> 432 getRegForInlineAsmConstraint(const std::string &Constraint) const; 433 434 //===--------------------------------------------------------------------===// 435 // Scheduler hooks 436 // 437 438 // InsertAtEndOfBasicBlock - This method should be implemented by targets that 439 // mark instructions with the 'usesCustomDAGSchedInserter' flag. These 440 // instructions are special in various ways, which require special support to 441 // insert. The specified MachineInstr is created but not inserted into any 442 // basic blocks, and the scheduler passes ownership of it to this method. 443 virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI, 444 MachineBasicBlock *MBB); 445 446private: 447 TargetMachine &TM; 448 const TargetData &TD; 449 450 /// IsLittleEndian - True if this is a little endian target. 451 /// 452 bool IsLittleEndian; 453 454 /// PointerTy - The type to use for pointers, usually i32 or i64. 455 /// 456 MVT::ValueType PointerTy; 457 458 /// ShiftAmountTy - The type to use for shift amounts, usually i8 or whatever 459 /// PointerTy is. 460 MVT::ValueType ShiftAmountTy; 461 462 OutOfRangeShiftAmount ShiftAmtHandling; 463 464 /// SetCCIsExpensive - This is a short term hack for targets that codegen 465 /// setcc as a conditional branch. This encourages the code generator to fold 466 /// setcc operations into other operations if possible. 467 bool SetCCIsExpensive; 468 469 /// IntDivIsCheap - Tells the code generator not to expand integer divides by 470 /// constants into a sequence of muls, adds, and shifts. This is a hack until 471 /// a real cost model is in place. If we ever optimize for size, this will be 472 /// set to true unconditionally. 473 bool IntDivIsCheap; 474 475 /// Pow2DivIsCheap - Tells the code generator that it shouldn't generate 476 /// srl/add/sra for a signed divide by power of two, and let the target handle 477 /// it. 478 bool Pow2DivIsCheap; 479 480 /// SetCCResultTy - The type that SetCC operations use. This defaults to the 481 /// PointerTy. 482 MVT::ValueType SetCCResultTy; 483 484 /// SetCCResultContents - Information about the contents of the high-bits in 485 /// the result of a setcc comparison operation. 486 SetCCResultValue SetCCResultContents; 487 488 /// SchedPreferenceInfo - The target scheduling preference: shortest possible 489 /// total cycles or lowest register usage. 490 SchedPreference SchedPreferenceInfo; 491 492 /// UseUnderscoreSetJmpLongJmp - This target prefers to use _setjmp and 493 /// _longjmp to implement llvm.setjmp/llvm.longjmp. Defaults to false. 494 bool UseUnderscoreSetJmpLongJmp; 495 496 /// StackPointerRegisterToSaveRestore - If set to a physical register, this 497 /// specifies the register that llvm.savestack/llvm.restorestack should save 498 /// and restore. 499 unsigned StackPointerRegisterToSaveRestore; 500 501 /// RegClassForVT - This indicates the default register class to use for 502 /// each ValueType the target supports natively. 503 TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE]; 504 unsigned char NumElementsForVT[MVT::LAST_VALUETYPE]; 505 506 /// TransformToType - For any value types we are promoting or expanding, this 507 /// contains the value type that we are changing to. For Expanded types, this 508 /// contains one step of the expand (e.g. i64 -> i32), even if there are 509 /// multiple steps required (e.g. i64 -> i16). For types natively supported 510 /// by the system, this holds the same type (e.g. i32 -> i32). 511 MVT::ValueType TransformToType[MVT::LAST_VALUETYPE]; 512 513 /// OpActions - For each operation and each value type, keep a LegalizeAction 514 /// that indicates how instruction selection should deal with the operation. 515 /// Most operations are Legal (aka, supported natively by the target), but 516 /// operations that are not should be described. Note that operations on 517 /// non-legal value types are not described here. 518 uint64_t OpActions[128]; 519 520 ValueTypeActionImpl ValueTypeActions; 521 522 std::vector<double> LegalFPImmediates; 523 524 std::vector<std::pair<MVT::ValueType, 525 TargetRegisterClass*> > AvailableRegClasses; 526 527protected: 528 /// When lowering %llvm.memset this field specifies the maximum number of 529 /// store operations that may be substituted for the call to memset. Targets 530 /// must set this value based on the cost threshold for that target. Targets 531 /// should assume that the memset will be done using as many of the largest 532 /// store operations first, followed by smaller ones, if necessary, per 533 /// alignment restrictions. For example, storing 9 bytes on a 32-bit machine 534 /// with 16-bit alignment would result in four 2-byte stores and one 1-byte 535 /// store. This only applies to setting a constant array of a constant size. 536 /// @brief Specify maximum number of store instructions per memset call. 537 unsigned maxStoresPerMemSet; 538 539 /// When lowering %llvm.memcpy this field specifies the maximum number of 540 /// store operations that may be substituted for a call to memcpy. Targets 541 /// must set this value based on the cost threshold for that target. Targets 542 /// should assume that the memcpy will be done using as many of the largest 543 /// store operations first, followed by smaller ones, if necessary, per 544 /// alignment restrictions. For example, storing 7 bytes on a 32-bit machine 545 /// with 32-bit alignment would result in one 4-byte store, a one 2-byte store 546 /// and one 1-byte store. This only applies to copying a constant array of 547 /// constant size. 548 /// @brief Specify maximum bytes of store instructions per memcpy call. 549 unsigned maxStoresPerMemCpy; 550 551 /// When lowering %llvm.memmove this field specifies the maximum number of 552 /// store instructions that may be substituted for a call to memmove. Targets 553 /// must set this value based on the cost threshold for that target. Targets 554 /// should assume that the memmove will be done using as many of the largest 555 /// store operations first, followed by smaller ones, if necessary, per 556 /// alignment restrictions. For example, moving 9 bytes on a 32-bit machine 557 /// with 8-bit alignment would result in nine 1-byte stores. This only 558 /// applies to copying a constant array of constant size. 559 /// @brief Specify maximum bytes of store instructions per memmove call. 560 unsigned maxStoresPerMemMove; 561 562 /// This field specifies whether the target machine permits unaligned memory 563 /// accesses. This is used, for example, to determine the size of store 564 /// operations when copying small arrays and other similar tasks. 565 /// @brief Indicate whether the target permits unaligned memory accesses. 566 bool allowUnalignedMemoryAccesses; 567}; 568} // end llvm namespace 569 570#endif 571