TargetLowering.h revision acc398c195a697795bff3245943d104eb19192b9
1//===-- llvm/Target/TargetLowering.h - Target Lowering Info -----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes how to lower LLVM code to machine code. This has two 11// main components: 12// 13// 1. Which ValueTypes are natively supported by the target. 14// 2. Which operations are supported for supported ValueTypes. 15// 3. Cost thresholds for alternative implementations of certain operations. 16// 17// In addition it has a few other components, like information about FP 18// immediates. 19// 20//===----------------------------------------------------------------------===// 21 22#ifndef LLVM_TARGET_TARGETLOWERING_H 23#define LLVM_TARGET_TARGETLOWERING_H 24 25#include "llvm/Type.h" 26#include "llvm/CodeGen/ValueTypes.h" 27#include "llvm/Support/DataTypes.h" 28#include <vector> 29 30namespace llvm { 31 class Value; 32 class Function; 33 class TargetMachine; 34 class TargetData; 35 class TargetRegisterClass; 36 class SDNode; 37 class SDOperand; 38 class SelectionDAG; 39 class MachineBasicBlock; 40 class MachineInstr; 41 42//===----------------------------------------------------------------------===// 43/// TargetLowering - This class defines information used to lower LLVM code to 44/// legal SelectionDAG operators that the target instruction selector can accept 45/// natively. 46/// 47/// This class also defines callbacks that targets must implement to lower 48/// target-specific constructs to SelectionDAG operators. 49/// 50class TargetLowering { 51public: 52 /// LegalizeAction - This enum indicates whether operations are valid for a 53 /// target, and if not, what action should be used to make them valid. 54 enum LegalizeAction { 55 Legal, // The target natively supports this operation. 56 Promote, // This operation should be executed in a larger type. 57 Expand, // Try to expand this to other ops, otherwise use a libcall. 58 Custom, // Use the LowerOperation hook to implement custom lowering. 59 }; 60 61 enum OutOfRangeShiftAmount { 62 Undefined, // Oversized shift amounts are undefined (default). 63 Mask, // Shift amounts are auto masked (anded) to value size. 64 Extend, // Oversized shift pulls in zeros or sign bits. 65 }; 66 67 enum SetCCResultValue { 68 UndefinedSetCCResult, // SetCC returns a garbage/unknown extend. 69 ZeroOrOneSetCCResult, // SetCC returns a zero extended result. 70 ZeroOrNegativeOneSetCCResult, // SetCC returns a sign extended result. 71 }; 72 73 enum SchedPreference { 74 SchedulingForLatency, // Scheduling for shortest total latency. 75 SchedulingForRegPressure, // Scheduling for lowest register pressure. 76 }; 77 78 TargetLowering(TargetMachine &TM); 79 virtual ~TargetLowering(); 80 81 TargetMachine &getTargetMachine() const { return TM; } 82 const TargetData &getTargetData() const { return TD; } 83 84 bool isLittleEndian() const { return IsLittleEndian; } 85 MVT::ValueType getPointerTy() const { return PointerTy; } 86 MVT::ValueType getShiftAmountTy() const { return ShiftAmountTy; } 87 OutOfRangeShiftAmount getShiftAmountFlavor() const {return ShiftAmtHandling; } 88 89 /// isSetCCExpensive - Return true if the setcc operation is expensive for 90 /// this target. 91 bool isSetCCExpensive() const { return SetCCIsExpensive; } 92 93 /// isIntDivCheap() - Return true if integer divide is usually cheaper than 94 /// a sequence of several shifts, adds, and multiplies for this target. 95 bool isIntDivCheap() const { return IntDivIsCheap; } 96 97 /// isPow2DivCheap() - Return true if pow2 div is cheaper than a chain of 98 /// srl/add/sra. 99 bool isPow2DivCheap() const { return Pow2DivIsCheap; } 100 101 /// getSetCCResultTy - Return the ValueType of the result of setcc operations. 102 /// 103 MVT::ValueType getSetCCResultTy() const { return SetCCResultTy; } 104 105 /// getSetCCResultContents - For targets without boolean registers, this flag 106 /// returns information about the contents of the high-bits in the setcc 107 /// result register. 108 SetCCResultValue getSetCCResultContents() const { return SetCCResultContents;} 109 110 /// getSchedulingPreference - Return target scheduling preference. 111 SchedPreference getSchedulingPreference() const { 112 return SchedPreferenceInfo; 113 } 114 115 /// getRegClassFor - Return the register class that should be used for the 116 /// specified value type. This may only be called on legal types. 117 TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const { 118 TargetRegisterClass *RC = RegClassForVT[VT]; 119 assert(RC && "This value type is not natively supported!"); 120 return RC; 121 } 122 123 /// isTypeLegal - Return true if the target has native support for the 124 /// specified value type. This means that it has a register that directly 125 /// holds it without promotions or expansions. 126 bool isTypeLegal(MVT::ValueType VT) const { 127 return RegClassForVT[VT] != 0; 128 } 129 130 /// getTypeAction - Return how we should legalize values of this type, either 131 /// it is already legal (return 'Legal') or we need to promote it to a larger 132 /// type (return 'Promote'), or we need to expand it into multiple registers 133 /// of smaller integer type (return 'Expand'). 'Custom' is not an option. 134 LegalizeAction getTypeAction(MVT::ValueType VT) const { 135 return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3); 136 } 137 unsigned long long getValueTypeActions() const { return ValueTypeActions; } 138 139 /// getTypeToTransformTo - For types supported by the target, this is an 140 /// identity function. For types that must be promoted to larger types, this 141 /// returns the larger type to promote to. For types that are larger than the 142 /// largest integer register, this contains one step in the expansion to get 143 /// to the smaller register. 144 MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const { 145 return TransformToType[VT]; 146 } 147 148 typedef std::vector<double>::const_iterator legal_fpimm_iterator; 149 legal_fpimm_iterator legal_fpimm_begin() const { 150 return LegalFPImmediates.begin(); 151 } 152 legal_fpimm_iterator legal_fpimm_end() const { 153 return LegalFPImmediates.end(); 154 } 155 156 /// getOperationAction - Return how this operation should be treated: either 157 /// it is legal, needs to be promoted to a larger size, needs to be 158 /// expanded to some other code sequence, or the target has a custom expander 159 /// for it. 160 LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const { 161 return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3); 162 } 163 164 /// isOperationLegal - Return true if the specified operation is legal on this 165 /// target. 166 bool isOperationLegal(unsigned Op, MVT::ValueType VT) const { 167 return getOperationAction(Op, VT) == Legal; 168 } 169 170 /// getTypeToPromoteTo - If the action for this operation is to promote, this 171 /// method returns the ValueType to promote to. 172 MVT::ValueType getTypeToPromoteTo(unsigned Op, MVT::ValueType VT) const { 173 assert(getOperationAction(Op, VT) == Promote && 174 "This operation isn't promoted!"); 175 MVT::ValueType NVT = VT; 176 do { 177 NVT = (MVT::ValueType)(NVT+1); 178 assert(MVT::isInteger(NVT) == MVT::isInteger(VT) && NVT != MVT::isVoid && 179 "Didn't find type to promote to!"); 180 } while (!isTypeLegal(NVT) || 181 getOperationAction(Op, NVT) == Promote); 182 return NVT; 183 } 184 185 /// getValueType - Return the MVT::ValueType corresponding to this LLVM type. 186 /// This is fixed by the LLVM operations except for the pointer size. 187 MVT::ValueType getValueType(const Type *Ty) const { 188 switch (Ty->getTypeID()) { 189 default: assert(0 && "Unknown type!"); 190 case Type::VoidTyID: return MVT::isVoid; 191 case Type::BoolTyID: return MVT::i1; 192 case Type::UByteTyID: 193 case Type::SByteTyID: return MVT::i8; 194 case Type::ShortTyID: 195 case Type::UShortTyID: return MVT::i16; 196 case Type::IntTyID: 197 case Type::UIntTyID: return MVT::i32; 198 case Type::LongTyID: 199 case Type::ULongTyID: return MVT::i64; 200 case Type::FloatTyID: return MVT::f32; 201 case Type::DoubleTyID: return MVT::f64; 202 case Type::PointerTyID: return PointerTy; 203 case Type::PackedTyID: return MVT::Vector; 204 } 205 } 206 207 /// getNumElements - Return the number of registers that this ValueType will 208 /// eventually require. This is always one for all non-integer types, is 209 /// one for any types promoted to live in larger registers, but may be more 210 /// than one for types (like i64) that are split into pieces. 211 unsigned getNumElements(MVT::ValueType VT) const { 212 return NumElementsForVT[VT]; 213 } 214 215 /// This function returns the maximum number of store operations permitted 216 /// to replace a call to llvm.memset. The value is set by the target at the 217 /// performance threshold for such a replacement. 218 /// @brief Get maximum # of store operations permitted for llvm.memset 219 unsigned getMaxStoresPerMemSet() const { return maxStoresPerMemSet; } 220 221 /// This function returns the maximum number of store operations permitted 222 /// to replace a call to llvm.memcpy. The value is set by the target at the 223 /// performance threshold for such a replacement. 224 /// @brief Get maximum # of store operations permitted for llvm.memcpy 225 unsigned getMaxStoresPerMemCpy() const { return maxStoresPerMemCpy; } 226 227 /// This function returns the maximum number of store operations permitted 228 /// to replace a call to llvm.memmove. The value is set by the target at the 229 /// performance threshold for such a replacement. 230 /// @brief Get maximum # of store operations permitted for llvm.memmove 231 unsigned getMaxStoresPerMemMove() const { return maxStoresPerMemMove; } 232 233 /// This function returns true if the target allows unaligned memory accesses. 234 /// This is used, for example, in situations where an array copy/move/set is 235 /// converted to a sequence of store operations. It's use helps to ensure that 236 /// such replacements don't generate code that causes an alignment error 237 /// (trap) on the target machine. 238 /// @brief Determine if the target supports unaligned memory accesses. 239 bool allowsUnalignedMemoryAccesses() const 240 { return allowUnalignedMemoryAccesses; } 241 242 /// usesUnderscoreSetJmpLongJmp - Determine if we should use _setjmp or setjmp 243 /// to implement llvm.setjmp. 244 bool usesUnderscoreSetJmpLongJmp() const { 245 return UseUnderscoreSetJmpLongJmp; 246 } 247 248 /// getStackPointerRegisterToSaveRestore - If a physical register, this 249 /// specifies the register that llvm.savestack/llvm.restorestack should save 250 /// and restore. 251 unsigned getStackPointerRegisterToSaveRestore() const { 252 return StackPointerRegisterToSaveRestore; 253 } 254 255 //===--------------------------------------------------------------------===// 256 // TargetLowering Configuration Methods - These methods should be invoked by 257 // the derived class constructor to configure this object for the target. 258 // 259 260protected: 261 262 /// setShiftAmountType - Describe the type that should be used for shift 263 /// amounts. This type defaults to the pointer type. 264 void setShiftAmountType(MVT::ValueType VT) { ShiftAmountTy = VT; } 265 266 /// setSetCCResultType - Describe the type that shoudl be used as the result 267 /// of a setcc operation. This defaults to the pointer type. 268 void setSetCCResultType(MVT::ValueType VT) { SetCCResultTy = VT; } 269 270 /// setSetCCResultContents - Specify how the target extends the result of a 271 /// setcc operation in a register. 272 void setSetCCResultContents(SetCCResultValue Ty) { SetCCResultContents = Ty; } 273 274 /// setSchedulingPreference - Specify the target scheduling preference. 275 void setSchedulingPreference(SchedPreference Pref) { 276 SchedPreferenceInfo = Pref; 277 } 278 279 /// setShiftAmountFlavor - Describe how the target handles out of range shift 280 /// amounts. 281 void setShiftAmountFlavor(OutOfRangeShiftAmount OORSA) { 282 ShiftAmtHandling = OORSA; 283 } 284 285 /// setUseUnderscoreSetJmpLongJmp - Indicate whether this target prefers to 286 /// use _setjmp and _longjmp to or implement llvm.setjmp/llvm.longjmp or 287 /// the non _ versions. Defaults to false. 288 void setUseUnderscoreSetJmpLongJmp(bool Val) { 289 UseUnderscoreSetJmpLongJmp = Val; 290 } 291 292 /// setStackPointerRegisterToSaveRestore - If set to a physical register, this 293 /// specifies the register that llvm.savestack/llvm.restorestack should save 294 /// and restore. 295 void setStackPointerRegisterToSaveRestore(unsigned R) { 296 StackPointerRegisterToSaveRestore = R; 297 } 298 299 /// setSetCCIxExpensive - This is a short term hack for targets that codegen 300 /// setcc as a conditional branch. This encourages the code generator to fold 301 /// setcc operations into other operations if possible. 302 void setSetCCIsExpensive() { SetCCIsExpensive = true; } 303 304 /// setIntDivIsCheap - Tells the code generator that integer divide is 305 /// expensive, and if possible, should be replaced by an alternate sequence 306 /// of instructions not containing an integer divide. 307 void setIntDivIsCheap(bool isCheap = true) { IntDivIsCheap = isCheap; } 308 309 /// setPow2DivIsCheap - Tells the code generator that it shouldn't generate 310 /// srl/add/sra for a signed divide by power of two, and let the target handle 311 /// it. 312 void setPow2DivIsCheap(bool isCheap = true) { Pow2DivIsCheap = isCheap; } 313 314 /// addRegisterClass - Add the specified register class as an available 315 /// regclass for the specified value type. This indicates the selector can 316 /// handle values of that class natively. 317 void addRegisterClass(MVT::ValueType VT, TargetRegisterClass *RC) { 318 AvailableRegClasses.push_back(std::make_pair(VT, RC)); 319 RegClassForVT[VT] = RC; 320 } 321 322 /// computeRegisterProperties - Once all of the register classes are added, 323 /// this allows us to compute derived properties we expose. 324 void computeRegisterProperties(); 325 326 /// setOperationAction - Indicate that the specified operation does not work 327 /// with the specified type and indicate what to do about it. 328 void setOperationAction(unsigned Op, MVT::ValueType VT, 329 LegalizeAction Action) { 330 assert(VT < 16 && Op < sizeof(OpActions)/sizeof(OpActions[0]) && 331 "Table isn't big enough!"); 332 OpActions[Op] |= Action << VT*2; 333 } 334 335 /// addLegalFPImmediate - Indicate that this target can instruction select 336 /// the specified FP immediate natively. 337 void addLegalFPImmediate(double Imm) { 338 LegalFPImmediates.push_back(Imm); 339 } 340 341public: 342 343 //===--------------------------------------------------------------------===// 344 // Lowering methods - These methods must be implemented by targets so that 345 // the SelectionDAGLowering code knows how to lower these. 346 // 347 348 /// LowerArguments - This hook must be implemented to indicate how we should 349 /// lower the arguments for the specified function, into the specified DAG. 350 virtual std::vector<SDOperand> 351 LowerArguments(Function &F, SelectionDAG &DAG) = 0; 352 353 /// LowerCallTo - This hook lowers an abstract call to a function into an 354 /// actual call. This returns a pair of operands. The first element is the 355 /// return value for the function (if RetTy is not VoidTy). The second 356 /// element is the outgoing token chain. 357 typedef std::vector<std::pair<SDOperand, const Type*> > ArgListTy; 358 virtual std::pair<SDOperand, SDOperand> 359 LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, 360 unsigned CallingConv, bool isTailCall, SDOperand Callee, 361 ArgListTy &Args, SelectionDAG &DAG) = 0; 362 363 /// LowerReturnTo - This hook lowers a return instruction into the appropriate 364 /// legal ISD::RET node for the target's current ABI. This method is optional 365 /// and is intended for targets that need non-standard behavior. 366 virtual SDOperand LowerReturnTo(SDOperand Chain, SDOperand Op, 367 SelectionDAG &DAG); 368 369 /// LowerFrameReturnAddress - This hook lowers a call to llvm.returnaddress or 370 /// llvm.frameaddress (depending on the value of the first argument). The 371 /// return values are the result pointer and the resultant token chain. If 372 /// not implemented, both of these intrinsics will return null. 373 virtual std::pair<SDOperand, SDOperand> 374 LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, 375 SelectionDAG &DAG); 376 377 /// LowerOperation - For operations that are unsupported by the target, and 378 /// which are registered to use 'custom' lowering. This callback is invoked. 379 /// If the target has no operations that require custom lowering, it need not 380 /// implement this. The default implementation of this aborts. 381 virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); 382 383 /// getTargetNodeName() - This method returns the name of a target specific 384 /// DAG node. 385 virtual const char *getTargetNodeName(unsigned Opcode) const; 386 387 /// isMaskedValueZeroForTargetNode - Return true if 'Op & Mask' is known to 388 /// be zero. Op is expected to be a target specific node. Used by DAG 389 /// combiner. 390 virtual bool isMaskedValueZeroForTargetNode(const SDOperand &Op, 391 uint64_t Mask) const; 392 393 //===--------------------------------------------------------------------===// 394 // Scheduler hooks 395 // 396 397 // InsertAtEndOfBasicBlock - This method should be implemented by targets that 398 // mark instructions with the 'usesCustomDAGSchedInserter' flag. These 399 // instructions are special in various ways, which require special support to 400 // insert. The specified MachineInstr is created but not inserted into any 401 // basic blocks, and the scheduler passes ownership of it to this method. 402 virtual MachineBasicBlock *InsertAtEndOfBasicBlock(MachineInstr *MI, 403 MachineBasicBlock *MBB); 404 405private: 406 TargetMachine &TM; 407 const TargetData &TD; 408 409 /// IsLittleEndian - True if this is a little endian target. 410 /// 411 bool IsLittleEndian; 412 413 /// PointerTy - The type to use for pointers, usually i32 or i64. 414 /// 415 MVT::ValueType PointerTy; 416 417 /// ShiftAmountTy - The type to use for shift amounts, usually i8 or whatever 418 /// PointerTy is. 419 MVT::ValueType ShiftAmountTy; 420 421 OutOfRangeShiftAmount ShiftAmtHandling; 422 423 /// SetCCIsExpensive - This is a short term hack for targets that codegen 424 /// setcc as a conditional branch. This encourages the code generator to fold 425 /// setcc operations into other operations if possible. 426 bool SetCCIsExpensive; 427 428 /// IntDivIsCheap - Tells the code generator not to expand integer divides by 429 /// constants into a sequence of muls, adds, and shifts. This is a hack until 430 /// a real cost model is in place. If we ever optimize for size, this will be 431 /// set to true unconditionally. 432 bool IntDivIsCheap; 433 434 /// Pow2DivIsCheap - Tells the code generator that it shouldn't generate 435 /// srl/add/sra for a signed divide by power of two, and let the target handle 436 /// it. 437 bool Pow2DivIsCheap; 438 439 /// SetCCResultTy - The type that SetCC operations use. This defaults to the 440 /// PointerTy. 441 MVT::ValueType SetCCResultTy; 442 443 /// SetCCResultContents - Information about the contents of the high-bits in 444 /// the result of a setcc comparison operation. 445 SetCCResultValue SetCCResultContents; 446 447 /// SchedPreferenceInfo - The target scheduling preference: shortest possible 448 /// total cycles or lowest register usage. 449 SchedPreference SchedPreferenceInfo; 450 451 /// UseUnderscoreSetJmpLongJmp - This target prefers to use _setjmp and 452 /// _longjmp to implement llvm.setjmp/llvm.longjmp. Defaults to false. 453 bool UseUnderscoreSetJmpLongJmp; 454 455 /// StackPointerRegisterToSaveRestore - If set to a physical register, this 456 /// specifies the register that llvm.savestack/llvm.restorestack should save 457 /// and restore. 458 unsigned StackPointerRegisterToSaveRestore; 459 460 /// RegClassForVT - This indicates the default register class to use for 461 /// each ValueType the target supports natively. 462 TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE]; 463 unsigned char NumElementsForVT[MVT::LAST_VALUETYPE]; 464 465 /// ValueTypeActions - This is a bitvector that contains two bits for each 466 /// value type, where the two bits correspond to the LegalizeAction enum. 467 /// This can be queried with "getTypeAction(VT)". 468 unsigned long long ValueTypeActions; 469 470 /// TransformToType - For any value types we are promoting or expanding, this 471 /// contains the value type that we are changing to. For Expanded types, this 472 /// contains one step of the expand (e.g. i64 -> i32), even if there are 473 /// multiple steps required (e.g. i64 -> i16). For types natively supported 474 /// by the system, this holds the same type (e.g. i32 -> i32). 475 MVT::ValueType TransformToType[MVT::LAST_VALUETYPE]; 476 477 /// OpActions - For each operation and each value type, keep a LegalizeAction 478 /// that indicates how instruction selection should deal with the operation. 479 /// Most operations are Legal (aka, supported natively by the target), but 480 /// operations that are not should be described. Note that operations on 481 /// non-legal value types are not described here. 482 unsigned OpActions[128]; 483 484 std::vector<double> LegalFPImmediates; 485 486 std::vector<std::pair<MVT::ValueType, 487 TargetRegisterClass*> > AvailableRegClasses; 488 489protected: 490 /// When lowering %llvm.memset this field specifies the maximum number of 491 /// store operations that may be substituted for the call to memset. Targets 492 /// must set this value based on the cost threshold for that target. Targets 493 /// should assume that the memset will be done using as many of the largest 494 /// store operations first, followed by smaller ones, if necessary, per 495 /// alignment restrictions. For example, storing 9 bytes on a 32-bit machine 496 /// with 16-bit alignment would result in four 2-byte stores and one 1-byte 497 /// store. This only applies to setting a constant array of a constant size. 498 /// @brief Specify maximum number of store instructions per memset call. 499 unsigned maxStoresPerMemSet; 500 501 /// When lowering %llvm.memcpy this field specifies the maximum number of 502 /// store operations that may be substituted for a call to memcpy. Targets 503 /// must set this value based on the cost threshold for that target. Targets 504 /// should assume that the memcpy will be done using as many of the largest 505 /// store operations first, followed by smaller ones, if necessary, per 506 /// alignment restrictions. For example, storing 7 bytes on a 32-bit machine 507 /// with 32-bit alignment would result in one 4-byte store, a one 2-byte store 508 /// and one 1-byte store. This only applies to copying a constant array of 509 /// constant size. 510 /// @brief Specify maximum bytes of store instructions per memcpy call. 511 unsigned maxStoresPerMemCpy; 512 513 /// When lowering %llvm.memmove this field specifies the maximum number of 514 /// store instructions that may be substituted for a call to memmove. Targets 515 /// must set this value based on the cost threshold for that target. Targets 516 /// should assume that the memmove will be done using as many of the largest 517 /// store operations first, followed by smaller ones, if necessary, per 518 /// alignment restrictions. For example, moving 9 bytes on a 32-bit machine 519 /// with 8-bit alignment would result in nine 1-byte stores. This only 520 /// applies to copying a constant array of constant size. 521 /// @brief Specify maximum bytes of store instructions per memmove call. 522 unsigned maxStoresPerMemMove; 523 524 /// This field specifies whether the target machine permits unaligned memory 525 /// accesses. This is used, for example, to determine the size of store 526 /// operations when copying small arrays and other similar tasks. 527 /// @brief Indicate whether the target permits unaligned memory accesses. 528 bool allowUnalignedMemoryAccesses; 529}; 530} // end llvm namespace 531 532#endif 533