TargetLowering.h revision c9403659a98bf6487ab6fbf40b81628b5695c02e
1bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez//===-- llvm/Target/TargetLowering.h - Target Lowering Info -----*- C++ -*-===// 27269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez// 3bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// The LLVM Compiler Infrastructure 4bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 5bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// This file is distributed under the University of Illinois Open Source 6bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// License. See LICENSE.TXT for details. 7bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 8bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez//===----------------------------------------------------------------------===// 9bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 10bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// This file describes how to lower LLVM code to machine code. This has two 11bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// main components: 12bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 13bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 1. Which ValueTypes are natively supported by the target. 14bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 2. Which operations are supported for supported ValueTypes. 15bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 3. Cost thresholds for alternative implementations of certain operations. 16bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 17bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// In addition it has a few other components, like information about FP 18bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// immediates. 19bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez// 20bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez//===----------------------------------------------------------------------===// 21bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 22bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#ifndef LLVM_TARGET_TARGETLOWERING_H 23bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#define LLVM_TARGET_TARGETLOWERING_H 24bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 25bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/CallingConv.h" 26bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/InlineAsm.h" 27bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/CodeGen/SelectionDAGNodes.h" 28bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/CodeGen/RuntimeLibcalls.h" 29bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/ADT/APFloat.h" 30f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný#include "llvm/ADT/DenseMap.h" 31bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/ADT/SmallSet.h" 32bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/ADT/SmallVector.h" 33bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/ADT/STLExtras.h" 34bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/Support/DebugLoc.h" 35bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/Target/TargetCallingConv.h" 36bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include "llvm/Target/TargetMachine.h" 37bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include <climits> 38bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include <map> 39bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez#include <vector> 40bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 41bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jereznamespace llvm { 42bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class AllocaInst; 43bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class CallInst; 44f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class Function; 45bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class FastISel; 46f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class MachineBasicBlock; 47bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class MachineFunction; 48f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class MachineFrameInfo; 49bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class MachineInstr; 50f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class MachineJumpTableInfo; 51f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class MCContext; 52f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class MCExpr; 53f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class SDNode; 54bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class SDValue; 55bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class SelectionDAG; 56f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class TargetData; 57bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class TargetMachine; 58f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class TargetRegisterClass; 59f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný class TargetLoweringObjectFile; 60bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez class Value; 61f4efc256fd90beaff86321e4c6ce00f9be55092dViktor Novotný 62bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez // FIXME: should this be here? 63bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez namespace TLSModel { 64f9995b30756140724f41daf963fa06167912be7fKristian Høgsberg enum Model { 65bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez GeneralDynamic, 663bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez LocalDynamic, 67bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez InitialExec, 68bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez LocalExec 69bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez }; 70bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 71bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez TLSModel::Model getTLSModel(const GlobalValue *GV, Reloc::Model reloc); 72bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 73bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 74bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez//===----------------------------------------------------------------------===// 75bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez/// TargetLowering - This class defines information used to lower LLVM code to 76bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez/// legal SelectionDAG operators that the target instruction selector can accept 77bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez/// natively. 78bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez/// 79bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez/// This class also defines callbacks that targets must implement to lower 80bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez/// target-specific constructs to SelectionDAG operators. 81bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez/// 82bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerezclass TargetLowering { 83bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez TargetLowering(const TargetLowering&); // DO NOT IMPLEMENT 84bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez void operator=(const TargetLowering&); // DO NOT IMPLEMENT 85bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerezpublic: 863bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez /// LegalizeAction - This enum indicates whether operations are valid for a 87bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// target, and if not, what action should be used to make them valid. 88bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez enum LegalizeAction { 89bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez Legal, // The target natively supports this operation. 90bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez Promote, // This operation should be executed in a larger type. 91bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez Expand, // Try to expand this to other ops, otherwise use a libcall. 92bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez Custom // Use the LowerOperation hook to implement custom lowering. 93bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez }; 94bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 957269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez enum BooleanContent { // How the target represents true/false values. 96bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez UndefinedBooleanContent, // Only bit 0 counts, the rest can hold garbage. 977269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez ZeroOrOneBooleanContent, // All bits zero except for bit 0. 98bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez ZeroOrNegativeOneBooleanContent // All bits equal to bit 0. 997269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez }; 1003bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez 1013bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez /// NOTE: The constructor takes ownership of TLOF. 1023bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez explicit TargetLowering(const TargetMachine &TM, 103bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez const TargetLoweringObjectFile *TLOF); 104bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez virtual ~TargetLowering(); 105bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 106bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez const TargetMachine &getTargetMachine() const { return TM; } 107bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez const TargetData *getTargetData() const { return TD; } 108bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez const TargetLoweringObjectFile &getObjFileLowering() const { return TLOF; } 109bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 110bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool isBigEndian() const { return !IsLittleEndian; } 111bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool isLittleEndian() const { return IsLittleEndian; } 112bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez MVT getPointerTy() const { return PointerTy; } 113bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez MVT getShiftAmountTy() const { return ShiftAmountTy; } 114bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 115bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// isSelectExpensive - Return true if the select operation is expensive for 116bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// this target. 117bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool isSelectExpensive() const { return SelectIsExpensive; } 118bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 119bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// isIntDivCheap() - Return true if integer divide is usually cheaper than 120bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// a sequence of several shifts, adds, and multiplies for this target. 121bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool isIntDivCheap() const { return IntDivIsCheap; } 122bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 123bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// isPow2DivCheap() - Return true if pow2 div is cheaper than a chain of 124bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// srl/add/sra. 125bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool isPow2DivCheap() const { return Pow2DivIsCheap; } 126bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 127bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// getSetCCResultType - Return the ValueType of the result of SETCC 128bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// operations. Also used to obtain the target's preferred type for 129bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// the condition operand of SELECT and BRCOND nodes. In the case of 130bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// BRCOND the argument passed is MVT::Other since there are no other 131bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// operands to get a type hint from. 132bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez virtual 133bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez MVT::SimpleValueType getSetCCResultType(EVT VT) const; 134bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 1357269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// getCmpLibcallReturnType - Return the ValueType for comparison 1367269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// libcalls. Comparions libcalls include floating point comparion calls, 137bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// and Ordered/Unordered check calls on floating point numbers. 138bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez virtual 139bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez MVT::SimpleValueType getCmpLibcallReturnType() const; 140bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 1417269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// getBooleanContents - For targets without i1 registers, this gives the 142bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// nature of the high-bits of boolean values held in types wider than i1. 143bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// "Boolean values" are special true/false values produced by nodes like 144bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// SETCC and consumed (as the condition) by nodes like SELECT and BRCOND. 1457269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// Not to be confused with general values promoted from i1. 146bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez BooleanContent getBooleanContents() const { return BooleanContents;} 1477269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 148bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// getSchedulingPreference - Return target scheduling preference. 149bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez Sched::Preference getSchedulingPreference() const { 1507269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return SchedPreferenceInfo; 1517269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 1527269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 1537269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// getSchedulingPreference - Some scheduler, e.g. hybrid, can switch to 1547269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// different scheduling heuristics for different nodes. This function returns 1557269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// the preference (or none) for the given node. 1567269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez virtual Sched::Preference getSchedulingPreference(SDNode *N) const { 1577269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return Sched::None; 158bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 1597269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 1607269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// getRegClassFor - Return the register class that should be used for the 1617269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// specified value type. 1627269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez virtual TargetRegisterClass *getRegClassFor(EVT VT) const { 1637269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez assert(VT.isSimple() && "getRegClassFor called on illegal type!"); 1647269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez TargetRegisterClass *RC = RegClassForVT[VT.getSimpleVT().SimpleTy]; 1657269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez assert(RC && "This value type is not natively supported!"); 1667269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return RC; 1677269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 1687269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 1697269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// isTypeLegal - Return true if the target has native support for the 1707269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// specified value type. This means that it has a register that directly 1717269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// holds it without promotions or expansions. 1727269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez bool isTypeLegal(EVT VT) const { 1737269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez assert(!VT.isSimple() || 1747269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez (unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT)); 1757269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return VT.isSimple() && RegClassForVT[VT.getSimpleVT().SimpleTy] != 0; 1767269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 1777269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 1787269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// isTypeSynthesizable - Return true if it's OK for the compiler to create 1797269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// new operations of this type. All Legal types are synthesizable except 1807269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// MMX vector types on X86. Non-Legal types are not synthesizable. 1817269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez bool isTypeSynthesizable(EVT VT) const { 1827269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return isTypeLegal(VT) && Synthesizable[VT.getSimpleVT().SimpleTy]; 1837269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 1847269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 1857269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez class ValueTypeActionImpl { 1867269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// ValueTypeActions - For each value type, keep a LegalizeAction enum 18751e8a66fa197de7e17fb94d901a4cf26f0812670Francisco Jerez /// that indicates how instruction selection should deal with the type. 18851e8a66fa197de7e17fb94d901a4cf26f0812670Francisco Jerez uint8_t ValueTypeActions[MVT::LAST_VALUETYPE]; 18951e8a66fa197de7e17fb94d901a4cf26f0812670Francisco Jerez public: 19051e8a66fa197de7e17fb94d901a4cf26f0812670Francisco Jerez ValueTypeActionImpl() { 19151e8a66fa197de7e17fb94d901a4cf26f0812670Francisco Jerez std::fill(ValueTypeActions, array_endof(ValueTypeActions), 0); 19251e8a66fa197de7e17fb94d901a4cf26f0812670Francisco Jerez } 19351e8a66fa197de7e17fb94d901a4cf26f0812670Francisco Jerez LegalizeAction getTypeAction(LLVMContext &Context, EVT VT) const { 1947269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez if (VT.isExtended()) { 195bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez if (VT.isVector()) { 196bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return VT.isPow2VectorType() ? Expand : Promote; 1977269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 1987269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez if (VT.isInteger()) 199bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez // First promote to a power-of-two size, then expand if necessary. 200bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return VT == VT.getRoundIntegerType(Context) ? Expand : Promote; 201bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez assert(0 && "Unsupported extended type!"); 202bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return Legal; 203bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 2047269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez unsigned I = VT.getSimpleVT().SimpleTy; 205bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return (LegalizeAction)ValueTypeActions[I]; 206bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 207bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez void setTypeAction(EVT VT, LegalizeAction Action) { 208bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez unsigned I = VT.getSimpleVT().SimpleTy; 209bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez ValueTypeActions[I] = Action; 210bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 211bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez }; 212bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 213bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez const ValueTypeActionImpl &getValueTypeActions() const { 214bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return ValueTypeActions; 215bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 216bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 217bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// getTypeAction - Return how we should legalize values of this type, either 218bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// it is already legal (return 'Legal') or we need to promote it to a larger 219bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// type (return 'Promote'), or we need to expand it into multiple registers 220bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// of smaller integer type (return 'Expand'). 'Custom' is not an option. 221bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez LegalizeAction getTypeAction(LLVMContext &Context, EVT VT) const { 222bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return ValueTypeActions.getTypeAction(Context, VT); 223bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 224bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 225bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// getTypeToTransformTo - For types supported by the target, this is an 226bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// identity function. For types that must be promoted to larger types, this 227bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// returns the larger type to promote to. For integer types that are larger 228bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// than the largest integer register, this contains one step in the expansion 229bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// to get to the smaller register. For illegal floating point types, this 230bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// returns the integer type to transform to. 231bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT getTypeToTransformTo(LLVMContext &Context, EVT VT) const { 232bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez if (VT.isSimple()) { 233bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez assert((unsigned)VT.getSimpleVT().SimpleTy < 234bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez array_lengthof(TransformToType)); 235bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT NVT = TransformToType[VT.getSimpleVT().SimpleTy]; 236bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez assert(getTypeAction(Context, NVT) != Promote && 2373bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez "Promote may not follow Expand or Promote"); 2383bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez return NVT; 2393bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez } 2403bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez 2413bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez if (VT.isVector()) { 2423bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez EVT NVT = VT.getPow2VectorType(Context); 2433bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez if (NVT == VT) { 2443bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez // Vector length is a power of 2 - split to half the size. 2453bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez unsigned NumElts = VT.getVectorNumElements(); 2463bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez EVT EltVT = VT.getVectorElementType(); 2473bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez return (NumElts == 1) ? 248bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EltVT : EVT::getVectorVT(Context, EltVT, NumElts / 2); 2493bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez } 2503bbad7f1084c3d6259dfa23fd60f654c949f7408Francisco Jerez // Promote to a power of two size, avoiding multi-step promotion. 251bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return getTypeAction(Context, NVT) == Promote ? 252bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez getTypeToTransformTo(Context, NVT) : NVT; 253bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } else if (VT.isInteger()) { 254bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT NVT = VT.getRoundIntegerType(Context); 255bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez if (NVT == VT) 256bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez // Size is a power of two - expand to half the size. 257bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return EVT::getIntegerVT(Context, VT.getSizeInBits() / 2); 258bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez else 259bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez // Promote to a power of two size, avoiding multi-step promotion. 260bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return getTypeAction(Context, NVT) == Promote ? 261bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez getTypeToTransformTo(Context, NVT) : NVT; 262bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 263bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez assert(0 && "Unsupported extended type!"); 264bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return MVT(MVT::Other); // Not reached 265bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 266bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 267bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// getTypeToExpandTo - For types supported by the target, this is an 268bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// identity function. For types that must be expanded (i.e. integer types 269bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// that are larger than the largest integer register or illegal floating 270bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// point types), this returns the largest legal type it will be expanded to. 271bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT getTypeToExpandTo(LLVMContext &Context, EVT VT) const { 272bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez assert(!VT.isVector()); 273bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez while (true) { 274bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez switch (getTypeAction(Context, VT)) { 275bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez case Legal: 276bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return VT; 277bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez case Expand: 278bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez VT = getTypeToTransformTo(Context, VT); 279bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez break; 280bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez default: 281bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez assert(false && "Type is not legal nor is it to be expanded!"); 282bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return VT; 283bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 284bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 285bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return VT; 286bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 287bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 288bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// getVectorTypeBreakdown - Vector types are broken down into some number of 289bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// legal first class types. For example, EVT::v8f32 maps to 2 EVT::v4f32 290bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// with Altivec or SSE1, or 8 promoted EVT::f64 values with the X86 FP stack. 291bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// Similarly, EVT::v2i64 turns into 4 EVT::i32 values with both PPC and X86. 292bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// 293bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// This method returns the number of registers needed, and the VT for each 294bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// register. It also returns the VT and quantity of the intermediate values 295bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// before they are promoted/expanded. 296bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// 297bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez unsigned getVectorTypeBreakdown(LLVMContext &Context, EVT VT, 298bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT &IntermediateVT, 299bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez unsigned &NumIntermediates, 300bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT &RegisterVT) const; 301f9995b30756140724f41daf963fa06167912be7fKristian Høgsberg 3027269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// getTgtMemIntrinsic: Given an intrinsic, checks if on the target the 3037269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// intrinsic will need to map to a MemIntrinsicNode (touches memory). If 304bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// this is the case, it returns true and store the intrinsic 305bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// information into the IntrinsicInfo that was passed to the function. 306bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez struct IntrinsicInfo { 307bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez unsigned opc; // target opcode 308bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT memVT; // memory VT 309bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez const Value* ptrVal; // value representing memory location 310bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez int offset; // offset off of ptrVal 311bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez unsigned align; // alignment 312bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool vol; // is volatile? 313bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool readMem; // reads memory? 314bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez bool writeMem; // writes memory? 315bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez }; 316bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 317bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez virtual bool getTgtMemIntrinsic(IntrinsicInfo &Info, 318bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez const CallInst &I, unsigned Intrinsic) const { 3197269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return false; 320bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 321bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 3227269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// isFPImmLegal - Returns true if the target can instruction select the 3237269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// specified FP immediate natively. If false, the legalizer will materialize 3247269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// the FP immediate as a load from a constant pool. 3257269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez virtual bool isFPImmLegal(const APFloat &Imm, EVT VT) const { 3267269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return false; 3277269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 328bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 329bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// isShuffleMaskLegal - Targets can use this to indicate that they only 330bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// support *some* VECTOR_SHUFFLE operations, those with specific masks. 331f9995b30756140724f41daf963fa06167912be7fKristian Høgsberg /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values 332bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// are assumed to be legal. 333bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez virtual bool isShuffleMaskLegal(const SmallVectorImpl<int> &Mask, 334bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT VT) const { 335bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return true; 336bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 337bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 338bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// canOpTrap - Returns true if the operation can trap for the value type. 339bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// VT must be a legal type. By default, we optimistically assume most 340bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// operations don't trap except for divide and remainder. 341bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez virtual bool canOpTrap(unsigned Op, EVT VT) const; 342bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 343bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// isVectorClearMaskLegal - Similar to isShuffleMaskLegal. This is 344bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// used by Targets can use this to indicate if there is a suitable 345bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// VECTOR_SHUFFLE that can be used to replace a VAND with a constant 346bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// pool entry. 347bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez virtual bool isVectorClearMaskLegal(const SmallVectorImpl<int> &Mask, 348bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez EVT VT) const { 349bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return false; 350bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 351bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 352bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// getOperationAction - Return how this operation should be treated: either 353bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// it is legal, needs to be promoted to a larger size, needs to be 354bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// expanded to some other code sequence, or the target has a custom expander 355bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// for it. 356bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez LegalizeAction getOperationAction(unsigned Op, EVT VT) const { 357bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez if (VT.isExtended()) return Expand; 358bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez assert(Op < array_lengthof(OpActions[0]) && "Table isn't big enough!"); 359bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez unsigned I = (unsigned) VT.getSimpleVT().SimpleTy; 360bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez return (LegalizeAction)OpActions[I][Op]; 361bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez } 362bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez 363bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// isOperationLegalOrCustom - Return true if the specified operation is 3647269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// legal on this target or can be made legal with custom lowering. This 3657269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// is used to help guide high-level lowering decisions. 3667269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez bool isOperationLegalOrCustom(unsigned Op, EVT VT) const { 3677269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return (VT == MVT::Other || isTypeLegal(VT)) && 3687269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez (getOperationAction(Op, VT) == Legal || 369f9995b30756140724f41daf963fa06167912be7fKristian Høgsberg getOperationAction(Op, VT) == Custom); 3707269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 3717269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 3722e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs /// isOperationLegal - Return true if the specified operation is legal on this 3737269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// target. 3747269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez bool isOperationLegal(unsigned Op, EVT VT) const { 3757269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return (VT == MVT::Other || isTypeLegal(VT)) && 3767269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez getOperationAction(Op, VT) == Legal; 3777269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 3787269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 3797269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// getLoadExtAction - Return how this load with extension should be treated: 3807269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// either it is legal, needs to be promoted to a larger size, needs to be 3817269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// expanded to some other code sequence, or the target has a custom expander 3827269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// for it. 3837269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez LegalizeAction getLoadExtAction(unsigned ExtType, EVT VT) const { 3847269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez assert(ExtType < ISD::LAST_LOADEXT_TYPE && 3852e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs (unsigned)VT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 3862e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs "Table isn't big enough!"); 3872e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs return (LegalizeAction)LoadExtActions[VT.getSimpleVT().SimpleTy][ExtType]; 3882e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs } 3892e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs 3902e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs /// isLoadExtLegal - Return true if the specified load with extension is legal 3912e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs /// on this target. 3922e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs bool isLoadExtLegal(unsigned ExtType, EVT VT) const { 3932e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs return VT.isSimple() && 3942e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs (getLoadExtAction(ExtType, VT) == Legal || 3957269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez getLoadExtAction(ExtType, VT) == Custom); 3967269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez } 3977269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez 3987269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// getTruncStoreAction - Return how this store with truncation should be 3997269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// treated: either it is legal, needs to be promoted to a larger size, needs 400f9995b30756140724f41daf963fa06167912be7fKristian Høgsberg /// to be expanded to some other code sequence, or the target has a custom 4017269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez /// expander for it. 4022e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs LegalizeAction getTruncStoreAction(EVT ValVT, EVT MemVT) const { 4037269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez assert((unsigned)ValVT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 4047269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez (unsigned)MemVT.getSimpleVT().SimpleTy < MVT::LAST_VALUETYPE && 4057269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez "Table isn't big enough!"); 4067269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez return (LegalizeAction)TruncStoreActions[ValVT.getSimpleVT().SimpleTy] 4077269a30b86745a29bb575ce3545ab82e6514ce2aFrancisco Jerez [MemVT.getSimpleVT().SimpleTy]; 4082e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs } 4092e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs 4102e47d01c9e5325906cf3bb979279599991c6328eBen Skeggs /// isTruncStoreLegal - Return true if the specified store with truncation is 411bfb5dc68fcc9f5dee71f66d9499b8bdcde9627eaFrancisco Jerez /// legal on this target. 412 bool isTruncStoreLegal(EVT ValVT, EVT MemVT) const { 413 return isTypeLegal(ValVT) && MemVT.isSimple() && 414 (getTruncStoreAction(ValVT, MemVT) == Legal || 415 getTruncStoreAction(ValVT, MemVT) == Custom); 416 } 417 418 /// getIndexedLoadAction - Return how the indexed load should be treated: 419 /// either it is legal, needs to be promoted to a larger size, needs to be 420 /// expanded to some other code sequence, or the target has a custom expander 421 /// for it. 422 LegalizeAction 423 getIndexedLoadAction(unsigned IdxMode, EVT VT) const { 424 assert( IdxMode < ISD::LAST_INDEXED_MODE && 425 ((unsigned)VT.getSimpleVT().SimpleTy) < MVT::LAST_VALUETYPE && 426 "Table isn't big enough!"); 427 unsigned Ty = (unsigned)VT.getSimpleVT().SimpleTy; 428 return (LegalizeAction)((IndexedModeActions[Ty][IdxMode] & 0xf0) >> 4); 429 } 430 431 /// isIndexedLoadLegal - Return true if the specified indexed load is legal 432 /// on this target. 433 bool isIndexedLoadLegal(unsigned IdxMode, EVT VT) const { 434 return VT.isSimple() && 435 (getIndexedLoadAction(IdxMode, VT) == Legal || 436 getIndexedLoadAction(IdxMode, VT) == Custom); 437 } 438 439 /// getIndexedStoreAction - Return how the indexed store should be treated: 440 /// either it is legal, needs to be promoted to a larger size, needs to be 441 /// expanded to some other code sequence, or the target has a custom expander 442 /// for it. 443 LegalizeAction 444 getIndexedStoreAction(unsigned IdxMode, EVT VT) const { 445 assert( IdxMode < ISD::LAST_INDEXED_MODE && 446 ((unsigned)VT.getSimpleVT().SimpleTy) < MVT::LAST_VALUETYPE && 447 "Table isn't big enough!"); 448 unsigned Ty = (unsigned)VT.getSimpleVT().SimpleTy; 449 return (LegalizeAction)(IndexedModeActions[Ty][IdxMode] & 0x0f); 450 } 451 452 /// isIndexedStoreLegal - Return true if the specified indexed load is legal 453 /// on this target. 454 bool isIndexedStoreLegal(unsigned IdxMode, EVT VT) const { 455 return VT.isSimple() && 456 (getIndexedStoreAction(IdxMode, VT) == Legal || 457 getIndexedStoreAction(IdxMode, VT) == Custom); 458 } 459 460 /// getCondCodeAction - Return how the condition code should be treated: 461 /// either it is legal, needs to be expanded to some other code sequence, 462 /// or the target has a custom expander for it. 463 LegalizeAction 464 getCondCodeAction(ISD::CondCode CC, EVT VT) const { 465 assert((unsigned)CC < array_lengthof(CondCodeActions) && 466 (unsigned)VT.getSimpleVT().SimpleTy < sizeof(CondCodeActions[0])*4 && 467 "Table isn't big enough!"); 468 LegalizeAction Action = (LegalizeAction) 469 ((CondCodeActions[CC] >> (2*VT.getSimpleVT().SimpleTy)) & 3); 470 assert(Action != Promote && "Can't promote condition code!"); 471 return Action; 472 } 473 474 /// isCondCodeLegal - Return true if the specified condition code is legal 475 /// on this target. 476 bool isCondCodeLegal(ISD::CondCode CC, EVT VT) const { 477 return getCondCodeAction(CC, VT) == Legal || 478 getCondCodeAction(CC, VT) == Custom; 479 } 480 481 482 /// getTypeToPromoteTo - If the action for this operation is to promote, this 483 /// method returns the ValueType to promote to. 484 EVT getTypeToPromoteTo(unsigned Op, EVT VT) const { 485 assert(getOperationAction(Op, VT) == Promote && 486 "This operation isn't promoted!"); 487 488 // See if this has an explicit type specified. 489 std::map<std::pair<unsigned, MVT::SimpleValueType>, 490 MVT::SimpleValueType>::const_iterator PTTI = 491 PromoteToType.find(std::make_pair(Op, VT.getSimpleVT().SimpleTy)); 492 if (PTTI != PromoteToType.end()) return PTTI->second; 493 494 assert((VT.isInteger() || VT.isFloatingPoint()) && 495 "Cannot autopromote this type, add it with AddPromotedToType."); 496 497 EVT NVT = VT; 498 do { 499 NVT = (MVT::SimpleValueType)(NVT.getSimpleVT().SimpleTy+1); 500 assert(NVT.isInteger() == VT.isInteger() && NVT != MVT::isVoid && 501 "Didn't find type to promote to!"); 502 } while (!isTypeLegal(NVT) || 503 getOperationAction(Op, NVT) == Promote); 504 return NVT; 505 } 506 507 /// getValueType - Return the EVT corresponding to this LLVM type. 508 /// This is fixed by the LLVM operations except for the pointer size. If 509 /// AllowUnknown is true, this will return MVT::Other for types with no EVT 510 /// counterpart (e.g. structs), otherwise it will assert. 511 EVT getValueType(const Type *Ty, bool AllowUnknown = false) const { 512 EVT VT = EVT::getEVT(Ty, AllowUnknown); 513 return VT == MVT::iPTR ? PointerTy : VT; 514 } 515 516 /// getByValTypeAlignment - Return the desired alignment for ByVal aggregate 517 /// function arguments in the caller parameter area. This is the actual 518 /// alignment, not its logarithm. 519 virtual unsigned getByValTypeAlignment(const Type *Ty) const; 520 521 /// getRegisterType - Return the type of registers that this ValueType will 522 /// eventually require. 523 EVT getRegisterType(MVT VT) const { 524 assert((unsigned)VT.SimpleTy < array_lengthof(RegisterTypeForVT)); 525 return RegisterTypeForVT[VT.SimpleTy]; 526 } 527 528 /// getRegisterType - Return the type of registers that this ValueType will 529 /// eventually require. 530 EVT getRegisterType(LLVMContext &Context, EVT VT) const { 531 if (VT.isSimple()) { 532 assert((unsigned)VT.getSimpleVT().SimpleTy < 533 array_lengthof(RegisterTypeForVT)); 534 return RegisterTypeForVT[VT.getSimpleVT().SimpleTy]; 535 } 536 if (VT.isVector()) { 537 EVT VT1, RegisterVT; 538 unsigned NumIntermediates; 539 (void)getVectorTypeBreakdown(Context, VT, VT1, 540 NumIntermediates, RegisterVT); 541 return RegisterVT; 542 } 543 if (VT.isInteger()) { 544 return getRegisterType(Context, getTypeToTransformTo(Context, VT)); 545 } 546 assert(0 && "Unsupported extended type!"); 547 return EVT(MVT::Other); // Not reached 548 } 549 550 /// getNumRegisters - Return the number of registers that this ValueType will 551 /// eventually require. This is one for any types promoted to live in larger 552 /// registers, but may be more than one for types (like i64) that are split 553 /// into pieces. For types like i140, which are first promoted then expanded, 554 /// it is the number of registers needed to hold all the bits of the original 555 /// type. For an i140 on a 32 bit machine this means 5 registers. 556 unsigned getNumRegisters(LLVMContext &Context, EVT VT) const { 557 if (VT.isSimple()) { 558 assert((unsigned)VT.getSimpleVT().SimpleTy < 559 array_lengthof(NumRegistersForVT)); 560 return NumRegistersForVT[VT.getSimpleVT().SimpleTy]; 561 } 562 if (VT.isVector()) { 563 EVT VT1, VT2; 564 unsigned NumIntermediates; 565 return getVectorTypeBreakdown(Context, VT, VT1, NumIntermediates, VT2); 566 } 567 if (VT.isInteger()) { 568 unsigned BitWidth = VT.getSizeInBits(); 569 unsigned RegWidth = getRegisterType(Context, VT).getSizeInBits(); 570 return (BitWidth + RegWidth - 1) / RegWidth; 571 } 572 assert(0 && "Unsupported extended type!"); 573 return 0; // Not reached 574 } 575 576 /// ShouldShrinkFPConstant - If true, then instruction selection should 577 /// seek to shrink the FP constant of the specified type to a smaller type 578 /// in order to save space and / or reduce runtime. 579 virtual bool ShouldShrinkFPConstant(EVT VT) const { return true; } 580 581 /// hasTargetDAGCombine - If true, the target has custom DAG combine 582 /// transformations that it can perform for the specified node. 583 bool hasTargetDAGCombine(ISD::NodeType NT) const { 584 assert(unsigned(NT >> 3) < array_lengthof(TargetDAGCombineArray)); 585 return TargetDAGCombineArray[NT >> 3] & (1 << (NT&7)); 586 } 587 588 /// This function returns the maximum number of store operations permitted 589 /// to replace a call to llvm.memset. The value is set by the target at the 590 /// performance threshold for such a replacement. 591 /// @brief Get maximum # of store operations permitted for llvm.memset 592 unsigned getMaxStoresPerMemset() const { return maxStoresPerMemset; } 593 594 /// This function returns the maximum number of store operations permitted 595 /// to replace a call to llvm.memcpy. The value is set by the target at the 596 /// performance threshold for such a replacement. 597 /// @brief Get maximum # of store operations permitted for llvm.memcpy 598 unsigned getMaxStoresPerMemcpy() const { return maxStoresPerMemcpy; } 599 600 /// This function returns the maximum number of store operations permitted 601 /// to replace a call to llvm.memmove. The value is set by the target at the 602 /// performance threshold for such a replacement. 603 /// @brief Get maximum # of store operations permitted for llvm.memmove 604 unsigned getMaxStoresPerMemmove() const { return maxStoresPerMemmove; } 605 606 /// This function returns true if the target allows unaligned memory accesses. 607 /// of the specified type. This is used, for example, in situations where an 608 /// array copy/move/set is converted to a sequence of store operations. It's 609 /// use helps to ensure that such replacements don't generate code that causes 610 /// an alignment error (trap) on the target machine. 611 /// @brief Determine if the target supports unaligned memory accesses. 612 virtual bool allowsUnalignedMemoryAccesses(EVT VT) const { 613 return false; 614 } 615 616 /// This function returns true if the target would benefit from code placement 617 /// optimization. 618 /// @brief Determine if the target should perform code placement optimization. 619 bool shouldOptimizeCodePlacement() const { 620 return benefitFromCodePlacementOpt; 621 } 622 623 /// getOptimalMemOpType - Returns the target specific optimal type for load 624 /// and store operations as a result of memset, memcpy, and memmove 625 /// lowering. If DstAlign is zero that means it's safe to destination 626 /// alignment can satisfy any constraint. Similarly if SrcAlign is zero it 627 /// means there isn't a need to check it against alignment requirement, 628 /// probably because the source does not need to be loaded. If 629 /// 'NonScalarIntSafe' is true, that means it's safe to return a 630 /// non-scalar-integer type, e.g. empty string source, constant, or loaded 631 /// from memory. 'MemcpyStrSrc' indicates whether the memcpy source is 632 /// constant so it does not need to be loaded. 633 /// It returns EVT::Other if the type should be determined using generic 634 /// target-independent logic. 635 virtual EVT getOptimalMemOpType(uint64_t Size, 636 unsigned DstAlign, unsigned SrcAlign, 637 bool NonScalarIntSafe, bool MemcpyStrSrc, 638 MachineFunction &MF) const { 639 return MVT::Other; 640 } 641 642 /// usesUnderscoreSetJmp - Determine if we should use _setjmp or setjmp 643 /// to implement llvm.setjmp. 644 bool usesUnderscoreSetJmp() const { 645 return UseUnderscoreSetJmp; 646 } 647 648 /// usesUnderscoreLongJmp - Determine if we should use _longjmp or longjmp 649 /// to implement llvm.longjmp. 650 bool usesUnderscoreLongJmp() const { 651 return UseUnderscoreLongJmp; 652 } 653 654 /// getStackPointerRegisterToSaveRestore - If a physical register, this 655 /// specifies the register that llvm.savestack/llvm.restorestack should save 656 /// and restore. 657 unsigned getStackPointerRegisterToSaveRestore() const { 658 return StackPointerRegisterToSaveRestore; 659 } 660 661 /// getExceptionAddressRegister - If a physical register, this returns 662 /// the register that receives the exception address on entry to a landing 663 /// pad. 664 unsigned getExceptionAddressRegister() const { 665 return ExceptionPointerRegister; 666 } 667 668 /// getExceptionSelectorRegister - If a physical register, this returns 669 /// the register that receives the exception typeid on entry to a landing 670 /// pad. 671 unsigned getExceptionSelectorRegister() const { 672 return ExceptionSelectorRegister; 673 } 674 675 /// getJumpBufSize - returns the target's jmp_buf size in bytes (if never 676 /// set, the default is 200) 677 unsigned getJumpBufSize() const { 678 return JumpBufSize; 679 } 680 681 /// getJumpBufAlignment - returns the target's jmp_buf alignment in bytes 682 /// (if never set, the default is 0) 683 unsigned getJumpBufAlignment() const { 684 return JumpBufAlignment; 685 } 686 687 /// getPrefLoopAlignment - return the preferred loop alignment. 688 /// 689 unsigned getPrefLoopAlignment() const { 690 return PrefLoopAlignment; 691 } 692 693 /// getShouldFoldAtomicFences - return whether the combiner should fold 694 /// fence MEMBARRIER instructions into the atomic intrinsic instructions. 695 /// 696 bool getShouldFoldAtomicFences() const { 697 return ShouldFoldAtomicFences; 698 } 699 700 /// getPreIndexedAddressParts - returns true by value, base pointer and 701 /// offset pointer and addressing mode by reference if the node's address 702 /// can be legally represented as pre-indexed load / store address. 703 virtual bool getPreIndexedAddressParts(SDNode *N, SDValue &Base, 704 SDValue &Offset, 705 ISD::MemIndexedMode &AM, 706 SelectionDAG &DAG) const { 707 return false; 708 } 709 710 /// getPostIndexedAddressParts - returns true by value, base pointer and 711 /// offset pointer and addressing mode by reference if this node can be 712 /// combined with a load / store to form a post-indexed load / store. 713 virtual bool getPostIndexedAddressParts(SDNode *N, SDNode *Op, 714 SDValue &Base, SDValue &Offset, 715 ISD::MemIndexedMode &AM, 716 SelectionDAG &DAG) const { 717 return false; 718 } 719 720 /// getJumpTableEncoding - Return the entry encoding for a jump table in the 721 /// current function. The returned value is a member of the 722 /// MachineJumpTableInfo::JTEntryKind enum. 723 virtual unsigned getJumpTableEncoding() const; 724 725 virtual const MCExpr * 726 LowerCustomJumpTableEntry(const MachineJumpTableInfo *MJTI, 727 const MachineBasicBlock *MBB, unsigned uid, 728 MCContext &Ctx) const { 729 assert(0 && "Need to implement this hook if target has custom JTIs"); 730 return 0; 731 } 732 733 /// getPICJumpTableRelocaBase - Returns relocation base for the given PIC 734 /// jumptable. 735 virtual SDValue getPICJumpTableRelocBase(SDValue Table, 736 SelectionDAG &DAG) const; 737 738 /// getPICJumpTableRelocBaseExpr - This returns the relocation base for the 739 /// given PIC jumptable, the same as getPICJumpTableRelocBase, but as an 740 /// MCExpr. 741 virtual const MCExpr * 742 getPICJumpTableRelocBaseExpr(const MachineFunction *MF, 743 unsigned JTI, MCContext &Ctx) const; 744 745 /// isOffsetFoldingLegal - Return true if folding a constant offset 746 /// with the given GlobalAddress is legal. It is frequently not legal in 747 /// PIC relocation models. 748 virtual bool isOffsetFoldingLegal(const GlobalAddressSDNode *GA) const; 749 750 /// getFunctionAlignment - Return the Log2 alignment of this function. 751 virtual unsigned getFunctionAlignment(const Function *) const = 0; 752 753 /// getStackCookieLocation - Return true if the target stores stack 754 /// protector cookies at a fixed offset in some non-standard address 755 /// space, and populates the address space and offset as 756 /// appropriate. 757 virtual bool getStackCookieLocation(unsigned &AddressSpace, unsigned &Offset) const { 758 return false; 759 } 760 761 //===--------------------------------------------------------------------===// 762 // TargetLowering Optimization Methods 763 // 764 765 /// TargetLoweringOpt - A convenience struct that encapsulates a DAG, and two 766 /// SDValues for returning information from TargetLowering to its clients 767 /// that want to combine 768 struct TargetLoweringOpt { 769 SelectionDAG &DAG; 770 bool LegalTys; 771 bool LegalOps; 772 SDValue Old; 773 SDValue New; 774 775 explicit TargetLoweringOpt(SelectionDAG &InDAG, 776 bool LT, bool LO) : 777 DAG(InDAG), LegalTys(LT), LegalOps(LO) {} 778 779 bool LegalTypes() const { return LegalTys; } 780 bool LegalOperations() const { return LegalOps; } 781 782 bool CombineTo(SDValue O, SDValue N) { 783 Old = O; 784 New = N; 785 return true; 786 } 787 788 /// ShrinkDemandedConstant - Check to see if the specified operand of the 789 /// specified instruction is a constant integer. If so, check to see if 790 /// there are any bits set in the constant that are not demanded. If so, 791 /// shrink the constant and return true. 792 bool ShrinkDemandedConstant(SDValue Op, const APInt &Demanded); 793 794 /// ShrinkDemandedOp - Convert x+y to (VT)((SmallVT)x+(SmallVT)y) if the 795 /// casts are free. This uses isZExtFree and ZERO_EXTEND for the widening 796 /// cast, but it could be generalized for targets with other types of 797 /// implicit widening casts. 798 bool ShrinkDemandedOp(SDValue Op, unsigned BitWidth, const APInt &Demanded, 799 DebugLoc dl); 800 }; 801 802 /// SimplifyDemandedBits - Look at Op. At this point, we know that only the 803 /// DemandedMask bits of the result of Op are ever used downstream. If we can 804 /// use this information to simplify Op, create a new simplified DAG node and 805 /// return true, returning the original and new nodes in Old and New. 806 /// Otherwise, analyze the expression and return a mask of KnownOne and 807 /// KnownZero bits for the expression (used to simplify the caller). 808 /// The KnownZero/One bits may only be accurate for those bits in the 809 /// DemandedMask. 810 bool SimplifyDemandedBits(SDValue Op, const APInt &DemandedMask, 811 APInt &KnownZero, APInt &KnownOne, 812 TargetLoweringOpt &TLO, unsigned Depth = 0) const; 813 814 /// computeMaskedBitsForTargetNode - Determine which of the bits specified in 815 /// Mask are known to be either zero or one and return them in the 816 /// KnownZero/KnownOne bitsets. 817 virtual void computeMaskedBitsForTargetNode(const SDValue Op, 818 const APInt &Mask, 819 APInt &KnownZero, 820 APInt &KnownOne, 821 const SelectionDAG &DAG, 822 unsigned Depth = 0) const; 823 824 /// ComputeNumSignBitsForTargetNode - This method can be implemented by 825 /// targets that want to expose additional information about sign bits to the 826 /// DAG Combiner. 827 virtual unsigned ComputeNumSignBitsForTargetNode(SDValue Op, 828 unsigned Depth = 0) const; 829 830 struct DAGCombinerInfo { 831 void *DC; // The DAG Combiner object. 832 bool BeforeLegalize; 833 bool BeforeLegalizeOps; 834 bool CalledByLegalizer; 835 public: 836 SelectionDAG &DAG; 837 838 DAGCombinerInfo(SelectionDAG &dag, bool bl, bool blo, bool cl, void *dc) 839 : DC(dc), BeforeLegalize(bl), BeforeLegalizeOps(blo), 840 CalledByLegalizer(cl), DAG(dag) {} 841 842 bool isBeforeLegalize() const { return BeforeLegalize; } 843 bool isBeforeLegalizeOps() const { return BeforeLegalizeOps; } 844 bool isCalledByLegalizer() const { return CalledByLegalizer; } 845 846 void AddToWorklist(SDNode *N); 847 SDValue CombineTo(SDNode *N, const std::vector<SDValue> &To, 848 bool AddTo = true); 849 SDValue CombineTo(SDNode *N, SDValue Res, bool AddTo = true); 850 SDValue CombineTo(SDNode *N, SDValue Res0, SDValue Res1, bool AddTo = true); 851 852 void CommitTargetLoweringOpt(const TargetLoweringOpt &TLO); 853 }; 854 855 /// SimplifySetCC - Try to simplify a setcc built with the specified operands 856 /// and cc. If it is unable to simplify it, return a null SDValue. 857 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, 858 ISD::CondCode Cond, bool foldBooleans, 859 DAGCombinerInfo &DCI, DebugLoc dl) const; 860 861 /// isGAPlusOffset - Returns true (and the GlobalValue and the offset) if the 862 /// node is a GlobalAddress + offset. 863 virtual bool 864 isGAPlusOffset(SDNode *N, const GlobalValue* &GA, int64_t &Offset) const; 865 866 /// PerformDAGCombine - This method will be invoked for all target nodes and 867 /// for any target-independent nodes that the target has registered with 868 /// invoke it for. 869 /// 870 /// The semantics are as follows: 871 /// Return Value: 872 /// SDValue.Val == 0 - No change was made 873 /// SDValue.Val == N - N was replaced, is dead, and is already handled. 874 /// otherwise - N should be replaced by the returned Operand. 875 /// 876 /// In addition, methods provided by DAGCombinerInfo may be used to perform 877 /// more complex transformations. 878 /// 879 virtual SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const; 880 881 /// isTypeDesirableForOp - Return true if the target has native support for 882 /// the specified value type and it is 'desirable' to use the type for the 883 /// given node type. e.g. On x86 i16 is legal, but undesirable since i16 884 /// instruction encodings are longer and some i16 instructions are slow. 885 virtual bool isTypeDesirableForOp(unsigned Opc, EVT VT) const { 886 // By default, assume all legal types are desirable. 887 return isTypeLegal(VT); 888 } 889 890 /// IsDesirableToPromoteOp - This method query the target whether it is 891 /// beneficial for dag combiner to promote the specified node. If true, it 892 /// should return the desired promotion type by reference. 893 virtual bool IsDesirableToPromoteOp(SDValue Op, EVT &PVT) const { 894 return false; 895 } 896 897 //===--------------------------------------------------------------------===// 898 // TargetLowering Configuration Methods - These methods should be invoked by 899 // the derived class constructor to configure this object for the target. 900 // 901 902protected: 903 /// setShiftAmountType - Describe the type that should be used for shift 904 /// amounts. This type defaults to the pointer type. 905 void setShiftAmountType(MVT VT) { ShiftAmountTy = VT; } 906 907 /// setBooleanContents - Specify how the target extends the result of a 908 /// boolean value from i1 to a wider type. See getBooleanContents. 909 void setBooleanContents(BooleanContent Ty) { BooleanContents = Ty; } 910 911 /// setSchedulingPreference - Specify the target scheduling preference. 912 void setSchedulingPreference(Sched::Preference Pref) { 913 SchedPreferenceInfo = Pref; 914 } 915 916 /// setUseUnderscoreSetJmp - Indicate whether this target prefers to 917 /// use _setjmp to implement llvm.setjmp or the non _ version. 918 /// Defaults to false. 919 void setUseUnderscoreSetJmp(bool Val) { 920 UseUnderscoreSetJmp = Val; 921 } 922 923 /// setUseUnderscoreLongJmp - Indicate whether this target prefers to 924 /// use _longjmp to implement llvm.longjmp or the non _ version. 925 /// Defaults to false. 926 void setUseUnderscoreLongJmp(bool Val) { 927 UseUnderscoreLongJmp = Val; 928 } 929 930 /// setStackPointerRegisterToSaveRestore - If set to a physical register, this 931 /// specifies the register that llvm.savestack/llvm.restorestack should save 932 /// and restore. 933 void setStackPointerRegisterToSaveRestore(unsigned R) { 934 StackPointerRegisterToSaveRestore = R; 935 } 936 937 /// setExceptionPointerRegister - If set to a physical register, this sets 938 /// the register that receives the exception address on entry to a landing 939 /// pad. 940 void setExceptionPointerRegister(unsigned R) { 941 ExceptionPointerRegister = R; 942 } 943 944 /// setExceptionSelectorRegister - If set to a physical register, this sets 945 /// the register that receives the exception typeid on entry to a landing 946 /// pad. 947 void setExceptionSelectorRegister(unsigned R) { 948 ExceptionSelectorRegister = R; 949 } 950 951 /// SelectIsExpensive - Tells the code generator not to expand operations 952 /// into sequences that use the select operations if possible. 953 void setSelectIsExpensive() { SelectIsExpensive = true; } 954 955 /// setIntDivIsCheap - Tells the code generator that integer divide is 956 /// expensive, and if possible, should be replaced by an alternate sequence 957 /// of instructions not containing an integer divide. 958 void setIntDivIsCheap(bool isCheap = true) { IntDivIsCheap = isCheap; } 959 960 /// setPow2DivIsCheap - Tells the code generator that it shouldn't generate 961 /// srl/add/sra for a signed divide by power of two, and let the target handle 962 /// it. 963 void setPow2DivIsCheap(bool isCheap = true) { Pow2DivIsCheap = isCheap; } 964 965 /// addRegisterClass - Add the specified register class as an available 966 /// regclass for the specified value type. This indicates the selector can 967 /// handle values of that class natively. 968 void addRegisterClass(EVT VT, TargetRegisterClass *RC, 969 bool isSynthesizable = true) { 970 assert((unsigned)VT.getSimpleVT().SimpleTy < array_lengthof(RegClassForVT)); 971 AvailableRegClasses.push_back(std::make_pair(VT, RC)); 972 RegClassForVT[VT.getSimpleVT().SimpleTy] = RC; 973 Synthesizable[VT.getSimpleVT().SimpleTy] = isSynthesizable; 974 } 975 976 /// computeRegisterProperties - Once all of the register classes are added, 977 /// this allows us to compute derived properties we expose. 978 void computeRegisterProperties(); 979 980 /// setOperationAction - Indicate that the specified operation does not work 981 /// with the specified type and indicate what to do about it. 982 void setOperationAction(unsigned Op, MVT VT, 983 LegalizeAction Action) { 984 assert(Op < array_lengthof(OpActions[0]) && "Table isn't big enough!"); 985 OpActions[(unsigned)VT.SimpleTy][Op] = (uint8_t)Action; 986 } 987 988 /// setLoadExtAction - Indicate that the specified load with extension does 989 /// not work with the specified type and indicate what to do about it. 990 void setLoadExtAction(unsigned ExtType, MVT VT, 991 LegalizeAction Action) { 992 assert(ExtType < ISD::LAST_LOADEXT_TYPE && 993 (unsigned)VT.SimpleTy < MVT::LAST_VALUETYPE && 994 "Table isn't big enough!"); 995 LoadExtActions[VT.SimpleTy][ExtType] = (uint8_t)Action; 996 } 997 998 /// setTruncStoreAction - Indicate that the specified truncating store does 999 /// not work with the specified type and indicate what to do about it. 1000 void setTruncStoreAction(MVT ValVT, MVT MemVT, 1001 LegalizeAction Action) { 1002 assert((unsigned)ValVT.SimpleTy < MVT::LAST_VALUETYPE && 1003 (unsigned)MemVT.SimpleTy < MVT::LAST_VALUETYPE && 1004 "Table isn't big enough!"); 1005 TruncStoreActions[ValVT.SimpleTy][MemVT.SimpleTy] = (uint8_t)Action; 1006 } 1007 1008 /// setIndexedLoadAction - Indicate that the specified indexed load does or 1009 /// does not work with the specified type and indicate what to do abort 1010 /// it. NOTE: All indexed mode loads are initialized to Expand in 1011 /// TargetLowering.cpp 1012 void setIndexedLoadAction(unsigned IdxMode, MVT VT, 1013 LegalizeAction Action) { 1014 assert((unsigned)VT.SimpleTy < MVT::LAST_VALUETYPE && 1015 IdxMode < ISD::LAST_INDEXED_MODE && 1016 (unsigned)Action < 0xf && 1017 "Table isn't big enough!"); 1018 // Load action are kept in the upper half. 1019 IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] &= ~0xf0; 1020 IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] |= ((uint8_t)Action) <<4; 1021 } 1022 1023 /// setIndexedStoreAction - Indicate that the specified indexed store does or 1024 /// does not work with the specified type and indicate what to do about 1025 /// it. NOTE: All indexed mode stores are initialized to Expand in 1026 /// TargetLowering.cpp 1027 void setIndexedStoreAction(unsigned IdxMode, MVT VT, 1028 LegalizeAction Action) { 1029 assert((unsigned)VT.SimpleTy < MVT::LAST_VALUETYPE && 1030 IdxMode < ISD::LAST_INDEXED_MODE && 1031 (unsigned)Action < 0xf && 1032 "Table isn't big enough!"); 1033 // Store action are kept in the lower half. 1034 IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] &= ~0x0f; 1035 IndexedModeActions[(unsigned)VT.SimpleTy][IdxMode] |= ((uint8_t)Action); 1036 } 1037 1038 /// setCondCodeAction - Indicate that the specified condition code is or isn't 1039 /// supported on the target and indicate what to do about it. 1040 void setCondCodeAction(ISD::CondCode CC, MVT VT, 1041 LegalizeAction Action) { 1042 assert((unsigned)VT.SimpleTy < MVT::LAST_VALUETYPE && 1043 (unsigned)CC < array_lengthof(CondCodeActions) && 1044 "Table isn't big enough!"); 1045 CondCodeActions[(unsigned)CC] &= ~(uint64_t(3UL) << VT.SimpleTy*2); 1046 CondCodeActions[(unsigned)CC] |= (uint64_t)Action << VT.SimpleTy*2; 1047 } 1048 1049 /// AddPromotedToType - If Opc/OrigVT is specified as being promoted, the 1050 /// promotion code defaults to trying a larger integer/fp until it can find 1051 /// one that works. If that default is insufficient, this method can be used 1052 /// by the target to override the default. 1053 void AddPromotedToType(unsigned Opc, MVT OrigVT, MVT DestVT) { 1054 PromoteToType[std::make_pair(Opc, OrigVT.SimpleTy)] = DestVT.SimpleTy; 1055 } 1056 1057 /// setTargetDAGCombine - Targets should invoke this method for each target 1058 /// independent node that they want to provide a custom DAG combiner for by 1059 /// implementing the PerformDAGCombine virtual method. 1060 void setTargetDAGCombine(ISD::NodeType NT) { 1061 assert(unsigned(NT >> 3) < array_lengthof(TargetDAGCombineArray)); 1062 TargetDAGCombineArray[NT >> 3] |= 1 << (NT&7); 1063 } 1064 1065 /// setJumpBufSize - Set the target's required jmp_buf buffer size (in 1066 /// bytes); default is 200 1067 void setJumpBufSize(unsigned Size) { 1068 JumpBufSize = Size; 1069 } 1070 1071 /// setJumpBufAlignment - Set the target's required jmp_buf buffer 1072 /// alignment (in bytes); default is 0 1073 void setJumpBufAlignment(unsigned Align) { 1074 JumpBufAlignment = Align; 1075 } 1076 1077 /// setPrefLoopAlignment - Set the target's preferred loop alignment. Default 1078 /// alignment is zero, it means the target does not care about loop alignment. 1079 void setPrefLoopAlignment(unsigned Align) { 1080 PrefLoopAlignment = Align; 1081 } 1082 1083 /// setShouldFoldAtomicFences - Set if the target's implementation of the 1084 /// atomic operation intrinsics includes locking. Default is false. 1085 void setShouldFoldAtomicFences(bool fold) { 1086 ShouldFoldAtomicFences = fold; 1087 } 1088 1089public: 1090 //===--------------------------------------------------------------------===// 1091 // Lowering methods - These methods must be implemented by targets so that 1092 // the SelectionDAGLowering code knows how to lower these. 1093 // 1094 1095 /// LowerFormalArguments - This hook must be implemented to lower the 1096 /// incoming (formal) arguments, described by the Ins array, into the 1097 /// specified DAG. The implementation should fill in the InVals array 1098 /// with legal-type argument values, and return the resulting token 1099 /// chain value. 1100 /// 1101 virtual SDValue 1102 LowerFormalArguments(SDValue Chain, 1103 CallingConv::ID CallConv, bool isVarArg, 1104 const SmallVectorImpl<ISD::InputArg> &Ins, 1105 DebugLoc dl, SelectionDAG &DAG, 1106 SmallVectorImpl<SDValue> &InVals) const { 1107 assert(0 && "Not Implemented"); 1108 return SDValue(); // this is here to silence compiler errors 1109 } 1110 1111 /// LowerCallTo - This function lowers an abstract call to a function into an 1112 /// actual call. This returns a pair of operands. The first element is the 1113 /// return value for the function (if RetTy is not VoidTy). The second 1114 /// element is the outgoing token chain. It calls LowerCall to do the actual 1115 /// lowering. 1116 struct ArgListEntry { 1117 SDValue Node; 1118 const Type* Ty; 1119 bool isSExt : 1; 1120 bool isZExt : 1; 1121 bool isInReg : 1; 1122 bool isSRet : 1; 1123 bool isNest : 1; 1124 bool isByVal : 1; 1125 uint16_t Alignment; 1126 1127 ArgListEntry() : isSExt(false), isZExt(false), isInReg(false), 1128 isSRet(false), isNest(false), isByVal(false), Alignment(0) { } 1129 }; 1130 typedef std::vector<ArgListEntry> ArgListTy; 1131 std::pair<SDValue, SDValue> 1132 LowerCallTo(SDValue Chain, const Type *RetTy, bool RetSExt, bool RetZExt, 1133 bool isVarArg, bool isInreg, unsigned NumFixedArgs, 1134 CallingConv::ID CallConv, bool isTailCall, 1135 bool isReturnValueUsed, SDValue Callee, ArgListTy &Args, 1136 SelectionDAG &DAG, DebugLoc dl) const; 1137 1138 /// LowerCall - This hook must be implemented to lower calls into the 1139 /// the specified DAG. The outgoing arguments to the call are described 1140 /// by the Outs array, and the values to be returned by the call are 1141 /// described by the Ins array. The implementation should fill in the 1142 /// InVals array with legal-type return values from the call, and return 1143 /// the resulting token chain value. 1144 virtual SDValue 1145 LowerCall(SDValue Chain, SDValue Callee, 1146 CallingConv::ID CallConv, bool isVarArg, bool &isTailCall, 1147 const SmallVectorImpl<ISD::OutputArg> &Outs, 1148 const SmallVectorImpl<SDValue> &OutVals, 1149 const SmallVectorImpl<ISD::InputArg> &Ins, 1150 DebugLoc dl, SelectionDAG &DAG, 1151 SmallVectorImpl<SDValue> &InVals) const { 1152 assert(0 && "Not Implemented"); 1153 return SDValue(); // this is here to silence compiler errors 1154 } 1155 1156 /// CanLowerReturn - This hook should be implemented to check whether the 1157 /// return values described by the Outs array can fit into the return 1158 /// registers. If false is returned, an sret-demotion is performed. 1159 /// 1160 virtual bool CanLowerReturn(CallingConv::ID CallConv, bool isVarArg, 1161 const SmallVectorImpl<EVT> &OutTys, 1162 const SmallVectorImpl<ISD::ArgFlagsTy> &ArgsFlags, 1163 LLVMContext &Context) const 1164 { 1165 // Return true by default to get preexisting behavior. 1166 return true; 1167 } 1168 1169 /// LowerReturn - This hook must be implemented to lower outgoing 1170 /// return values, described by the Outs array, into the specified 1171 /// DAG. The implementation should return the resulting token chain 1172 /// value. 1173 /// 1174 virtual SDValue 1175 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, 1176 const SmallVectorImpl<ISD::OutputArg> &Outs, 1177 const SmallVectorImpl<SDValue> &OutVals, 1178 DebugLoc dl, SelectionDAG &DAG) const { 1179 assert(0 && "Not Implemented"); 1180 return SDValue(); // this is here to silence compiler errors 1181 } 1182 1183 /// LowerOperationWrapper - This callback is invoked by the type legalizer 1184 /// to legalize nodes with an illegal operand type but legal result types. 1185 /// It replaces the LowerOperation callback in the type Legalizer. 1186 /// The reason we can not do away with LowerOperation entirely is that 1187 /// LegalizeDAG isn't yet ready to use this callback. 1188 /// TODO: Consider merging with ReplaceNodeResults. 1189 1190 /// The target places new result values for the node in Results (their number 1191 /// and types must exactly match those of the original return values of 1192 /// the node), or leaves Results empty, which indicates that the node is not 1193 /// to be custom lowered after all. 1194 /// The default implementation calls LowerOperation. 1195 virtual void LowerOperationWrapper(SDNode *N, 1196 SmallVectorImpl<SDValue> &Results, 1197 SelectionDAG &DAG) const; 1198 1199 /// LowerOperation - This callback is invoked for operations that are 1200 /// unsupported by the target, which are registered to use 'custom' lowering, 1201 /// and whose defined values are all legal. 1202 /// If the target has no operations that require custom lowering, it need not 1203 /// implement this. The default implementation of this aborts. 1204 virtual SDValue LowerOperation(SDValue Op, SelectionDAG &DAG) const; 1205 1206 /// ReplaceNodeResults - This callback is invoked when a node result type is 1207 /// illegal for the target, and the operation was registered to use 'custom' 1208 /// lowering for that result type. The target places new result values for 1209 /// the node in Results (their number and types must exactly match those of 1210 /// the original return values of the node), or leaves Results empty, which 1211 /// indicates that the node is not to be custom lowered after all. 1212 /// 1213 /// If the target has no operations that require custom lowering, it need not 1214 /// implement this. The default implementation aborts. 1215 virtual void ReplaceNodeResults(SDNode *N, SmallVectorImpl<SDValue> &Results, 1216 SelectionDAG &DAG) const { 1217 assert(0 && "ReplaceNodeResults not implemented for this target!"); 1218 } 1219 1220 /// getTargetNodeName() - This method returns the name of a target specific 1221 /// DAG node. 1222 virtual const char *getTargetNodeName(unsigned Opcode) const; 1223 1224 /// createFastISel - This method returns a target specific FastISel object, 1225 /// or null if the target does not support "fast" ISel. 1226 virtual FastISel * 1227 createFastISel(MachineFunction &, 1228 DenseMap<const Value *, unsigned> &, 1229 DenseMap<const BasicBlock *, MachineBasicBlock *> &, 1230 DenseMap<const AllocaInst *, int> &, 1231 std::vector<std::pair<MachineInstr*, unsigned> > & 1232#ifndef NDEBUG 1233 , SmallSet<const Instruction *, 8> &CatchInfoLost 1234#endif 1235 ) const { 1236 return 0; 1237 } 1238 1239 //===--------------------------------------------------------------------===// 1240 // Inline Asm Support hooks 1241 // 1242 1243 /// ExpandInlineAsm - This hook allows the target to expand an inline asm 1244 /// call to be explicit llvm code if it wants to. This is useful for 1245 /// turning simple inline asms into LLVM intrinsics, which gives the 1246 /// compiler more information about the behavior of the code. 1247 virtual bool ExpandInlineAsm(CallInst *CI) const { 1248 return false; 1249 } 1250 1251 enum ConstraintType { 1252 C_Register, // Constraint represents specific register(s). 1253 C_RegisterClass, // Constraint represents any of register(s) in class. 1254 C_Memory, // Memory constraint. 1255 C_Other, // Something else. 1256 C_Unknown // Unsupported constraint. 1257 }; 1258 1259 /// AsmOperandInfo - This contains information for each constraint that we are 1260 /// lowering. 1261 struct AsmOperandInfo : public InlineAsm::ConstraintInfo { 1262 /// ConstraintCode - This contains the actual string for the code, like "m". 1263 /// TargetLowering picks the 'best' code from ConstraintInfo::Codes that 1264 /// most closely matches the operand. 1265 std::string ConstraintCode; 1266 1267 /// ConstraintType - Information about the constraint code, e.g. Register, 1268 /// RegisterClass, Memory, Other, Unknown. 1269 TargetLowering::ConstraintType ConstraintType; 1270 1271 /// CallOperandval - If this is the result output operand or a 1272 /// clobber, this is null, otherwise it is the incoming operand to the 1273 /// CallInst. This gets modified as the asm is processed. 1274 Value *CallOperandVal; 1275 1276 /// ConstraintVT - The ValueType for the operand value. 1277 EVT ConstraintVT; 1278 1279 /// isMatchingInputConstraint - Return true of this is an input operand that 1280 /// is a matching constraint like "4". 1281 bool isMatchingInputConstraint() const; 1282 1283 /// getMatchedOperand - If this is an input matching constraint, this method 1284 /// returns the output operand it matches. 1285 unsigned getMatchedOperand() const; 1286 1287 AsmOperandInfo(const InlineAsm::ConstraintInfo &info) 1288 : InlineAsm::ConstraintInfo(info), 1289 ConstraintType(TargetLowering::C_Unknown), 1290 CallOperandVal(0), ConstraintVT(MVT::Other) { 1291 } 1292 }; 1293 1294 /// ComputeConstraintToUse - Determines the constraint code and constraint 1295 /// type to use for the specific AsmOperandInfo, setting 1296 /// OpInfo.ConstraintCode and OpInfo.ConstraintType. If the actual operand 1297 /// being passed in is available, it can be passed in as Op, otherwise an 1298 /// empty SDValue can be passed. 1299 virtual void ComputeConstraintToUse(AsmOperandInfo &OpInfo, 1300 SDValue Op, 1301 SelectionDAG *DAG = 0) const; 1302 1303 /// getConstraintType - Given a constraint, return the type of constraint it 1304 /// is for this target. 1305 virtual ConstraintType getConstraintType(const std::string &Constraint) const; 1306 1307 /// getRegClassForInlineAsmConstraint - Given a constraint letter (e.g. "r"), 1308 /// return a list of registers that can be used to satisfy the constraint. 1309 /// This should only be used for C_RegisterClass constraints. 1310 virtual std::vector<unsigned> 1311 getRegClassForInlineAsmConstraint(const std::string &Constraint, 1312 EVT VT) const; 1313 1314 /// getRegForInlineAsmConstraint - Given a physical register constraint (e.g. 1315 /// {edx}), return the register number and the register class for the 1316 /// register. 1317 /// 1318 /// Given a register class constraint, like 'r', if this corresponds directly 1319 /// to an LLVM register class, return a register of 0 and the register class 1320 /// pointer. 1321 /// 1322 /// This should only be used for C_Register constraints. On error, 1323 /// this returns a register number of 0 and a null register class pointer.. 1324 virtual std::pair<unsigned, const TargetRegisterClass*> 1325 getRegForInlineAsmConstraint(const std::string &Constraint, 1326 EVT VT) const; 1327 1328 /// LowerXConstraint - try to replace an X constraint, which matches anything, 1329 /// with another that has more specific requirements based on the type of the 1330 /// corresponding operand. This returns null if there is no replacement to 1331 /// make. 1332 virtual const char *LowerXConstraint(EVT ConstraintVT) const; 1333 1334 /// LowerAsmOperandForConstraint - Lower the specified operand into the Ops 1335 /// vector. If it is invalid, don't add anything to Ops. 1336 virtual void LowerAsmOperandForConstraint(SDValue Op, char ConstraintLetter, 1337 std::vector<SDValue> &Ops, 1338 SelectionDAG &DAG) const; 1339 1340 //===--------------------------------------------------------------------===// 1341 // Instruction Emitting Hooks 1342 // 1343 1344 // EmitInstrWithCustomInserter - This method should be implemented by targets 1345 // that mark instructions with the 'usesCustomInserter' flag. These 1346 // instructions are special in various ways, which require special support to 1347 // insert. The specified MachineInstr is created but not inserted into any 1348 // basic blocks, and this method is called to expand it into a sequence of 1349 // instructions, potentially also creating new basic blocks and control flow. 1350 virtual MachineBasicBlock * 1351 EmitInstrWithCustomInserter(MachineInstr *MI, MachineBasicBlock *MBB) const; 1352 1353 //===--------------------------------------------------------------------===// 1354 // Addressing mode description hooks (used by LSR etc). 1355 // 1356 1357 /// AddrMode - This represents an addressing mode of: 1358 /// BaseGV + BaseOffs + BaseReg + Scale*ScaleReg 1359 /// If BaseGV is null, there is no BaseGV. 1360 /// If BaseOffs is zero, there is no base offset. 1361 /// If HasBaseReg is false, there is no base register. 1362 /// If Scale is zero, there is no ScaleReg. Scale of 1 indicates a reg with 1363 /// no scale. 1364 /// 1365 struct AddrMode { 1366 GlobalValue *BaseGV; 1367 int64_t BaseOffs; 1368 bool HasBaseReg; 1369 int64_t Scale; 1370 AddrMode() : BaseGV(0), BaseOffs(0), HasBaseReg(false), Scale(0) {} 1371 }; 1372 1373 /// isLegalAddressingMode - Return true if the addressing mode represented by 1374 /// AM is legal for this target, for a load/store of the specified type. 1375 /// The type may be VoidTy, in which case only return true if the addressing 1376 /// mode is legal for a load/store of any legal type. 1377 /// TODO: Handle pre/postinc as well. 1378 virtual bool isLegalAddressingMode(const AddrMode &AM, const Type *Ty) const; 1379 1380 /// isTruncateFree - Return true if it's free to truncate a value of 1381 /// type Ty1 to type Ty2. e.g. On x86 it's free to truncate a i32 value in 1382 /// register EAX to i16 by referencing its sub-register AX. 1383 virtual bool isTruncateFree(const Type *Ty1, const Type *Ty2) const { 1384 return false; 1385 } 1386 1387 virtual bool isTruncateFree(EVT VT1, EVT VT2) const { 1388 return false; 1389 } 1390 1391 /// isZExtFree - Return true if any actual instruction that defines a 1392 /// value of type Ty1 implicitly zero-extends the value to Ty2 in the result 1393 /// register. This does not necessarily include registers defined in 1394 /// unknown ways, such as incoming arguments, or copies from unknown 1395 /// virtual registers. Also, if isTruncateFree(Ty2, Ty1) is true, this 1396 /// does not necessarily apply to truncate instructions. e.g. on x86-64, 1397 /// all instructions that define 32-bit values implicit zero-extend the 1398 /// result out to 64 bits. 1399 virtual bool isZExtFree(const Type *Ty1, const Type *Ty2) const { 1400 return false; 1401 } 1402 1403 virtual bool isZExtFree(EVT VT1, EVT VT2) const { 1404 return false; 1405 } 1406 1407 /// isNarrowingProfitable - Return true if it's profitable to narrow 1408 /// operations of type VT1 to VT2. e.g. on x86, it's profitable to narrow 1409 /// from i32 to i8 but not from i32 to i16. 1410 virtual bool isNarrowingProfitable(EVT VT1, EVT VT2) const { 1411 return false; 1412 } 1413 1414 /// isLegalICmpImmediate - Return true if the specified immediate is legal 1415 /// icmp immediate, that is the target has icmp instructions which can compare 1416 /// a register against the immediate without having to materialize the 1417 /// immediate into a register. 1418 virtual bool isLegalICmpImmediate(int64_t Imm) const { 1419 return true; 1420 } 1421 1422 //===--------------------------------------------------------------------===// 1423 // Div utility functions 1424 // 1425 SDValue BuildSDIV(SDNode *N, SelectionDAG &DAG, 1426 std::vector<SDNode*>* Created) const; 1427 SDValue BuildUDIV(SDNode *N, SelectionDAG &DAG, 1428 std::vector<SDNode*>* Created) const; 1429 1430 1431 //===--------------------------------------------------------------------===// 1432 // Runtime Library hooks 1433 // 1434 1435 /// setLibcallName - Rename the default libcall routine name for the specified 1436 /// libcall. 1437 void setLibcallName(RTLIB::Libcall Call, const char *Name) { 1438 LibcallRoutineNames[Call] = Name; 1439 } 1440 1441 /// getLibcallName - Get the libcall routine name for the specified libcall. 1442 /// 1443 const char *getLibcallName(RTLIB::Libcall Call) const { 1444 return LibcallRoutineNames[Call]; 1445 } 1446 1447 /// setCmpLibcallCC - Override the default CondCode to be used to test the 1448 /// result of the comparison libcall against zero. 1449 void setCmpLibcallCC(RTLIB::Libcall Call, ISD::CondCode CC) { 1450 CmpLibcallCCs[Call] = CC; 1451 } 1452 1453 /// getCmpLibcallCC - Get the CondCode that's to be used to test the result of 1454 /// the comparison libcall against zero. 1455 ISD::CondCode getCmpLibcallCC(RTLIB::Libcall Call) const { 1456 return CmpLibcallCCs[Call]; 1457 } 1458 1459 /// setLibcallCallingConv - Set the CallingConv that should be used for the 1460 /// specified libcall. 1461 void setLibcallCallingConv(RTLIB::Libcall Call, CallingConv::ID CC) { 1462 LibcallCallingConvs[Call] = CC; 1463 } 1464 1465 /// getLibcallCallingConv - Get the CallingConv that should be used for the 1466 /// specified libcall. 1467 CallingConv::ID getLibcallCallingConv(RTLIB::Libcall Call) const { 1468 return LibcallCallingConvs[Call]; 1469 } 1470 1471private: 1472 const TargetMachine &TM; 1473 const TargetData *TD; 1474 const TargetLoweringObjectFile &TLOF; 1475 1476 /// PointerTy - The type to use for pointers, usually i32 or i64. 1477 /// 1478 MVT PointerTy; 1479 1480 /// IsLittleEndian - True if this is a little endian target. 1481 /// 1482 bool IsLittleEndian; 1483 1484 /// SelectIsExpensive - Tells the code generator not to expand operations 1485 /// into sequences that use the select operations if possible. 1486 bool SelectIsExpensive; 1487 1488 /// IntDivIsCheap - Tells the code generator not to expand integer divides by 1489 /// constants into a sequence of muls, adds, and shifts. This is a hack until 1490 /// a real cost model is in place. If we ever optimize for size, this will be 1491 /// set to true unconditionally. 1492 bool IntDivIsCheap; 1493 1494 /// Pow2DivIsCheap - Tells the code generator that it shouldn't generate 1495 /// srl/add/sra for a signed divide by power of two, and let the target handle 1496 /// it. 1497 bool Pow2DivIsCheap; 1498 1499 /// UseUnderscoreSetJmp - This target prefers to use _setjmp to implement 1500 /// llvm.setjmp. Defaults to false. 1501 bool UseUnderscoreSetJmp; 1502 1503 /// UseUnderscoreLongJmp - This target prefers to use _longjmp to implement 1504 /// llvm.longjmp. Defaults to false. 1505 bool UseUnderscoreLongJmp; 1506 1507 /// ShiftAmountTy - The type to use for shift amounts, usually i8 or whatever 1508 /// PointerTy is. 1509 MVT ShiftAmountTy; 1510 1511 /// BooleanContents - Information about the contents of the high-bits in 1512 /// boolean values held in a type wider than i1. See getBooleanContents. 1513 BooleanContent BooleanContents; 1514 1515 /// SchedPreferenceInfo - The target scheduling preference: shortest possible 1516 /// total cycles or lowest register usage. 1517 Sched::Preference SchedPreferenceInfo; 1518 1519 /// JumpBufSize - The size, in bytes, of the target's jmp_buf buffers 1520 unsigned JumpBufSize; 1521 1522 /// JumpBufAlignment - The alignment, in bytes, of the target's jmp_buf 1523 /// buffers 1524 unsigned JumpBufAlignment; 1525 1526 /// PrefLoopAlignment - The perferred loop alignment. 1527 /// 1528 unsigned PrefLoopAlignment; 1529 1530 /// ShouldFoldAtomicFences - Whether fencing MEMBARRIER instructions should 1531 /// be folded into the enclosed atomic intrinsic instruction by the 1532 /// combiner. 1533 bool ShouldFoldAtomicFences; 1534 1535 /// StackPointerRegisterToSaveRestore - If set to a physical register, this 1536 /// specifies the register that llvm.savestack/llvm.restorestack should save 1537 /// and restore. 1538 unsigned StackPointerRegisterToSaveRestore; 1539 1540 /// ExceptionPointerRegister - If set to a physical register, this specifies 1541 /// the register that receives the exception address on entry to a landing 1542 /// pad. 1543 unsigned ExceptionPointerRegister; 1544 1545 /// ExceptionSelectorRegister - If set to a physical register, this specifies 1546 /// the register that receives the exception typeid on entry to a landing 1547 /// pad. 1548 unsigned ExceptionSelectorRegister; 1549 1550 /// RegClassForVT - This indicates the default register class to use for 1551 /// each ValueType the target supports natively. 1552 TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE]; 1553 unsigned char NumRegistersForVT[MVT::LAST_VALUETYPE]; 1554 EVT RegisterTypeForVT[MVT::LAST_VALUETYPE]; 1555 1556 /// Synthesizable indicates whether it is OK for the compiler to create new 1557 /// operations using this type. All Legal types are Synthesizable except 1558 /// MMX types on X86. Non-Legal types are not Synthesizable. 1559 bool Synthesizable[MVT::LAST_VALUETYPE]; 1560 1561 /// TransformToType - For any value types we are promoting or expanding, this 1562 /// contains the value type that we are changing to. For Expanded types, this 1563 /// contains one step of the expand (e.g. i64 -> i32), even if there are 1564 /// multiple steps required (e.g. i64 -> i16). For types natively supported 1565 /// by the system, this holds the same type (e.g. i32 -> i32). 1566 EVT TransformToType[MVT::LAST_VALUETYPE]; 1567 1568 /// OpActions - For each operation and each value type, keep a LegalizeAction 1569 /// that indicates how instruction selection should deal with the operation. 1570 /// Most operations are Legal (aka, supported natively by the target), but 1571 /// operations that are not should be described. Note that operations on 1572 /// non-legal value types are not described here. 1573 uint8_t OpActions[MVT::LAST_VALUETYPE][ISD::BUILTIN_OP_END]; 1574 1575 /// LoadExtActions - For each load extension type and each value type, 1576 /// keep a LegalizeAction that indicates how instruction selection should deal 1577 /// with a load of a specific value type and extension type. 1578 uint8_t LoadExtActions[MVT::LAST_VALUETYPE][ISD::LAST_LOADEXT_TYPE]; 1579 1580 /// TruncStoreActions - For each value type pair keep a LegalizeAction that 1581 /// indicates whether a truncating store of a specific value type and 1582 /// truncating type is legal. 1583 uint8_t TruncStoreActions[MVT::LAST_VALUETYPE][MVT::LAST_VALUETYPE]; 1584 1585 /// IndexedModeActions - For each indexed mode and each value type, 1586 /// keep a pair of LegalizeAction that indicates how instruction 1587 /// selection should deal with the load / store. The first dimension is the 1588 /// value_type for the reference. The second dimension represents the various 1589 /// modes for load store. 1590 uint8_t IndexedModeActions[MVT::LAST_VALUETYPE][ISD::LAST_INDEXED_MODE]; 1591 1592 /// CondCodeActions - For each condition code (ISD::CondCode) keep a 1593 /// LegalizeAction that indicates how instruction selection should 1594 /// deal with the condition code. 1595 uint64_t CondCodeActions[ISD::SETCC_INVALID]; 1596 1597 ValueTypeActionImpl ValueTypeActions; 1598 1599 std::vector<std::pair<EVT, TargetRegisterClass*> > AvailableRegClasses; 1600 1601 /// TargetDAGCombineArray - Targets can specify ISD nodes that they would 1602 /// like PerformDAGCombine callbacks for by calling setTargetDAGCombine(), 1603 /// which sets a bit in this array. 1604 unsigned char 1605 TargetDAGCombineArray[(ISD::BUILTIN_OP_END+CHAR_BIT-1)/CHAR_BIT]; 1606 1607 /// PromoteToType - For operations that must be promoted to a specific type, 1608 /// this holds the destination type. This map should be sparse, so don't hold 1609 /// it as an array. 1610 /// 1611 /// Targets add entries to this map with AddPromotedToType(..), clients access 1612 /// this with getTypeToPromoteTo(..). 1613 std::map<std::pair<unsigned, MVT::SimpleValueType>, MVT::SimpleValueType> 1614 PromoteToType; 1615 1616 /// LibcallRoutineNames - Stores the name each libcall. 1617 /// 1618 const char *LibcallRoutineNames[RTLIB::UNKNOWN_LIBCALL]; 1619 1620 /// CmpLibcallCCs - The ISD::CondCode that should be used to test the result 1621 /// of each of the comparison libcall against zero. 1622 ISD::CondCode CmpLibcallCCs[RTLIB::UNKNOWN_LIBCALL]; 1623 1624 /// LibcallCallingConvs - Stores the CallingConv that should be used for each 1625 /// libcall. 1626 CallingConv::ID LibcallCallingConvs[RTLIB::UNKNOWN_LIBCALL]; 1627 1628protected: 1629 /// When lowering \@llvm.memset this field specifies the maximum number of 1630 /// store operations that may be substituted for the call to memset. Targets 1631 /// must set this value based on the cost threshold for that target. Targets 1632 /// should assume that the memset will be done using as many of the largest 1633 /// store operations first, followed by smaller ones, if necessary, per 1634 /// alignment restrictions. For example, storing 9 bytes on a 32-bit machine 1635 /// with 16-bit alignment would result in four 2-byte stores and one 1-byte 1636 /// store. This only applies to setting a constant array of a constant size. 1637 /// @brief Specify maximum number of store instructions per memset call. 1638 unsigned maxStoresPerMemset; 1639 1640 /// When lowering \@llvm.memcpy this field specifies the maximum number of 1641 /// store operations that may be substituted for a call to memcpy. Targets 1642 /// must set this value based on the cost threshold for that target. Targets 1643 /// should assume that the memcpy will be done using as many of the largest 1644 /// store operations first, followed by smaller ones, if necessary, per 1645 /// alignment restrictions. For example, storing 7 bytes on a 32-bit machine 1646 /// with 32-bit alignment would result in one 4-byte store, a one 2-byte store 1647 /// and one 1-byte store. This only applies to copying a constant array of 1648 /// constant size. 1649 /// @brief Specify maximum bytes of store instructions per memcpy call. 1650 unsigned maxStoresPerMemcpy; 1651 1652 /// When lowering \@llvm.memmove this field specifies the maximum number of 1653 /// store instructions that may be substituted for a call to memmove. Targets 1654 /// must set this value based on the cost threshold for that target. Targets 1655 /// should assume that the memmove will be done using as many of the largest 1656 /// store operations first, followed by smaller ones, if necessary, per 1657 /// alignment restrictions. For example, moving 9 bytes on a 32-bit machine 1658 /// with 8-bit alignment would result in nine 1-byte stores. This only 1659 /// applies to copying a constant array of constant size. 1660 /// @brief Specify maximum bytes of store instructions per memmove call. 1661 unsigned maxStoresPerMemmove; 1662 1663 /// This field specifies whether the target can benefit from code placement 1664 /// optimization. 1665 bool benefitFromCodePlacementOpt; 1666}; 1667} // end llvm namespace 1668 1669#endif 1670