TargetLowering.h revision f5428213853bae45247fe6da711ff20954d73dbd
1//===-- llvm/Target/TargetLowering.h - Target Lowering Info -----*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by the LLVM research group and is distributed under 6// the University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file describes how to lower LLVM code to machine code. This has two 11// main components: 12// 13// 1. Which ValueTypes are natively supported by the target. 14// 2. Which operations are supported for supported ValueTypes. 15// 16// In addition it has a few other components, like information about FP 17// immediates. 18// 19//===----------------------------------------------------------------------===// 20 21#ifndef LLVM_TARGET_TARGETLOWERING_H 22#define LLVM_TARGET_TARGETLOWERING_H 23 24#include "llvm/Type.h" 25#include "llvm/CodeGen/ValueTypes.h" 26#include <vector> 27 28namespace llvm { 29 class Function; 30 class TargetMachine; 31 class TargetData; 32 class TargetRegisterClass; 33 class SDNode; 34 class SDOperand; 35 class SelectionDAG; 36 37//===----------------------------------------------------------------------===// 38/// TargetLowering - This class defines information used to lower LLVM code to 39/// legal SelectionDAG operators that the target instruction selector can accept 40/// natively. 41/// 42/// This class also defines callbacks that targets must implement to lower 43/// target-specific constructs to SelectionDAG operators. 44/// 45class TargetLowering { 46public: 47 /// LegalizeAction - This enum indicates whether operations are valid for a 48 /// target, and if not, what action should be used to make them valid. 49 enum LegalizeAction { 50 Legal, // The target natively supports this operation. 51 Promote, // This operation should be executed in a larger type. 52 Expand, // Try to expand this to other ops, otherwise use a libcall. 53 Custom, // Use the LowerOperation hook to implement custom lowering. 54 }; 55 56 enum OutOfRangeShiftAmount { 57 Undefined, // Oversized shift amounts are undefined (default). 58 Mask, // Shift amounts are auto masked (anded) to value size. 59 Extend, // Oversized shift pulls in zeros or sign bits. 60 }; 61 62 enum SetCCResultValue { 63 UndefinedSetCCResult, // SetCC returns a garbage/unknown extend. 64 ZeroOrOneSetCCResult, // SetCC returns a zero extended result. 65 ZeroOrNegativeOneSetCCResult, // SetCC returns a sign extended result. 66 }; 67 68 TargetLowering(TargetMachine &TM); 69 virtual ~TargetLowering(); 70 71 TargetMachine &getTargetMachine() const { return TM; } 72 const TargetData &getTargetData() const { return TD; } 73 74 bool isLittleEndian() const { return IsLittleEndian; } 75 MVT::ValueType getPointerTy() const { return PointerTy; } 76 MVT::ValueType getShiftAmountTy() const { return ShiftAmountTy; } 77 OutOfRangeShiftAmount getShiftAmountFlavor() const {return ShiftAmtHandling; } 78 79 /// isSetCCExpensive - Return true if the setcc operation is expensive for 80 /// this target. 81 bool isSetCCExpensive() const { return SetCCIsExpensive; } 82 83 /// getSetCCResultTy - Return the ValueType of the result of setcc operations. 84 /// 85 MVT::ValueType getSetCCResultTy() const { return SetCCResultTy; } 86 87 /// getSetCCResultContents - For targets without boolean registers, this flag 88 /// returns information about the contents of the high-bits in the setcc 89 /// result register. 90 SetCCResultValue getSetCCResultContents() const { return SetCCResultContents;} 91 92 /// getRegClassFor - Return the register class that should be used for the 93 /// specified value type. This may only be called on legal types. 94 TargetRegisterClass *getRegClassFor(MVT::ValueType VT) const { 95 TargetRegisterClass *RC = RegClassForVT[VT]; 96 assert(RC && "This value type is not natively supported!"); 97 return RC; 98 } 99 100 /// hasNativeSupportFor - Return true if the target has native support for the 101 /// specified value type. This means that it has a register that directly 102 /// holds it without promotions or expansions. 103 bool hasNativeSupportFor(MVT::ValueType VT) const { 104 return RegClassForVT[VT] != 0; 105 } 106 107 /// getTypeAction - Return how we should legalize values of this type, either 108 /// it is already legal (return 'Legal') or we need to promote it to a larger 109 /// type (return 'Promote'), or we need to expand it into multiple registers 110 /// of smaller integer type (return 'Expand'). 'Custom' is not an option. 111 LegalizeAction getTypeAction(MVT::ValueType VT) const { 112 return (LegalizeAction)((ValueTypeActions >> (2*VT)) & 3); 113 } 114 unsigned getValueTypeActions() const { return ValueTypeActions; } 115 116 /// getTypeToTransformTo - For types supported by the target, this is an 117 /// identity function. For types that must be promoted to larger types, this 118 /// returns the larger type to promote to. For types that are larger than the 119 /// largest integer register, this contains one step in the expansion to get 120 /// to the smaller register. 121 MVT::ValueType getTypeToTransformTo(MVT::ValueType VT) const { 122 return TransformToType[VT]; 123 } 124 125 typedef std::vector<double>::const_iterator legal_fpimm_iterator; 126 legal_fpimm_iterator legal_fpimm_begin() const { 127 return LegalFPImmediates.begin(); 128 } 129 legal_fpimm_iterator legal_fpimm_end() const { 130 return LegalFPImmediates.end(); 131 } 132 133 /// getOperationAction - Return how this operation should be 134 LegalizeAction getOperationAction(unsigned Op, MVT::ValueType VT) const { 135 return (LegalizeAction)((OpActions[Op] >> (2*VT)) & 3); 136 } 137 138 /// hasNativeSupportForOperation - Return true if this operation is legal for 139 /// this type. 140 /// 141 bool hasNativeSupportForOperation(unsigned Op, MVT::ValueType VT) const { 142 return getOperationAction(Op, VT) == Legal; 143 } 144 145 /// getTypeToPromoteTo - If the action for this operation is to promote, this 146 /// method returns the ValueType to promote to. 147 MVT::ValueType getTypeToPromoteTo(unsigned Op, MVT::ValueType VT) const { 148 assert(getOperationAction(Op, VT) == Promote && 149 "This operation isn't promoted!"); 150 MVT::ValueType NVT = VT; 151 do { 152 NVT = (MVT::ValueType)(NVT+1); 153 assert(MVT::isInteger(NVT) == MVT::isInteger(VT) && NVT != MVT::isVoid && 154 "Didn't find type to promote to!"); 155 } while (!hasNativeSupportFor(NVT) || 156 getOperationAction(Op, NVT) == Promote); 157 return NVT; 158 } 159 160 /// getValueType - Return the MVT::ValueType corresponding to this LLVM type. 161 /// This is fixed by the LLVM operations except for the pointer size. 162 MVT::ValueType getValueType(const Type *Ty) const { 163 switch (Ty->getTypeID()) { 164 default: assert(0 && "Unknown type!"); 165 case Type::VoidTyID: return MVT::isVoid; 166 case Type::BoolTyID: return MVT::i1; 167 case Type::UByteTyID: 168 case Type::SByteTyID: return MVT::i8; 169 case Type::ShortTyID: 170 case Type::UShortTyID: return MVT::i16; 171 case Type::IntTyID: 172 case Type::UIntTyID: return MVT::i32; 173 case Type::LongTyID: 174 case Type::ULongTyID: return MVT::i64; 175 case Type::FloatTyID: return MVT::f32; 176 case Type::DoubleTyID: return MVT::f64; 177 case Type::PointerTyID: return PointerTy; 178 } 179 } 180 181 /// getNumElements - Return the number of registers that this ValueType will 182 /// eventually require. This is always one for all non-integer types, is 183 /// one for any types promoted to live in larger registers, but may be more 184 /// than one for types (like i64) that are split into pieces. 185 unsigned getNumElements(MVT::ValueType VT) const { 186 return NumElementsForVT[VT]; 187 } 188 189 //===--------------------------------------------------------------------===// 190 // TargetLowering Configuration Methods - These methods should be invoked by 191 // the derived class constructor to configure this object for the target. 192 // 193 194protected: 195 196 /// setShiftAmountType - Describe the type that should be used for shift 197 /// amounts. This type defaults to the pointer type. 198 void setShiftAmountType(MVT::ValueType VT) { ShiftAmountTy = VT; } 199 200 /// setSetCCResultType - Describe the type that shoudl be used as the result 201 /// of a setcc operation. This defaults to the pointer type. 202 void setSetCCResultType(MVT::ValueType VT) { SetCCResultTy = VT; } 203 204 /// setSetCCResultContents - Specify how the target extends the result of a 205 /// setcc operation in a register. 206 void setSetCCResultContents(SetCCResultValue Ty) { SetCCResultContents = Ty; } 207 208 /// setShiftAmountFlavor - Describe how the target handles out of range shift 209 /// amounts. 210 void setShiftAmountFlavor(OutOfRangeShiftAmount OORSA) { 211 ShiftAmtHandling = OORSA; 212 } 213 214 /// setSetCCIxExpensive - This is a short term hack for targets that codegen 215 /// setcc as a conditional branch. This encourages the code generator to fold 216 /// setcc operations into other operations if possible. 217 void setSetCCIsExpensive() { SetCCIsExpensive = true; } 218 219 /// addRegisterClass - Add the specified register class as an available 220 /// regclass for the specified value type. This indicates the selector can 221 /// handle values of that class natively. 222 void addRegisterClass(MVT::ValueType VT, TargetRegisterClass *RC) { 223 AvailableRegClasses.push_back(std::make_pair(VT, RC)); 224 RegClassForVT[VT] = RC; 225 } 226 227 /// computeRegisterProperties - Once all of the register classes are added, 228 /// this allows us to compute derived properties we expose. 229 void computeRegisterProperties(); 230 231 /// setOperationAction - Indicate that the specified operation does not work 232 /// with the specified type and indicate what to do about it. 233 void setOperationAction(unsigned Op, MVT::ValueType VT, 234 LegalizeAction Action) { 235 assert(VT < 16 && Op < sizeof(OpActions)/sizeof(OpActions[0]) && 236 "Table isn't big enough!"); 237 OpActions[Op] |= Action << VT*2; 238 } 239 240 /// addLegalFPImmediate - Indicate that this target can instruction select 241 /// the specified FP immediate natively. 242 void addLegalFPImmediate(double Imm) { 243 LegalFPImmediates.push_back(Imm); 244 } 245 246public: 247 248 //===--------------------------------------------------------------------===// 249 // Lowering methods - These methods must be implemented by targets so that 250 // the SelectionDAGLowering code knows how to lower these. 251 // 252 253 /// LowerArguments - This hook must be implemented to indicate how we should 254 /// lower the arguments for the specified function, into the specified DAG. 255 virtual std::vector<SDOperand> 256 LowerArguments(Function &F, SelectionDAG &DAG) = 0; 257 258 /// LowerCallTo - This hook lowers an abstract call to a function into an 259 /// actual call. This returns a pair of operands. The first element is the 260 /// return value for the function (if RetTy is not VoidTy). The second 261 /// element is the outgoing token chain. 262 typedef std::vector<std::pair<SDOperand, const Type*> > ArgListTy; 263 virtual std::pair<SDOperand, SDOperand> 264 LowerCallTo(SDOperand Chain, const Type *RetTy, bool isVarArg, 265 unsigned CallingConv, bool isTailCall, SDOperand Callee, 266 ArgListTy &Args, SelectionDAG &DAG) = 0; 267 268 /// LowerVAStart - This lowers the llvm.va_start intrinsic. If not 269 /// implemented, this method prints a message and aborts. 270 virtual std::pair<SDOperand, SDOperand> 271 LowerVAStart(SDOperand Chain, SelectionDAG &DAG, SDOperand Dest); 272 273 /// LowerVAEnd - This lowers llvm.va_end and returns the resultant chain. If 274 /// not implemented, this defaults to a noop. 275 virtual SDOperand LowerVAEnd(SDOperand Chain, SDOperand L, SelectionDAG &DAG); 276 277 /// LowerVACopy - This lowers llvm.va_copy and returns the resultant 278 /// value/chain pair. If not implemented, this defaults to returning the 279 /// input operand. 280 virtual std::pair<SDOperand,SDOperand> 281 LowerVACopy(SDOperand Chain, SDOperand Src, SDOperand Dest, SelectionDAG &DAG); 282 283 /// LowerVAArgNext - This lowers the instruction 284 /// If not implemented, this prints a message and aborts. 285 virtual std::pair<SDOperand,SDOperand> 286 LowerVAArgNext(SDOperand Chain, SDOperand VAList, 287 const Type *ArgTy, SelectionDAG &DAG); 288 289 /// LowerFrameReturnAddress - This hook lowers a call to llvm.returnaddress or 290 /// llvm.frameaddress (depending on the value of the first argument). The 291 /// return values are the result pointer and the resultant token chain. If 292 /// not implemented, both of these intrinsics will return null. 293 virtual std::pair<SDOperand, SDOperand> 294 LowerFrameReturnAddress(bool isFrameAddr, SDOperand Chain, unsigned Depth, 295 SelectionDAG &DAG); 296 297 /// LowerOperation - For operations that are unsupported by the target, and 298 /// which are registered to use 'custom' lowering. This callback is invoked. 299 /// If the target has no operations that require custom lowering, it need not 300 /// implement this. The default implementation of this aborts. 301 virtual SDOperand LowerOperation(SDOperand Op, SelectionDAG &DAG); 302 303 304private: 305 TargetMachine &TM; 306 const TargetData &TD; 307 308 /// IsLittleEndian - True if this is a little endian target. 309 /// 310 bool IsLittleEndian; 311 312 /// PointerTy - The type to use for pointers, usually i32 or i64. 313 /// 314 MVT::ValueType PointerTy; 315 316 /// ShiftAmountTy - The type to use for shift amounts, usually i8 or whatever 317 /// PointerTy is. 318 MVT::ValueType ShiftAmountTy; 319 320 OutOfRangeShiftAmount ShiftAmtHandling; 321 322 /// SetCCIsExpensive - This is a short term hack for targets that codegen 323 /// setcc as a conditional branch. This encourages the code generator to fold 324 /// setcc operations into other operations if possible. 325 bool SetCCIsExpensive; 326 327 /// SetCCResultTy - The type that SetCC operations use. This defaults to the 328 /// PointerTy. 329 MVT::ValueType SetCCResultTy; 330 331 /// SetCCResultContents - Information about the contents of the high-bits in 332 /// the result of a setcc comparison operation. 333 SetCCResultValue SetCCResultContents; 334 335 /// RegClassForVT - This indicates the default register class to use for 336 /// each ValueType the target supports natively. 337 TargetRegisterClass *RegClassForVT[MVT::LAST_VALUETYPE]; 338 unsigned char NumElementsForVT[MVT::LAST_VALUETYPE]; 339 340 /// ValueTypeActions - This is a bitvector that contains two bits for each 341 /// value type, where the two bits correspond to the LegalizeAction enum. 342 /// This can be queried with "getTypeAction(VT)". 343 unsigned ValueTypeActions; 344 345 /// TransformToType - For any value types we are promoting or expanding, this 346 /// contains the value type that we are changing to. For Expanded types, this 347 /// contains one step of the expand (e.g. i64 -> i32), even if there are 348 /// multiple steps required (e.g. i64 -> i16). For types natively supported 349 /// by the system, this holds the same type (e.g. i32 -> i32). 350 MVT::ValueType TransformToType[MVT::LAST_VALUETYPE]; 351 352 /// OpActions - For each operation and each value type, keep a LegalizeAction 353 /// that indicates how instruction selection should deal with the operation. 354 /// Most operations are Legal (aka, supported natively by the target), but 355 /// operations that are not should be described. Note that operations on 356 /// non-legal value types are not described here. 357 unsigned OpActions[128]; 358 359 std::vector<double> LegalFPImmediates; 360 361 std::vector<std::pair<MVT::ValueType, 362 TargetRegisterClass*> > AvailableRegClasses; 363}; 364} // end llvm namespace 365 366#endif 367