CriticalAntiDepBreaker.h revision db24dfbbb21b020f6afc49519240a69a34e12ea2 
1//=- llvm/CodeGen/CriticalAntiDepBreaker.h - Anti-Dep Support -*- C++ -*-=//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the CriticalAntiDepBreaker class, which
11// implements register anti-dependence breaking along a blocks
12// critical path during post-RA scheduler.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef LLVM_CODEGEN_CRITICALANTIDEPBREAKER_H
17#define LLVM_CODEGEN_CRITICALANTIDEPBREAKER_H
18
19#include "AntiDepBreaker.h"
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/CodeGen/MachineFrameInfo.h"
22#include "llvm/CodeGen/MachineFunction.h"
23#include "llvm/CodeGen/MachineRegisterInfo.h"
24#include "llvm/CodeGen/ScheduleDAG.h"
25#include "llvm/ADT/BitVector.h"
26#include "llvm/ADT/SmallSet.h"
27#include <map>
28
29namespace llvm {
30class TargetInstrInfo;
31class TargetRegisterInfo;
32
33  class CriticalAntiDepBreaker : public AntiDepBreaker {
34    MachineFunction& MF;
35    MachineRegisterInfo &MRI;
36    const TargetInstrInfo *TII;
37    const TargetRegisterInfo *TRI;
38
39    /// AllocatableSet - The set of allocatable registers.
40    /// We'll be ignoring anti-dependencies on non-allocatable registers,
41    /// because they may not be safe to break.
42    const BitVector AllocatableSet;
43
44    /// Classes - For live regs that are only used in one register class in a
45    /// live range, the register class. If the register is not live, the
46    /// corresponding value is null. If the register is live but used in
47    /// multiple register classes, the corresponding value is -1 casted to a
48    /// pointer.
49    const TargetRegisterClass *
50      Classes[TargetRegisterInfo::FirstVirtualRegister];
51
52    /// RegRegs - Map registers to all their references within a live range.
53    std::multimap<unsigned, MachineOperand *> RegRefs;
54
55    /// KillIndices - The index of the most recent kill (proceding bottom-up),
56    /// or ~0u if the register is not live.
57    unsigned KillIndices[TargetRegisterInfo::FirstVirtualRegister];
58
59    /// DefIndices - The index of the most recent complete def (proceding bottom
60    /// up), or ~0u if the register is live.
61    unsigned DefIndices[TargetRegisterInfo::FirstVirtualRegister];
62
63    /// KeepRegs - A set of registers which are live and cannot be changed to
64    /// break anti-dependencies.
65    SmallSet<unsigned, 4> KeepRegs;
66
67  public:
68    CriticalAntiDepBreaker(MachineFunction& MFi);
69    ~CriticalAntiDepBreaker();
70
71    /// Start - Initialize anti-dep breaking for a new basic block.
72    void StartBlock(MachineBasicBlock *BB);
73
74    /// BreakAntiDependencies - Identifiy anti-dependencies along the critical
75    /// path
76    /// of the ScheduleDAG and break them by renaming registers.
77    ///
78    unsigned BreakAntiDependencies(const std::vector<SUnit>& SUnits,
79                                   MachineBasicBlock::iterator Begin,
80                                   MachineBasicBlock::iterator End,
81                                   unsigned InsertPosIndex);
82
83    /// Observe - Update liveness information to account for the current
84    /// instruction, which will not be scheduled.
85    ///
86    void Observe(MachineInstr *MI, unsigned Count, unsigned InsertPosIndex);
87
88    /// Finish - Finish anti-dep breaking for a basic block.
89    void FinishBlock();
90
91  private:
92    void PrescanInstruction(MachineInstr *MI);
93    void ScanInstruction(MachineInstr *MI, unsigned Count);
94    unsigned findSuitableFreeRegister(MachineInstr *MI,
95                                      unsigned AntiDepReg,
96                                      unsigned LastNewReg,
97                                      const TargetRegisterClass *);
98  };
99}
100
101#endif
102