IfConversion.cpp revision f81b7f6069b27c0a515070dcb392f6828437412f 
1//===-- IfConversion.cpp - Machine code if conversion pass. ---------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the machine instruction level if-conversion pass.
11//
12//===----------------------------------------------------------------------===//
13
14#define DEBUG_TYPE "ifcvt"
15#include "BranchFolding.h"
16#include "llvm/Function.h"
17#include "llvm/CodeGen/Passes.h"
18#include "llvm/CodeGen/MachineModuleInfo.h"
19#include "llvm/CodeGen/MachineFunctionPass.h"
20#include "llvm/CodeGen/MachineLoopInfo.h"
21#include "llvm/MC/MCInstrItineraries.h"
22#include "llvm/Target/TargetInstrInfo.h"
23#include "llvm/Target/TargetLowering.h"
24#include "llvm/Target/TargetMachine.h"
25#include "llvm/Target/TargetRegisterInfo.h"
26#include "llvm/Support/BranchProbability.h"
27#include "llvm/Support/CommandLine.h"
28#include "llvm/Support/Debug.h"
29#include "llvm/Support/ErrorHandling.h"
30#include "llvm/Support/raw_ostream.h"
31#include "llvm/ADT/SmallSet.h"
32#include "llvm/ADT/Statistic.h"
33#include "llvm/ADT/STLExtras.h"
34using namespace llvm;
35
36// Hidden options for help debugging.
37static cl::opt<int> IfCvtFnStart("ifcvt-fn-start", cl::init(-1), cl::Hidden);
38static cl::opt<int> IfCvtFnStop("ifcvt-fn-stop", cl::init(-1), cl::Hidden);
39static cl::opt<int> IfCvtLimit("ifcvt-limit", cl::init(-1), cl::Hidden);
40static cl::opt<bool> DisableSimple("disable-ifcvt-simple",
41                                   cl::init(false), cl::Hidden);
42static cl::opt<bool> DisableSimpleF("disable-ifcvt-simple-false",
43                                    cl::init(false), cl::Hidden);
44static cl::opt<bool> DisableTriangle("disable-ifcvt-triangle",
45                                     cl::init(false), cl::Hidden);
46static cl::opt<bool> DisableTriangleR("disable-ifcvt-triangle-rev",
47                                      cl::init(false), cl::Hidden);
48static cl::opt<bool> DisableTriangleF("disable-ifcvt-triangle-false",
49                                      cl::init(false), cl::Hidden);
50static cl::opt<bool> DisableTriangleFR("disable-ifcvt-triangle-false-rev",
51                                       cl::init(false), cl::Hidden);
52static cl::opt<bool> DisableDiamond("disable-ifcvt-diamond",
53                                    cl::init(false), cl::Hidden);
54static cl::opt<bool> IfCvtBranchFold("ifcvt-branch-fold",
55                                     cl::init(true), cl::Hidden);
56
57STATISTIC(NumSimple,       "Number of simple if-conversions performed");
58STATISTIC(NumSimpleFalse,  "Number of simple (F) if-conversions performed");
59STATISTIC(NumTriangle,     "Number of triangle if-conversions performed");
60STATISTIC(NumTriangleRev,  "Number of triangle (R) if-conversions performed");
61STATISTIC(NumTriangleFalse,"Number of triangle (F) if-conversions performed");
62STATISTIC(NumTriangleFRev, "Number of triangle (F/R) if-conversions performed");
63STATISTIC(NumDiamonds,     "Number of diamond if-conversions performed");
64STATISTIC(NumIfConvBBs,    "Number of if-converted blocks");
65STATISTIC(NumDupBBs,       "Number of duplicated blocks");
66
67namespace {
68  class IfConverter : public MachineFunctionPass {
69    enum IfcvtKind {
70      ICNotClassfied,  // BB data valid, but not classified.
71      ICSimpleFalse,   // Same as ICSimple, but on the false path.
72      ICSimple,        // BB is entry of an one split, no rejoin sub-CFG.
73      ICTriangleFRev,  // Same as ICTriangleFalse, but false path rev condition.
74      ICTriangleRev,   // Same as ICTriangle, but true path rev condition.
75      ICTriangleFalse, // Same as ICTriangle, but on the false path.
76      ICTriangle,      // BB is entry of a triangle sub-CFG.
77      ICDiamond        // BB is entry of a diamond sub-CFG.
78    };
79
80    /// BBInfo - One per MachineBasicBlock, this is used to cache the result
81    /// if-conversion feasibility analysis. This includes results from
82    /// TargetInstrInfo::AnalyzeBranch() (i.e. TBB, FBB, and Cond), and its
83    /// classification, and common tail block of its successors (if it's a
84    /// diamond shape), its size, whether it's predicable, and whether any
85    /// instruction can clobber the 'would-be' predicate.
86    ///
87    /// IsDone          - True if BB is not to be considered for ifcvt.
88    /// IsBeingAnalyzed - True if BB is currently being analyzed.
89    /// IsAnalyzed      - True if BB has been analyzed (info is still valid).
90    /// IsEnqueued      - True if BB has been enqueued to be ifcvt'ed.
91    /// IsBrAnalyzable  - True if AnalyzeBranch() returns false.
92    /// HasFallThrough  - True if BB may fallthrough to the following BB.
93    /// IsUnpredicable  - True if BB is known to be unpredicable.
94    /// ClobbersPred    - True if BB could modify predicates (e.g. has
95    ///                   cmp, call, etc.)
96    /// NonPredSize     - Number of non-predicated instructions.
97    /// ExtraCost       - Extra cost for multi-cycle instructions.
98    /// ExtraCost2      - Some instructions are slower when predicated
99    /// BB              - Corresponding MachineBasicBlock.
100    /// TrueBB / FalseBB- See AnalyzeBranch().
101    /// BrCond          - Conditions for end of block conditional branches.
102    /// Predicate       - Predicate used in the BB.
103    struct BBInfo {
104      bool IsDone          : 1;
105      bool IsBeingAnalyzed : 1;
106      bool IsAnalyzed      : 1;
107      bool IsEnqueued      : 1;
108      bool IsBrAnalyzable  : 1;
109      bool HasFallThrough  : 1;
110      bool IsUnpredicable  : 1;
111      bool CannotBeCopied  : 1;
112      bool ClobbersPred    : 1;
113      unsigned NonPredSize;
114      unsigned ExtraCost;
115      unsigned ExtraCost2;
116      MachineBasicBlock *BB;
117      MachineBasicBlock *TrueBB;
118      MachineBasicBlock *FalseBB;
119      SmallVector<MachineOperand, 4> BrCond;
120      SmallVector<MachineOperand, 4> Predicate;
121      BBInfo() : IsDone(false), IsBeingAnalyzed(false),
122                 IsAnalyzed(false), IsEnqueued(false), IsBrAnalyzable(false),
123                 HasFallThrough(false), IsUnpredicable(false),
124                 CannotBeCopied(false), ClobbersPred(false), NonPredSize(0),
125                 ExtraCost(0), ExtraCost2(0), BB(0), TrueBB(0), FalseBB(0) {}
126    };
127
128    /// IfcvtToken - Record information about pending if-conversions to attempt:
129    /// BBI             - Corresponding BBInfo.
130    /// Kind            - Type of block. See IfcvtKind.
131    /// NeedSubsumption - True if the to-be-predicated BB has already been
132    ///                   predicated.
133    /// NumDups      - Number of instructions that would be duplicated due
134    ///                   to this if-conversion. (For diamonds, the number of
135    ///                   identical instructions at the beginnings of both
136    ///                   paths).
137    /// NumDups2     - For diamonds, the number of identical instructions
138    ///                   at the ends of both paths.
139    struct IfcvtToken {
140      BBInfo &BBI;
141      IfcvtKind Kind;
142      bool NeedSubsumption;
143      unsigned NumDups;
144      unsigned NumDups2;
145      IfcvtToken(BBInfo &b, IfcvtKind k, bool s, unsigned d, unsigned d2 = 0)
146        : BBI(b), Kind(k), NeedSubsumption(s), NumDups(d), NumDups2(d2) {}
147    };
148
149    /// BBAnalysis - Results of if-conversion feasibility analysis indexed by
150    /// basic block number.
151    std::vector<BBInfo> BBAnalysis;
152
153    const TargetLowering *TLI;
154    const TargetInstrInfo *TII;
155    const TargetRegisterInfo *TRI;
156    const InstrItineraryData *InstrItins;
157    const MachineLoopInfo *MLI;
158    bool MadeChange;
159    int FnNum;
160  public:
161    static char ID;
162    IfConverter() : MachineFunctionPass(ID), FnNum(-1) {
163      initializeIfConverterPass(*PassRegistry::getPassRegistry());
164    }
165
166    virtual void getAnalysisUsage(AnalysisUsage &AU) const {
167      AU.addRequired<MachineLoopInfo>();
168      MachineFunctionPass::getAnalysisUsage(AU);
169    }
170
171    virtual bool runOnMachineFunction(MachineFunction &MF);
172    virtual const char *getPassName() const { return "If Converter"; }
173
174  private:
175    bool ReverseBranchCondition(BBInfo &BBI);
176    bool ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
177                     const BranchProbability &Prediction) const;
178    bool ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
179                       bool FalseBranch, unsigned &Dups,
180                       const BranchProbability &Prediction) const;
181    bool ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
182                      unsigned &Dups1, unsigned &Dups2) const;
183    void ScanInstructions(BBInfo &BBI);
184    BBInfo &AnalyzeBlock(MachineBasicBlock *BB,
185                         std::vector<IfcvtToken*> &Tokens);
186    bool FeasibilityAnalysis(BBInfo &BBI, SmallVectorImpl<MachineOperand> &Cond,
187                             bool isTriangle = false, bool RevBranch = false);
188    void AnalyzeBlocks(MachineFunction &MF, std::vector<IfcvtToken*> &Tokens);
189    void InvalidatePreds(MachineBasicBlock *BB);
190    void RemoveExtraEdges(BBInfo &BBI);
191    bool IfConvertSimple(BBInfo &BBI, IfcvtKind Kind);
192    bool IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind);
193    bool IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
194                          unsigned NumDups1, unsigned NumDups2);
195    void PredicateBlock(BBInfo &BBI,
196                        MachineBasicBlock::iterator E,
197                        SmallVectorImpl<MachineOperand> &Cond,
198                        SmallSet<unsigned, 4> &Redefs);
199    void CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
200                               SmallVectorImpl<MachineOperand> &Cond,
201                               SmallSet<unsigned, 4> &Redefs,
202                               bool IgnoreBr = false);
203    void MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges = true);
204
205    bool MeetIfcvtSizeLimit(MachineBasicBlock &BB,
206                            unsigned Cycle, unsigned Extra,
207                            const BranchProbability &Prediction) const {
208      return Cycle > 0 && TII->isProfitableToIfCvt(BB, Cycle, Extra,
209                                                   Prediction);
210    }
211
212    bool MeetIfcvtSizeLimit(MachineBasicBlock &TBB,
213                            unsigned TCycle, unsigned TExtra,
214                            MachineBasicBlock &FBB,
215                            unsigned FCycle, unsigned FExtra,
216                            const BranchProbability &Prediction) const {
217      return TCycle > 0 && FCycle > 0 &&
218        TII->isProfitableToIfCvt(TBB, TCycle, TExtra, FBB, FCycle, FExtra,
219                                 Prediction);
220    }
221
222    // blockAlwaysFallThrough - Block ends without a terminator.
223    bool blockAlwaysFallThrough(BBInfo &BBI) const {
224      return BBI.IsBrAnalyzable && BBI.TrueBB == NULL;
225    }
226
227    // IfcvtTokenCmp - Used to sort if-conversion candidates.
228    static bool IfcvtTokenCmp(IfcvtToken *C1, IfcvtToken *C2) {
229      int Incr1 = (C1->Kind == ICDiamond)
230        ? -(int)(C1->NumDups + C1->NumDups2) : (int)C1->NumDups;
231      int Incr2 = (C2->Kind == ICDiamond)
232        ? -(int)(C2->NumDups + C2->NumDups2) : (int)C2->NumDups;
233      if (Incr1 > Incr2)
234        return true;
235      else if (Incr1 == Incr2) {
236        // Favors subsumption.
237        if (C1->NeedSubsumption == false && C2->NeedSubsumption == true)
238          return true;
239        else if (C1->NeedSubsumption == C2->NeedSubsumption) {
240          // Favors diamond over triangle, etc.
241          if ((unsigned)C1->Kind < (unsigned)C2->Kind)
242            return true;
243          else if (C1->Kind == C2->Kind)
244            return C1->BBI.BB->getNumber() < C2->BBI.BB->getNumber();
245        }
246      }
247      return false;
248    }
249  };
250
251  char IfConverter::ID = 0;
252}
253
254INITIALIZE_PASS_BEGIN(IfConverter, "if-converter", "If Converter", false, false)
255INITIALIZE_PASS_DEPENDENCY(MachineLoopInfo)
256INITIALIZE_PASS_END(IfConverter, "if-converter", "If Converter", false, false)
257
258FunctionPass *llvm::createIfConverterPass() { return new IfConverter(); }
259
260bool IfConverter::runOnMachineFunction(MachineFunction &MF) {
261  TLI = MF.getTarget().getTargetLowering();
262  TII = MF.getTarget().getInstrInfo();
263  TRI = MF.getTarget().getRegisterInfo();
264  MLI = &getAnalysis<MachineLoopInfo>();
265  InstrItins = MF.getTarget().getInstrItineraryData();
266  if (!TII) return false;
267
268  // Tail merge tend to expose more if-conversion opportunities.
269  BranchFolder BF(true, false);
270  bool BFChange = BF.OptimizeFunction(MF, TII,
271                                   MF.getTarget().getRegisterInfo(),
272                                   getAnalysisIfAvailable<MachineModuleInfo>());
273
274  DEBUG(dbgs() << "\nIfcvt: function (" << ++FnNum <<  ") \'"
275               << MF.getFunction()->getName() << "\'");
276
277  if (FnNum < IfCvtFnStart || (IfCvtFnStop != -1 && FnNum > IfCvtFnStop)) {
278    DEBUG(dbgs() << " skipped\n");
279    return false;
280  }
281  DEBUG(dbgs() << "\n");
282
283  MF.RenumberBlocks();
284  BBAnalysis.resize(MF.getNumBlockIDs());
285
286  std::vector<IfcvtToken*> Tokens;
287  MadeChange = false;
288  unsigned NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle +
289    NumTriangleRev + NumTriangleFalse + NumTriangleFRev + NumDiamonds;
290  while (IfCvtLimit == -1 || (int)NumIfCvts < IfCvtLimit) {
291    // Do an initial analysis for each basic block and find all the potential
292    // candidates to perform if-conversion.
293    bool Change = false;
294    AnalyzeBlocks(MF, Tokens);
295    while (!Tokens.empty()) {
296      IfcvtToken *Token = Tokens.back();
297      Tokens.pop_back();
298      BBInfo &BBI = Token->BBI;
299      IfcvtKind Kind = Token->Kind;
300      unsigned NumDups = Token->NumDups;
301      unsigned NumDups2 = Token->NumDups2;
302
303      delete Token;
304
305      // If the block has been evicted out of the queue or it has already been
306      // marked dead (due to it being predicated), then skip it.
307      if (BBI.IsDone)
308        BBI.IsEnqueued = false;
309      if (!BBI.IsEnqueued)
310        continue;
311
312      BBI.IsEnqueued = false;
313
314      bool RetVal = false;
315      switch (Kind) {
316      default: assert(false && "Unexpected!");
317        break;
318      case ICSimple:
319      case ICSimpleFalse: {
320        bool isFalse = Kind == ICSimpleFalse;
321        if ((isFalse && DisableSimpleF) || (!isFalse && DisableSimple)) break;
322        DEBUG(dbgs() << "Ifcvt (Simple" << (Kind == ICSimpleFalse ?
323                                            " false" : "")
324                     << "): BB#" << BBI.BB->getNumber() << " ("
325                     << ((Kind == ICSimpleFalse)
326                         ? BBI.FalseBB->getNumber()
327                         : BBI.TrueBB->getNumber()) << ") ");
328        RetVal = IfConvertSimple(BBI, Kind);
329        DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
330        if (RetVal) {
331          if (isFalse) ++NumSimpleFalse;
332          else         ++NumSimple;
333        }
334       break;
335      }
336      case ICTriangle:
337      case ICTriangleRev:
338      case ICTriangleFalse:
339      case ICTriangleFRev: {
340        bool isFalse = Kind == ICTriangleFalse;
341        bool isRev   = (Kind == ICTriangleRev || Kind == ICTriangleFRev);
342        if (DisableTriangle && !isFalse && !isRev) break;
343        if (DisableTriangleR && !isFalse && isRev) break;
344        if (DisableTriangleF && isFalse && !isRev) break;
345        if (DisableTriangleFR && isFalse && isRev) break;
346        DEBUG(dbgs() << "Ifcvt (Triangle");
347        if (isFalse)
348          DEBUG(dbgs() << " false");
349        if (isRev)
350          DEBUG(dbgs() << " rev");
351        DEBUG(dbgs() << "): BB#" << BBI.BB->getNumber() << " (T:"
352                     << BBI.TrueBB->getNumber() << ",F:"
353                     << BBI.FalseBB->getNumber() << ") ");
354        RetVal = IfConvertTriangle(BBI, Kind);
355        DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
356        if (RetVal) {
357          if (isFalse) {
358            if (isRev) ++NumTriangleFRev;
359            else       ++NumTriangleFalse;
360          } else {
361            if (isRev) ++NumTriangleRev;
362            else       ++NumTriangle;
363          }
364        }
365        break;
366      }
367      case ICDiamond: {
368        if (DisableDiamond) break;
369        DEBUG(dbgs() << "Ifcvt (Diamond): BB#" << BBI.BB->getNumber() << " (T:"
370                     << BBI.TrueBB->getNumber() << ",F:"
371                     << BBI.FalseBB->getNumber() << ") ");
372        RetVal = IfConvertDiamond(BBI, Kind, NumDups, NumDups2);
373        DEBUG(dbgs() << (RetVal ? "succeeded!" : "failed!") << "\n");
374        if (RetVal) ++NumDiamonds;
375        break;
376      }
377      }
378
379      Change |= RetVal;
380
381      NumIfCvts = NumSimple + NumSimpleFalse + NumTriangle + NumTriangleRev +
382        NumTriangleFalse + NumTriangleFRev + NumDiamonds;
383      if (IfCvtLimit != -1 && (int)NumIfCvts >= IfCvtLimit)
384        break;
385    }
386
387    if (!Change)
388      break;
389    MadeChange |= Change;
390  }
391
392  // Delete tokens in case of early exit.
393  while (!Tokens.empty()) {
394    IfcvtToken *Token = Tokens.back();
395    Tokens.pop_back();
396    delete Token;
397  }
398
399  Tokens.clear();
400  BBAnalysis.clear();
401
402  if (MadeChange && IfCvtBranchFold) {
403    BranchFolder BF(false, false);
404    BF.OptimizeFunction(MF, TII,
405                        MF.getTarget().getRegisterInfo(),
406                        getAnalysisIfAvailable<MachineModuleInfo>());
407  }
408
409  MadeChange |= BFChange;
410  return MadeChange;
411}
412
413/// findFalseBlock - BB has a fallthrough. Find its 'false' successor given
414/// its 'true' successor.
415static MachineBasicBlock *findFalseBlock(MachineBasicBlock *BB,
416                                         MachineBasicBlock *TrueBB) {
417  for (MachineBasicBlock::succ_iterator SI = BB->succ_begin(),
418         E = BB->succ_end(); SI != E; ++SI) {
419    MachineBasicBlock *SuccBB = *SI;
420    if (SuccBB != TrueBB)
421      return SuccBB;
422  }
423  return NULL;
424}
425
426/// ReverseBranchCondition - Reverse the condition of the end of the block
427/// branch. Swap block's 'true' and 'false' successors.
428bool IfConverter::ReverseBranchCondition(BBInfo &BBI) {
429  DebugLoc dl;  // FIXME: this is nowhere
430  if (!TII->ReverseBranchCondition(BBI.BrCond)) {
431    TII->RemoveBranch(*BBI.BB);
432    TII->InsertBranch(*BBI.BB, BBI.FalseBB, BBI.TrueBB, BBI.BrCond, dl);
433    std::swap(BBI.TrueBB, BBI.FalseBB);
434    return true;
435  }
436  return false;
437}
438
439/// getNextBlock - Returns the next block in the function blocks ordering. If
440/// it is the end, returns NULL.
441static inline MachineBasicBlock *getNextBlock(MachineBasicBlock *BB) {
442  MachineFunction::iterator I = BB;
443  MachineFunction::iterator E = BB->getParent()->end();
444  if (++I == E)
445    return NULL;
446  return I;
447}
448
449/// ValidSimple - Returns true if the 'true' block (along with its
450/// predecessor) forms a valid simple shape for ifcvt. It also returns the
451/// number of instructions that the ifcvt would need to duplicate if performed
452/// in Dups.
453bool IfConverter::ValidSimple(BBInfo &TrueBBI, unsigned &Dups,
454                              const BranchProbability &Prediction) const {
455  Dups = 0;
456  if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
457    return false;
458
459  if (TrueBBI.IsBrAnalyzable)
460    return false;
461
462  if (TrueBBI.BB->pred_size() > 1) {
463    if (TrueBBI.CannotBeCopied ||
464        !TII->isProfitableToDupForIfCvt(*TrueBBI.BB, TrueBBI.NonPredSize,
465                                        Prediction))
466      return false;
467    Dups = TrueBBI.NonPredSize;
468  }
469
470  return true;
471}
472
473/// ValidTriangle - Returns true if the 'true' and 'false' blocks (along
474/// with their common predecessor) forms a valid triangle shape for ifcvt.
475/// If 'FalseBranch' is true, it checks if 'true' block's false branch
476/// branches to the 'false' block rather than the other way around. It also
477/// returns the number of instructions that the ifcvt would need to duplicate
478/// if performed in 'Dups'.
479bool IfConverter::ValidTriangle(BBInfo &TrueBBI, BBInfo &FalseBBI,
480                                bool FalseBranch, unsigned &Dups,
481                                const BranchProbability &Prediction) const {
482  Dups = 0;
483  if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone)
484    return false;
485
486  if (TrueBBI.BB->pred_size() > 1) {
487    if (TrueBBI.CannotBeCopied)
488      return false;
489
490    unsigned Size = TrueBBI.NonPredSize;
491    if (TrueBBI.IsBrAnalyzable) {
492      if (TrueBBI.TrueBB && TrueBBI.BrCond.empty())
493        // Ends with an unconditional branch. It will be removed.
494        --Size;
495      else {
496        MachineBasicBlock *FExit = FalseBranch
497          ? TrueBBI.TrueBB : TrueBBI.FalseBB;
498        if (FExit)
499          // Require a conditional branch
500          ++Size;
501      }
502    }
503    if (!TII->isProfitableToDupForIfCvt(*TrueBBI.BB, Size, Prediction))
504      return false;
505    Dups = Size;
506  }
507
508  MachineBasicBlock *TExit = FalseBranch ? TrueBBI.FalseBB : TrueBBI.TrueBB;
509  if (!TExit && blockAlwaysFallThrough(TrueBBI)) {
510    MachineFunction::iterator I = TrueBBI.BB;
511    if (++I == TrueBBI.BB->getParent()->end())
512      return false;
513    TExit = I;
514  }
515  return TExit && TExit == FalseBBI.BB;
516}
517
518/// ValidDiamond - Returns true if the 'true' and 'false' blocks (along
519/// with their common predecessor) forms a valid diamond shape for ifcvt.
520bool IfConverter::ValidDiamond(BBInfo &TrueBBI, BBInfo &FalseBBI,
521                               unsigned &Dups1, unsigned &Dups2) const {
522  Dups1 = Dups2 = 0;
523  if (TrueBBI.IsBeingAnalyzed || TrueBBI.IsDone ||
524      FalseBBI.IsBeingAnalyzed || FalseBBI.IsDone)
525    return false;
526
527  MachineBasicBlock *TT = TrueBBI.TrueBB;
528  MachineBasicBlock *FT = FalseBBI.TrueBB;
529
530  if (!TT && blockAlwaysFallThrough(TrueBBI))
531    TT = getNextBlock(TrueBBI.BB);
532  if (!FT && blockAlwaysFallThrough(FalseBBI))
533    FT = getNextBlock(FalseBBI.BB);
534  if (TT != FT)
535    return false;
536  if (TT == NULL && (TrueBBI.IsBrAnalyzable || FalseBBI.IsBrAnalyzable))
537    return false;
538  if  (TrueBBI.BB->pred_size() > 1 || FalseBBI.BB->pred_size() > 1)
539    return false;
540
541  // FIXME: Allow true block to have an early exit?
542  if (TrueBBI.FalseBB || FalseBBI.FalseBB ||
543      (TrueBBI.ClobbersPred && FalseBBI.ClobbersPred))
544    return false;
545
546  // Count duplicate instructions at the beginning of the true and false blocks.
547  MachineBasicBlock::iterator TIB = TrueBBI.BB->begin();
548  MachineBasicBlock::iterator FIB = FalseBBI.BB->begin();
549  MachineBasicBlock::iterator TIE = TrueBBI.BB->end();
550  MachineBasicBlock::iterator FIE = FalseBBI.BB->end();
551  while (TIB != TIE && FIB != FIE) {
552    // Skip dbg_value instructions. These do not count.
553    if (TIB->isDebugValue()) {
554      while (TIB != TIE && TIB->isDebugValue())
555        ++TIB;
556      if (TIB == TIE)
557        break;
558    }
559    if (FIB->isDebugValue()) {
560      while (FIB != FIE && FIB->isDebugValue())
561        ++FIB;
562      if (FIB == FIE)
563        break;
564    }
565    if (!TIB->isIdenticalTo(FIB))
566      break;
567    ++Dups1;
568    ++TIB;
569    ++FIB;
570  }
571
572  // Now, in preparation for counting duplicate instructions at the ends of the
573  // blocks, move the end iterators up past any branch instructions.
574  while (TIE != TIB) {
575    --TIE;
576    if (!TIE->getDesc().isBranch())
577      break;
578  }
579  while (FIE != FIB) {
580    --FIE;
581    if (!FIE->getDesc().isBranch())
582      break;
583  }
584
585  // If Dups1 includes all of a block, then don't count duplicate
586  // instructions at the end of the blocks.
587  if (TIB == TIE || FIB == FIE)
588    return true;
589
590  // Count duplicate instructions at the ends of the blocks.
591  while (TIE != TIB && FIE != FIB) {
592    // Skip dbg_value instructions. These do not count.
593    if (TIE->isDebugValue()) {
594      while (TIE != TIB && TIE->isDebugValue())
595        --TIE;
596      if (TIE == TIB)
597        break;
598    }
599    if (FIE->isDebugValue()) {
600      while (FIE != FIB && FIE->isDebugValue())
601        --FIE;
602      if (FIE == FIB)
603        break;
604    }
605    if (!TIE->isIdenticalTo(FIE))
606      break;
607    ++Dups2;
608    --TIE;
609    --FIE;
610  }
611
612  return true;
613}
614
615/// ScanInstructions - Scan all the instructions in the block to determine if
616/// the block is predicable. In most cases, that means all the instructions
617/// in the block are isPredicable(). Also checks if the block contains any
618/// instruction which can clobber a predicate (e.g. condition code register).
619/// If so, the block is not predicable unless it's the last instruction.
620void IfConverter::ScanInstructions(BBInfo &BBI) {
621  if (BBI.IsDone)
622    return;
623
624  bool AlreadyPredicated = BBI.Predicate.size() > 0;
625  // First analyze the end of BB branches.
626  BBI.TrueBB = BBI.FalseBB = NULL;
627  BBI.BrCond.clear();
628  BBI.IsBrAnalyzable =
629    !TII->AnalyzeBranch(*BBI.BB, BBI.TrueBB, BBI.FalseBB, BBI.BrCond);
630  BBI.HasFallThrough = BBI.IsBrAnalyzable && BBI.FalseBB == NULL;
631
632  if (BBI.BrCond.size()) {
633    // No false branch. This BB must end with a conditional branch and a
634    // fallthrough.
635    if (!BBI.FalseBB)
636      BBI.FalseBB = findFalseBlock(BBI.BB, BBI.TrueBB);
637    if (!BBI.FalseBB) {
638      // Malformed bcc? True and false blocks are the same?
639      BBI.IsUnpredicable = true;
640      return;
641    }
642  }
643
644  // Then scan all the instructions.
645  BBI.NonPredSize = 0;
646  BBI.ExtraCost = 0;
647  BBI.ExtraCost2 = 0;
648  BBI.ClobbersPred = false;
649  for (MachineBasicBlock::iterator I = BBI.BB->begin(), E = BBI.BB->end();
650       I != E; ++I) {
651    if (I->isDebugValue())
652      continue;
653
654    const MCInstrDesc &MCID = I->getDesc();
655    if (MCID.isNotDuplicable())
656      BBI.CannotBeCopied = true;
657
658    bool isPredicated = TII->isPredicated(I);
659    bool isCondBr = BBI.IsBrAnalyzable && MCID.isConditionalBranch();
660
661    if (!isCondBr) {
662      if (!isPredicated) {
663        BBI.NonPredSize++;
664        unsigned ExtraPredCost = 0;
665        unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I,
666                                                  &ExtraPredCost);
667        if (NumCycles > 1)
668          BBI.ExtraCost += NumCycles-1;
669        BBI.ExtraCost2 += ExtraPredCost;
670      } else if (!AlreadyPredicated) {
671        // FIXME: This instruction is already predicated before the
672        // if-conversion pass. It's probably something like a conditional move.
673        // Mark this block unpredicable for now.
674        BBI.IsUnpredicable = true;
675        return;
676      }
677    }
678
679    if (BBI.ClobbersPred && !isPredicated) {
680      // Predicate modification instruction should end the block (except for
681      // already predicated instructions and end of block branches).
682      if (isCondBr) {
683        // A conditional branch is not predicable, but it may be eliminated.
684        continue;
685      }
686
687      // Predicate may have been modified, the subsequent (currently)
688      // unpredicated instructions cannot be correctly predicated.
689      BBI.IsUnpredicable = true;
690      return;
691    }
692
693    // FIXME: Make use of PredDefs? e.g. ADDC, SUBC sets predicates but are
694    // still potentially predicable.
695    std::vector<MachineOperand> PredDefs;
696    if (TII->DefinesPredicate(I, PredDefs))
697      BBI.ClobbersPred = true;
698
699    if (!TII->isPredicable(I)) {
700      BBI.IsUnpredicable = true;
701      return;
702    }
703  }
704}
705
706/// FeasibilityAnalysis - Determine if the block is a suitable candidate to be
707/// predicated by the specified predicate.
708bool IfConverter::FeasibilityAnalysis(BBInfo &BBI,
709                                      SmallVectorImpl<MachineOperand> &Pred,
710                                      bool isTriangle, bool RevBranch) {
711  // If the block is dead or unpredicable, then it cannot be predicated.
712  if (BBI.IsDone || BBI.IsUnpredicable)
713    return false;
714
715  // If it is already predicated, check if its predicate subsumes the new
716  // predicate.
717  if (BBI.Predicate.size() && !TII->SubsumesPredicate(BBI.Predicate, Pred))
718    return false;
719
720  if (BBI.BrCond.size()) {
721    if (!isTriangle)
722      return false;
723
724    // Test predicate subsumption.
725    SmallVector<MachineOperand, 4> RevPred(Pred.begin(), Pred.end());
726    SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
727    if (RevBranch) {
728      if (TII->ReverseBranchCondition(Cond))
729        return false;
730    }
731    if (TII->ReverseBranchCondition(RevPred) ||
732        !TII->SubsumesPredicate(Cond, RevPred))
733      return false;
734  }
735
736  return true;
737}
738
739/// AnalyzeBlock - Analyze the structure of the sub-CFG starting from
740/// the specified block. Record its successors and whether it looks like an
741/// if-conversion candidate.
742IfConverter::BBInfo &IfConverter::AnalyzeBlock(MachineBasicBlock *BB,
743                                             std::vector<IfcvtToken*> &Tokens) {
744  BBInfo &BBI = BBAnalysis[BB->getNumber()];
745
746  if (BBI.IsAnalyzed || BBI.IsBeingAnalyzed)
747    return BBI;
748
749  BBI.BB = BB;
750  BBI.IsBeingAnalyzed = true;
751
752  ScanInstructions(BBI);
753
754  // Unanalyzable or ends with fallthrough or unconditional branch, or if is not
755  // considered for ifcvt anymore.
756  if (!BBI.IsBrAnalyzable || BBI.BrCond.empty() || BBI.IsDone) {
757    BBI.IsBeingAnalyzed = false;
758    BBI.IsAnalyzed = true;
759    return BBI;
760  }
761
762  // Do not ifcvt if either path is a back edge to the entry block.
763  if (BBI.TrueBB == BB || BBI.FalseBB == BB) {
764    BBI.IsBeingAnalyzed = false;
765    BBI.IsAnalyzed = true;
766    return BBI;
767  }
768
769  // Do not ifcvt if true and false fallthrough blocks are the same.
770  if (!BBI.FalseBB) {
771    BBI.IsBeingAnalyzed = false;
772    BBI.IsAnalyzed = true;
773    return BBI;
774  }
775
776  BBInfo &TrueBBI  = AnalyzeBlock(BBI.TrueBB, Tokens);
777  BBInfo &FalseBBI = AnalyzeBlock(BBI.FalseBB, Tokens);
778
779  if (TrueBBI.IsDone && FalseBBI.IsDone) {
780    BBI.IsBeingAnalyzed = false;
781    BBI.IsAnalyzed = true;
782    return BBI;
783  }
784
785  SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
786  bool CanRevCond = !TII->ReverseBranchCondition(RevCond);
787
788  unsigned Dups = 0;
789  unsigned Dups2 = 0;
790  bool TNeedSub = TrueBBI.Predicate.size() > 0;
791  bool FNeedSub = FalseBBI.Predicate.size() > 0;
792  bool Enqueued = false;
793
794  // Try to predict the branch, using loop info to guide us.
795  // General heuristics are:
796  //   - backedge -> 90% taken
797  //   - early exit -> 20% taken
798  //   - branch predictor confidence -> 90%
799  BranchProbability Prediction(5, 10);
800  MachineLoop *Loop = MLI->getLoopFor(BB);
801  if (Loop) {
802    if (TrueBBI.BB == Loop->getHeader())
803      Prediction = BranchProbability(9, 10);
804    else if (FalseBBI.BB == Loop->getHeader())
805      Prediction = BranchProbability(1, 10);
806
807    MachineLoop *TrueLoop = MLI->getLoopFor(TrueBBI.BB);
808    MachineLoop *FalseLoop = MLI->getLoopFor(FalseBBI.BB);
809    if (!TrueLoop || TrueLoop->getParentLoop() == Loop)
810      Prediction = BranchProbability(2, 10);
811    else if (!FalseLoop || FalseLoop->getParentLoop() == Loop)
812      Prediction = BranchProbability(8, 10);
813  }
814
815  if (CanRevCond && ValidDiamond(TrueBBI, FalseBBI, Dups, Dups2) &&
816      MeetIfcvtSizeLimit(*TrueBBI.BB, (TrueBBI.NonPredSize - (Dups + Dups2) +
817                                       TrueBBI.ExtraCost), TrueBBI.ExtraCost2,
818                         *FalseBBI.BB, (FalseBBI.NonPredSize - (Dups + Dups2) +
819                                        FalseBBI.ExtraCost),FalseBBI.ExtraCost2,
820                         Prediction) &&
821      FeasibilityAnalysis(TrueBBI, BBI.BrCond) &&
822      FeasibilityAnalysis(FalseBBI, RevCond)) {
823    // Diamond:
824    //   EBB
825    //   / \_
826    //  |   |
827    // TBB FBB
828    //   \ /
829    //  TailBB
830    // Note TailBB can be empty.
831    Tokens.push_back(new IfcvtToken(BBI, ICDiamond, TNeedSub|FNeedSub, Dups,
832                                    Dups2));
833    Enqueued = true;
834  }
835
836  if (ValidTriangle(TrueBBI, FalseBBI, false, Dups, Prediction) &&
837      MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
838                         TrueBBI.ExtraCost2, Prediction) &&
839      FeasibilityAnalysis(TrueBBI, BBI.BrCond, true)) {
840    // Triangle:
841    //   EBB
842    //   | \_
843    //   |  |
844    //   | TBB
845    //   |  /
846    //   FBB
847    Tokens.push_back(new IfcvtToken(BBI, ICTriangle, TNeedSub, Dups));
848    Enqueued = true;
849  }
850
851  if (ValidTriangle(TrueBBI, FalseBBI, true, Dups, Prediction) &&
852      MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
853                         TrueBBI.ExtraCost2, Prediction) &&
854      FeasibilityAnalysis(TrueBBI, BBI.BrCond, true, true)) {
855    Tokens.push_back(new IfcvtToken(BBI, ICTriangleRev, TNeedSub, Dups));
856    Enqueued = true;
857  }
858
859  if (ValidSimple(TrueBBI, Dups, Prediction) &&
860      MeetIfcvtSizeLimit(*TrueBBI.BB, TrueBBI.NonPredSize + TrueBBI.ExtraCost,
861                         TrueBBI.ExtraCost2, Prediction) &&
862      FeasibilityAnalysis(TrueBBI, BBI.BrCond)) {
863    // Simple (split, no rejoin):
864    //   EBB
865    //   | \_
866    //   |  |
867    //   | TBB---> exit
868    //   |
869    //   FBB
870    Tokens.push_back(new IfcvtToken(BBI, ICSimple, TNeedSub, Dups));
871    Enqueued = true;
872  }
873
874  if (CanRevCond) {
875    // Try the other path...
876    if (ValidTriangle(FalseBBI, TrueBBI, false, Dups,
877                      Prediction.getCompl()) &&
878        MeetIfcvtSizeLimit(*FalseBBI.BB,
879                           FalseBBI.NonPredSize + FalseBBI.ExtraCost,
880                           FalseBBI.ExtraCost2, Prediction.getCompl()) &&
881        FeasibilityAnalysis(FalseBBI, RevCond, true)) {
882      Tokens.push_back(new IfcvtToken(BBI, ICTriangleFalse, FNeedSub, Dups));
883      Enqueued = true;
884    }
885
886    if (ValidTriangle(FalseBBI, TrueBBI, true, Dups,
887                      Prediction.getCompl()) &&
888        MeetIfcvtSizeLimit(*FalseBBI.BB,
889                           FalseBBI.NonPredSize + FalseBBI.ExtraCost,
890                           FalseBBI.ExtraCost2, Prediction.getCompl()) &&
891        FeasibilityAnalysis(FalseBBI, RevCond, true, true)) {
892      Tokens.push_back(new IfcvtToken(BBI, ICTriangleFRev, FNeedSub, Dups));
893      Enqueued = true;
894    }
895
896    if (ValidSimple(FalseBBI, Dups, Prediction.getCompl()) &&
897        MeetIfcvtSizeLimit(*FalseBBI.BB,
898                           FalseBBI.NonPredSize + FalseBBI.ExtraCost,
899                           FalseBBI.ExtraCost2, Prediction.getCompl()) &&
900        FeasibilityAnalysis(FalseBBI, RevCond)) {
901      Tokens.push_back(new IfcvtToken(BBI, ICSimpleFalse, FNeedSub, Dups));
902      Enqueued = true;
903    }
904  }
905
906  BBI.IsEnqueued = Enqueued;
907  BBI.IsBeingAnalyzed = false;
908  BBI.IsAnalyzed = true;
909  return BBI;
910}
911
912/// AnalyzeBlocks - Analyze all blocks and find entries for all if-conversion
913/// candidates.
914void IfConverter::AnalyzeBlocks(MachineFunction &MF,
915                                std::vector<IfcvtToken*> &Tokens) {
916  for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I) {
917    MachineBasicBlock *BB = I;
918    AnalyzeBlock(BB, Tokens);
919  }
920
921  // Sort to favor more complex ifcvt scheme.
922  std::stable_sort(Tokens.begin(), Tokens.end(), IfcvtTokenCmp);
923}
924
925/// canFallThroughTo - Returns true either if ToBB is the next block after BB or
926/// that all the intervening blocks are empty (given BB can fall through to its
927/// next block).
928static bool canFallThroughTo(MachineBasicBlock *BB, MachineBasicBlock *ToBB) {
929  MachineFunction::iterator PI = BB;
930  MachineFunction::iterator I = llvm::next(PI);
931  MachineFunction::iterator TI = ToBB;
932  MachineFunction::iterator E = BB->getParent()->end();
933  while (I != TI) {
934    // Check isSuccessor to avoid case where the next block is empty, but
935    // it's not a successor.
936    if (I == E || !I->empty() || !PI->isSuccessor(I))
937      return false;
938    PI = I++;
939  }
940  return true;
941}
942
943/// InvalidatePreds - Invalidate predecessor BB info so it would be re-analyzed
944/// to determine if it can be if-converted. If predecessor is already enqueued,
945/// dequeue it!
946void IfConverter::InvalidatePreds(MachineBasicBlock *BB) {
947  for (MachineBasicBlock::pred_iterator PI = BB->pred_begin(),
948         E = BB->pred_end(); PI != E; ++PI) {
949    BBInfo &PBBI = BBAnalysis[(*PI)->getNumber()];
950    if (PBBI.IsDone || PBBI.BB == BB)
951      continue;
952    PBBI.IsAnalyzed = false;
953    PBBI.IsEnqueued = false;
954  }
955}
956
957/// InsertUncondBranch - Inserts an unconditional branch from BB to ToBB.
958///
959static void InsertUncondBranch(MachineBasicBlock *BB, MachineBasicBlock *ToBB,
960                               const TargetInstrInfo *TII) {
961  DebugLoc dl;  // FIXME: this is nowhere
962  SmallVector<MachineOperand, 0> NoCond;
963  TII->InsertBranch(*BB, ToBB, NULL, NoCond, dl);
964}
965
966/// RemoveExtraEdges - Remove true / false edges if either / both are no longer
967/// successors.
968void IfConverter::RemoveExtraEdges(BBInfo &BBI) {
969  MachineBasicBlock *TBB = NULL, *FBB = NULL;
970  SmallVector<MachineOperand, 4> Cond;
971  if (!TII->AnalyzeBranch(*BBI.BB, TBB, FBB, Cond))
972    BBI.BB->CorrectExtraCFGEdges(TBB, FBB, !Cond.empty());
973}
974
975/// InitPredRedefs / UpdatePredRedefs - Defs by predicated instructions are
976/// modeled as read + write (sort like two-address instructions). These
977/// routines track register liveness and add implicit uses to if-converted
978/// instructions to conform to the model.
979static void InitPredRedefs(MachineBasicBlock *BB, SmallSet<unsigned,4> &Redefs,
980                           const TargetRegisterInfo *TRI) {
981  for (MachineBasicBlock::livein_iterator I = BB->livein_begin(),
982         E = BB->livein_end(); I != E; ++I) {
983    unsigned Reg = *I;
984    Redefs.insert(Reg);
985    for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
986         *Subreg; ++Subreg)
987      Redefs.insert(*Subreg);
988  }
989}
990
991static void UpdatePredRedefs(MachineInstr *MI, SmallSet<unsigned,4> &Redefs,
992                             const TargetRegisterInfo *TRI,
993                             bool AddImpUse = false) {
994  SmallVector<unsigned, 4> Defs;
995  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
996    const MachineOperand &MO = MI->getOperand(i);
997    if (!MO.isReg())
998      continue;
999    unsigned Reg = MO.getReg();
1000    if (!Reg)
1001      continue;
1002    if (MO.isDef())
1003      Defs.push_back(Reg);
1004    else if (MO.isKill()) {
1005      Redefs.erase(Reg);
1006      for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
1007        Redefs.erase(*SR);
1008    }
1009  }
1010  for (unsigned i = 0, e = Defs.size(); i != e; ++i) {
1011    unsigned Reg = Defs[i];
1012    if (Redefs.count(Reg)) {
1013      if (AddImpUse)
1014        // Treat predicated update as read + write.
1015        MI->addOperand(MachineOperand::CreateReg(Reg, false/*IsDef*/,
1016                                                true/*IsImp*/,false/*IsKill*/));
1017    } else {
1018      Redefs.insert(Reg);
1019      for (const unsigned *SR = TRI->getSubRegisters(Reg); *SR; ++SR)
1020        Redefs.insert(*SR);
1021    }
1022  }
1023}
1024
1025static void UpdatePredRedefs(MachineBasicBlock::iterator I,
1026                             MachineBasicBlock::iterator E,
1027                             SmallSet<unsigned,4> &Redefs,
1028                             const TargetRegisterInfo *TRI) {
1029  while (I != E) {
1030    UpdatePredRedefs(I, Redefs, TRI);
1031    ++I;
1032  }
1033}
1034
1035/// IfConvertSimple - If convert a simple (split, no rejoin) sub-CFG.
1036///
1037bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) {
1038  BBInfo &TrueBBI  = BBAnalysis[BBI.TrueBB->getNumber()];
1039  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1040  BBInfo *CvtBBI = &TrueBBI;
1041  BBInfo *NextBBI = &FalseBBI;
1042
1043  SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1044  if (Kind == ICSimpleFalse)
1045    std::swap(CvtBBI, NextBBI);
1046
1047  if (CvtBBI->IsDone ||
1048      (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1049    // Something has changed. It's no longer safe to predicate this block.
1050    BBI.IsAnalyzed = false;
1051    CvtBBI->IsAnalyzed = false;
1052    return false;
1053  }
1054
1055  if (Kind == ICSimpleFalse)
1056    if (TII->ReverseBranchCondition(Cond))
1057      assert(false && "Unable to reverse branch condition!");
1058
1059  // Initialize liveins to the first BB. These are potentiall redefined by
1060  // predicated instructions.
1061  SmallSet<unsigned, 4> Redefs;
1062  InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1063  InitPredRedefs(NextBBI->BB, Redefs, TRI);
1064
1065  if (CvtBBI->BB->pred_size() > 1) {
1066    BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1067    // Copy instructions in the true block, predicate them, and add them to
1068    // the entry block.
1069    CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs);
1070  } else {
1071    PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1072
1073    // Merge converted block into entry block.
1074    BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1075    MergeBlocks(BBI, *CvtBBI);
1076  }
1077
1078  bool IterIfcvt = true;
1079  if (!canFallThroughTo(BBI.BB, NextBBI->BB)) {
1080    InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1081    BBI.HasFallThrough = false;
1082    // Now ifcvt'd block will look like this:
1083    // BB:
1084    // ...
1085    // t, f = cmp
1086    // if t op
1087    // b BBf
1088    //
1089    // We cannot further ifcvt this block because the unconditional branch
1090    // will have to be predicated on the new condition, that will not be
1091    // available if cmp executes.
1092    IterIfcvt = false;
1093  }
1094
1095  RemoveExtraEdges(BBI);
1096
1097  // Update block info. BB can be iteratively if-converted.
1098  if (!IterIfcvt)
1099    BBI.IsDone = true;
1100  InvalidatePreds(BBI.BB);
1101  CvtBBI->IsDone = true;
1102
1103  // FIXME: Must maintain LiveIns.
1104  return true;
1105}
1106
1107/// IfConvertTriangle - If convert a triangle sub-CFG.
1108///
1109bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) {
1110  BBInfo &TrueBBI = BBAnalysis[BBI.TrueBB->getNumber()];
1111  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1112  BBInfo *CvtBBI = &TrueBBI;
1113  BBInfo *NextBBI = &FalseBBI;
1114  DebugLoc dl;  // FIXME: this is nowhere
1115
1116  SmallVector<MachineOperand, 4> Cond(BBI.BrCond.begin(), BBI.BrCond.end());
1117  if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1118    std::swap(CvtBBI, NextBBI);
1119
1120  if (CvtBBI->IsDone ||
1121      (CvtBBI->CannotBeCopied && CvtBBI->BB->pred_size() > 1)) {
1122    // Something has changed. It's no longer safe to predicate this block.
1123    BBI.IsAnalyzed = false;
1124    CvtBBI->IsAnalyzed = false;
1125    return false;
1126  }
1127
1128  if (Kind == ICTriangleFalse || Kind == ICTriangleFRev)
1129    if (TII->ReverseBranchCondition(Cond))
1130      assert(false && "Unable to reverse branch condition!");
1131
1132  if (Kind == ICTriangleRev || Kind == ICTriangleFRev) {
1133    if (ReverseBranchCondition(*CvtBBI)) {
1134      // BB has been changed, modify its predecessors (except for this
1135      // one) so they don't get ifcvt'ed based on bad intel.
1136      for (MachineBasicBlock::pred_iterator PI = CvtBBI->BB->pred_begin(),
1137             E = CvtBBI->BB->pred_end(); PI != E; ++PI) {
1138        MachineBasicBlock *PBB = *PI;
1139        if (PBB == BBI.BB)
1140          continue;
1141        BBInfo &PBBI = BBAnalysis[PBB->getNumber()];
1142        if (PBBI.IsEnqueued) {
1143          PBBI.IsAnalyzed = false;
1144          PBBI.IsEnqueued = false;
1145        }
1146      }
1147    }
1148  }
1149
1150  // Initialize liveins to the first BB. These are potentially redefined by
1151  // predicated instructions.
1152  SmallSet<unsigned, 4> Redefs;
1153  InitPredRedefs(CvtBBI->BB, Redefs, TRI);
1154  InitPredRedefs(NextBBI->BB, Redefs, TRI);
1155
1156  bool HasEarlyExit = CvtBBI->FalseBB != NULL;
1157  if (CvtBBI->BB->pred_size() > 1) {
1158    BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1159    // Copy instructions in the true block, predicate them, and add them to
1160    // the entry block.
1161    CopyAndPredicateBlock(BBI, *CvtBBI, Cond, Redefs, true);
1162  } else {
1163    // Predicate the 'true' block after removing its branch.
1164    CvtBBI->NonPredSize -= TII->RemoveBranch(*CvtBBI->BB);
1165    PredicateBlock(*CvtBBI, CvtBBI->BB->end(), Cond, Redefs);
1166
1167    // Now merge the entry of the triangle with the true block.
1168    BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1169    MergeBlocks(BBI, *CvtBBI, false);
1170  }
1171
1172  // If 'true' block has a 'false' successor, add an exit branch to it.
1173  if (HasEarlyExit) {
1174    SmallVector<MachineOperand, 4> RevCond(CvtBBI->BrCond.begin(),
1175                                           CvtBBI->BrCond.end());
1176    if (TII->ReverseBranchCondition(RevCond))
1177      assert(false && "Unable to reverse branch condition!");
1178    TII->InsertBranch(*BBI.BB, CvtBBI->FalseBB, NULL, RevCond, dl);
1179    BBI.BB->addSuccessor(CvtBBI->FalseBB);
1180  }
1181
1182  // Merge in the 'false' block if the 'false' block has no other
1183  // predecessors. Otherwise, add an unconditional branch to 'false'.
1184  bool FalseBBDead = false;
1185  bool IterIfcvt = true;
1186  bool isFallThrough = canFallThroughTo(BBI.BB, NextBBI->BB);
1187  if (!isFallThrough) {
1188    // Only merge them if the true block does not fallthrough to the false
1189    // block. By not merging them, we make it possible to iteratively
1190    // ifcvt the blocks.
1191    if (!HasEarlyExit &&
1192        NextBBI->BB->pred_size() == 1 && !NextBBI->HasFallThrough) {
1193      MergeBlocks(BBI, *NextBBI);
1194      FalseBBDead = true;
1195    } else {
1196      InsertUncondBranch(BBI.BB, NextBBI->BB, TII);
1197      BBI.HasFallThrough = false;
1198    }
1199    // Mixed predicated and unpredicated code. This cannot be iteratively
1200    // predicated.
1201    IterIfcvt = false;
1202  }
1203
1204  RemoveExtraEdges(BBI);
1205
1206  // Update block info. BB can be iteratively if-converted.
1207  if (!IterIfcvt)
1208    BBI.IsDone = true;
1209  InvalidatePreds(BBI.BB);
1210  CvtBBI->IsDone = true;
1211  if (FalseBBDead)
1212    NextBBI->IsDone = true;
1213
1214  // FIXME: Must maintain LiveIns.
1215  return true;
1216}
1217
1218/// IfConvertDiamond - If convert a diamond sub-CFG.
1219///
1220bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind,
1221                                   unsigned NumDups1, unsigned NumDups2) {
1222  BBInfo &TrueBBI  = BBAnalysis[BBI.TrueBB->getNumber()];
1223  BBInfo &FalseBBI = BBAnalysis[BBI.FalseBB->getNumber()];
1224  MachineBasicBlock *TailBB = TrueBBI.TrueBB;
1225  // True block must fall through or end with an unanalyzable terminator.
1226  if (!TailBB) {
1227    if (blockAlwaysFallThrough(TrueBBI))
1228      TailBB = FalseBBI.TrueBB;
1229    assert((TailBB || !TrueBBI.IsBrAnalyzable) && "Unexpected!");
1230  }
1231
1232  if (TrueBBI.IsDone || FalseBBI.IsDone ||
1233      TrueBBI.BB->pred_size() > 1 ||
1234      FalseBBI.BB->pred_size() > 1) {
1235    // Something has changed. It's no longer safe to predicate these blocks.
1236    BBI.IsAnalyzed = false;
1237    TrueBBI.IsAnalyzed = false;
1238    FalseBBI.IsAnalyzed = false;
1239    return false;
1240  }
1241
1242  // Put the predicated instructions from the 'true' block before the
1243  // instructions from the 'false' block, unless the true block would clobber
1244  // the predicate, in which case, do the opposite.
1245  BBInfo *BBI1 = &TrueBBI;
1246  BBInfo *BBI2 = &FalseBBI;
1247  SmallVector<MachineOperand, 4> RevCond(BBI.BrCond.begin(), BBI.BrCond.end());
1248  if (TII->ReverseBranchCondition(RevCond))
1249    assert(false && "Unable to reverse branch condition!");
1250  SmallVector<MachineOperand, 4> *Cond1 = &BBI.BrCond;
1251  SmallVector<MachineOperand, 4> *Cond2 = &RevCond;
1252
1253  // Figure out the more profitable ordering.
1254  bool DoSwap = false;
1255  if (TrueBBI.ClobbersPred && !FalseBBI.ClobbersPred)
1256    DoSwap = true;
1257  else if (TrueBBI.ClobbersPred == FalseBBI.ClobbersPred) {
1258    if (TrueBBI.NonPredSize > FalseBBI.NonPredSize)
1259      DoSwap = true;
1260  }
1261  if (DoSwap) {
1262    std::swap(BBI1, BBI2);
1263    std::swap(Cond1, Cond2);
1264  }
1265
1266  // Remove the conditional branch from entry to the blocks.
1267  BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB);
1268
1269  // Initialize liveins to the first BB. These are potentially redefined by
1270  // predicated instructions.
1271  SmallSet<unsigned, 4> Redefs;
1272  InitPredRedefs(BBI1->BB, Redefs, TRI);
1273
1274  // Remove the duplicated instructions at the beginnings of both paths.
1275  MachineBasicBlock::iterator DI1 = BBI1->BB->begin();
1276  MachineBasicBlock::iterator DI2 = BBI2->BB->begin();
1277  MachineBasicBlock::iterator DIE1 = BBI1->BB->end();
1278  MachineBasicBlock::iterator DIE2 = BBI2->BB->end();
1279  // Skip dbg_value instructions
1280  while (DI1 != DIE1 && DI1->isDebugValue())
1281    ++DI1;
1282  while (DI2 != DIE2 && DI2->isDebugValue())
1283    ++DI2;
1284  BBI1->NonPredSize -= NumDups1;
1285  BBI2->NonPredSize -= NumDups1;
1286
1287  // Skip past the dups on each side separately since there may be
1288  // differing dbg_value entries.
1289  for (unsigned i = 0; i < NumDups1; ++DI1) {
1290    if (!DI1->isDebugValue())
1291      ++i;
1292  }
1293  while (NumDups1 != 0) {
1294    ++DI2;
1295    if (!DI2->isDebugValue())
1296      --NumDups1;
1297  }
1298
1299  UpdatePredRedefs(BBI1->BB->begin(), DI1, Redefs, TRI);
1300  BBI.BB->splice(BBI.BB->end(), BBI1->BB, BBI1->BB->begin(), DI1);
1301  BBI2->BB->erase(BBI2->BB->begin(), DI2);
1302
1303  // Predicate the 'true' block after removing its branch.
1304  BBI1->NonPredSize -= TII->RemoveBranch(*BBI1->BB);
1305  DI1 = BBI1->BB->end();
1306  for (unsigned i = 0; i != NumDups2; ) {
1307    // NumDups2 only counted non-dbg_value instructions, so this won't
1308    // run off the head of the list.
1309    assert (DI1 != BBI1->BB->begin());
1310    --DI1;
1311    // skip dbg_value instructions
1312    if (!DI1->isDebugValue())
1313      ++i;
1314  }
1315  BBI1->BB->erase(DI1, BBI1->BB->end());
1316  PredicateBlock(*BBI1, BBI1->BB->end(), *Cond1, Redefs);
1317
1318  // Predicate the 'false' block.
1319  BBI2->NonPredSize -= TII->RemoveBranch(*BBI2->BB);
1320  DI2 = BBI2->BB->end();
1321  while (NumDups2 != 0) {
1322    // NumDups2 only counted non-dbg_value instructions, so this won't
1323    // run off the head of the list.
1324    assert (DI2 != BBI2->BB->begin());
1325    --DI2;
1326    // skip dbg_value instructions
1327    if (!DI2->isDebugValue())
1328      --NumDups2;
1329  }
1330  PredicateBlock(*BBI2, DI2, *Cond2, Redefs);
1331
1332  // Merge the true block into the entry of the diamond.
1333  MergeBlocks(BBI, *BBI1, TailBB == 0);
1334  MergeBlocks(BBI, *BBI2, TailBB == 0);
1335
1336  // If the if-converted block falls through or unconditionally branches into
1337  // the tail block, and the tail block does not have other predecessors, then
1338  // fold the tail block in as well. Otherwise, unless it falls through to the
1339  // tail, add a unconditional branch to it.
1340  if (TailBB) {
1341    BBInfo TailBBI = BBAnalysis[TailBB->getNumber()];
1342    bool CanMergeTail = !TailBBI.HasFallThrough;
1343    // There may still be a fall-through edge from BBI1 or BBI2 to TailBB;
1344    // check if there are any other predecessors besides those.
1345    unsigned NumPreds = TailBB->pred_size();
1346    if (NumPreds > 1)
1347      CanMergeTail = false;
1348    else if (NumPreds == 1 && CanMergeTail) {
1349      MachineBasicBlock::pred_iterator PI = TailBB->pred_begin();
1350      if (*PI != BBI1->BB && *PI != BBI2->BB)
1351        CanMergeTail = false;
1352    }
1353    if (CanMergeTail) {
1354      MergeBlocks(BBI, TailBBI);
1355      TailBBI.IsDone = true;
1356    } else {
1357      BBI.BB->addSuccessor(TailBB);
1358      InsertUncondBranch(BBI.BB, TailBB, TII);
1359      BBI.HasFallThrough = false;
1360    }
1361  }
1362
1363  // RemoveExtraEdges won't work if the block has an unanalyzable branch,
1364  // which can happen here if TailBB is unanalyzable and is merged, so
1365  // explicitly remove BBI1 and BBI2 as successors.
1366  BBI.BB->removeSuccessor(BBI1->BB);
1367  BBI.BB->removeSuccessor(BBI2->BB);
1368  RemoveExtraEdges(BBI);
1369
1370  // Update block info.
1371  BBI.IsDone = TrueBBI.IsDone = FalseBBI.IsDone = true;
1372  InvalidatePreds(BBI.BB);
1373
1374  // FIXME: Must maintain LiveIns.
1375  return true;
1376}
1377
1378/// PredicateBlock - Predicate instructions from the start of the block to the
1379/// specified end with the specified condition.
1380void IfConverter::PredicateBlock(BBInfo &BBI,
1381                                 MachineBasicBlock::iterator E,
1382                                 SmallVectorImpl<MachineOperand> &Cond,
1383                                 SmallSet<unsigned, 4> &Redefs) {
1384  for (MachineBasicBlock::iterator I = BBI.BB->begin(); I != E; ++I) {
1385    if (I->isDebugValue() || TII->isPredicated(I))
1386      continue;
1387    if (!TII->PredicateInstruction(I, Cond)) {
1388#ifndef NDEBUG
1389      dbgs() << "Unable to predicate " << *I << "!\n";
1390#endif
1391      llvm_unreachable(0);
1392    }
1393
1394    // If the predicated instruction now redefines a register as the result of
1395    // if-conversion, add an implicit kill.
1396    UpdatePredRedefs(I, Redefs, TRI, true);
1397  }
1398
1399  std::copy(Cond.begin(), Cond.end(), std::back_inserter(BBI.Predicate));
1400
1401  BBI.IsAnalyzed = false;
1402  BBI.NonPredSize = 0;
1403
1404  ++NumIfConvBBs;
1405}
1406
1407/// CopyAndPredicateBlock - Copy and predicate instructions from source BB to
1408/// the destination block. Skip end of block branches if IgnoreBr is true.
1409void IfConverter::CopyAndPredicateBlock(BBInfo &ToBBI, BBInfo &FromBBI,
1410                                        SmallVectorImpl<MachineOperand> &Cond,
1411                                        SmallSet<unsigned, 4> &Redefs,
1412                                        bool IgnoreBr) {
1413  MachineFunction &MF = *ToBBI.BB->getParent();
1414
1415  for (MachineBasicBlock::iterator I = FromBBI.BB->begin(),
1416         E = FromBBI.BB->end(); I != E; ++I) {
1417    const MCInstrDesc &MCID = I->getDesc();
1418    // Do not copy the end of the block branches.
1419    if (IgnoreBr && MCID.isBranch())
1420      break;
1421
1422    MachineInstr *MI = MF.CloneMachineInstr(I);
1423    ToBBI.BB->insert(ToBBI.BB->end(), MI);
1424    ToBBI.NonPredSize++;
1425    unsigned ExtraPredCost = 0;
1426    unsigned NumCycles = TII->getInstrLatency(InstrItins, &*I, &ExtraPredCost);
1427    if (NumCycles > 1)
1428      ToBBI.ExtraCost += NumCycles-1;
1429    ToBBI.ExtraCost2 += ExtraPredCost;
1430
1431    if (!TII->isPredicated(I) && !MI->isDebugValue()) {
1432      if (!TII->PredicateInstruction(MI, Cond)) {
1433#ifndef NDEBUG
1434        dbgs() << "Unable to predicate " << *I << "!\n";
1435#endif
1436        llvm_unreachable(0);
1437      }
1438    }
1439
1440    // If the predicated instruction now redefines a register as the result of
1441    // if-conversion, add an implicit kill.
1442    UpdatePredRedefs(MI, Redefs, TRI, true);
1443  }
1444
1445  if (!IgnoreBr) {
1446    std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1447                                           FromBBI.BB->succ_end());
1448    MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1449    MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1450
1451    for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1452      MachineBasicBlock *Succ = Succs[i];
1453      // Fallthrough edge can't be transferred.
1454      if (Succ == FallThrough)
1455        continue;
1456      ToBBI.BB->addSuccessor(Succ);
1457    }
1458  }
1459
1460  std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1461            std::back_inserter(ToBBI.Predicate));
1462  std::copy(Cond.begin(), Cond.end(), std::back_inserter(ToBBI.Predicate));
1463
1464  ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1465  ToBBI.IsAnalyzed = false;
1466
1467  ++NumDupBBs;
1468}
1469
1470/// MergeBlocks - Move all instructions from FromBB to the end of ToBB.
1471/// This will leave FromBB as an empty block, so remove all of its
1472/// successor edges except for the fall-through edge.  If AddEdges is true,
1473/// i.e., when FromBBI's branch is being moved, add those successor edges to
1474/// ToBBI.
1475void IfConverter::MergeBlocks(BBInfo &ToBBI, BBInfo &FromBBI, bool AddEdges) {
1476  ToBBI.BB->splice(ToBBI.BB->end(),
1477                   FromBBI.BB, FromBBI.BB->begin(), FromBBI.BB->end());
1478
1479  std::vector<MachineBasicBlock *> Succs(FromBBI.BB->succ_begin(),
1480                                         FromBBI.BB->succ_end());
1481  MachineBasicBlock *NBB = getNextBlock(FromBBI.BB);
1482  MachineBasicBlock *FallThrough = FromBBI.HasFallThrough ? NBB : NULL;
1483
1484  for (unsigned i = 0, e = Succs.size(); i != e; ++i) {
1485    MachineBasicBlock *Succ = Succs[i];
1486    // Fallthrough edge can't be transferred.
1487    if (Succ == FallThrough)
1488      continue;
1489    FromBBI.BB->removeSuccessor(Succ);
1490    if (AddEdges)
1491      ToBBI.BB->addSuccessor(Succ);
1492  }
1493
1494  // Now FromBBI always falls through to the next block!
1495  if (NBB && !FromBBI.BB->isSuccessor(NBB))
1496    FromBBI.BB->addSuccessor(NBB);
1497
1498  std::copy(FromBBI.Predicate.begin(), FromBBI.Predicate.end(),
1499            std::back_inserter(ToBBI.Predicate));
1500  FromBBI.Predicate.clear();
1501
1502  ToBBI.NonPredSize += FromBBI.NonPredSize;
1503  ToBBI.ExtraCost += FromBBI.ExtraCost;
1504  ToBBI.ExtraCost2 += FromBBI.ExtraCost2;
1505  FromBBI.NonPredSize = 0;
1506  FromBBI.ExtraCost = 0;
1507  FromBBI.ExtraCost2 = 0;
1508
1509  ToBBI.ClobbersPred |= FromBBI.ClobbersPred;
1510  ToBBI.HasFallThrough = FromBBI.HasFallThrough;
1511  ToBBI.IsAnalyzed = false;
1512  FromBBI.IsAnalyzed = false;
1513}
1514