LLVMTargetMachine.cpp revision 0f940c95d4506f8d04fa2aeda8a79cadb3105fe3 
1//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by Chris Lattner and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the LLVMTargetMachine class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/Target/TargetMachine.h"
15#include "llvm/PassManager.h"
16#include "llvm/Pass.h"
17#include "llvm/Assembly/PrintModulePass.h"
18#include "llvm/Analysis/LoopPass.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/Target/TargetOptions.h"
21#include "llvm/Transforms/Scalar.h"
22#include "llvm/Support/CommandLine.h"
23using namespace llvm;
24
25static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
26    cl::desc("Print LLVM IR produced by the loop-reduce pass"));
27static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
28    cl::desc("Print LLVM IR input to isel pass"));
29static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
30    cl::desc("Dump emitter generated instructions as assembly"));
31
32FileModel::Model
33LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
34                                       std::ostream &Out,
35                                       CodeGenFileType FileType,
36                                       bool Fast) {
37  // Standard LLVM-Level Passes.
38
39  // Run loop strength reduction before anything else.
40  if (!Fast) {
41    PM.add(createLoopStrengthReducePass(getTargetLowering()));
42    if (PrintLSR)
43      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
44  }
45
46  // FIXME: Implement efficient support for garbage collection intrinsics.
47  PM.add(createLowerGCPass());
48
49  if (!ExceptionHandling)
50    PM.add(createLowerInvokePass(getTargetLowering()));
51
52  // Make sure that no unreachable blocks are instruction selected.
53  PM.add(createUnreachableBlockEliminationPass());
54
55  if (!Fast)
56    PM.add(createCodeGenPreparePass(getTargetLowering()));
57
58  if (PrintISelInput)
59    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
60                                 &cerr));
61
62  // Ask the target for an isel.
63  if (addInstSelector(PM, Fast))
64    return FileModel::Error;
65
66  // Print the instruction selected machine code...
67  if (PrintMachineCode)
68    PM.add(createMachineFunctionPrinterPass(cerr));
69
70  PM.add(createMachineLICMPass());
71
72  // Perform register allocation to convert to a concrete x86 representation
73  PM.add(createRegisterAllocator());
74
75  if (PrintMachineCode)
76    PM.add(createMachineFunctionPrinterPass(cerr));
77
78  PM.add(createLowerSubregsPass());
79
80  if (PrintMachineCode)  // Print the subreg lowered code
81    PM.add(createMachineFunctionPrinterPass(cerr));
82
83  // Run post-ra passes.
84  if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
85    PM.add(createMachineFunctionPrinterPass(cerr));
86
87  // Insert prolog/epilog code.  Eliminate abstract frame index references...
88  PM.add(createPrologEpilogCodeInserter());
89
90  // Second pass scheduler.
91  if (!Fast)
92    PM.add(createPostRAScheduler());
93
94  // Branch folding must be run after regalloc and prolog/epilog insertion.
95  if (!Fast)
96    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
97
98  // Fold redundant debug labels.
99  PM.add(createDebugLabelFoldingPass());
100
101  if (PrintMachineCode)  // Print the register-allocated code
102    PM.add(createMachineFunctionPrinterPass(cerr));
103
104  if (addPreEmitPass(PM, Fast) && PrintMachineCode)
105    PM.add(createMachineFunctionPrinterPass(cerr));
106
107  switch (FileType) {
108  default:
109    break;
110  case TargetMachine::AssemblyFile:
111    if (addAssemblyEmitter(PM, Fast, Out))
112      return FileModel::Error;
113    return FileModel::AsmFile;
114  case TargetMachine::ObjectFile:
115    if (getMachOWriterInfo())
116      return FileModel::MachOFile;
117    else if (getELFWriterInfo())
118      return FileModel::ElfFile;
119  }
120
121  return FileModel::Error;
122}
123
124/// addPassesToEmitFileFinish - If the passes to emit the specified file had to
125/// be split up (e.g., to add an object writer pass), this method can be used to
126/// finish up adding passes to emit the file, if necessary.
127bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
128                                                  MachineCodeEmitter *MCE,
129                                                  bool Fast) {
130  if (MCE)
131    addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
132
133  // Delete machine code for this function
134  PM.add(createMachineCodeDeleter());
135
136  return false; // success!
137}
138
139/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
140/// get machine code emitted.  This uses a MachineCodeEmitter object to handle
141/// actually outputting the machine code and resolving things like the address
142/// of functions.  This method should returns true if machine code emission is
143/// not supported.
144///
145bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
146                                                   MachineCodeEmitter &MCE,
147                                                   bool Fast) {
148  // Standard LLVM-Level Passes.
149
150  // Run loop strength reduction before anything else.
151  if (!Fast) {
152    PM.add(createLoopStrengthReducePass(getTargetLowering()));
153    if (PrintLSR)
154      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
155  }
156
157  // FIXME: Implement efficient support for garbage collection intrinsics.
158  PM.add(createLowerGCPass());
159
160  // FIXME: Implement the invoke/unwind instructions!
161  PM.add(createLowerInvokePass(getTargetLowering()));
162
163  // Make sure that no unreachable blocks are instruction selected.
164  PM.add(createUnreachableBlockEliminationPass());
165
166  if (!Fast)
167    PM.add(createCodeGenPreparePass(getTargetLowering()));
168
169  if (PrintISelInput)
170    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
171                                 &cerr));
172
173  // Ask the target for an isel.
174  if (addInstSelector(PM, Fast))
175    return true;
176
177  // Print the instruction selected machine code...
178  if (PrintMachineCode)
179    PM.add(createMachineFunctionPrinterPass(cerr));
180
181  PM.add(createMachineLICMPass());
182
183  // Perform register allocation to convert to a concrete x86 representation
184  PM.add(createRegisterAllocator());
185
186  if (PrintMachineCode)
187    PM.add(createMachineFunctionPrinterPass(cerr));
188
189  PM.add(createLowerSubregsPass());
190
191  if (PrintMachineCode)  // Print the subreg lowered code
192    PM.add(createMachineFunctionPrinterPass(cerr));
193
194  // Run post-ra passes.
195  if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
196    PM.add(createMachineFunctionPrinterPass(cerr));
197
198  // Insert prolog/epilog code.  Eliminate abstract frame index references...
199  PM.add(createPrologEpilogCodeInserter());
200
201  if (PrintMachineCode)  // Print the register-allocated code
202    PM.add(createMachineFunctionPrinterPass(cerr));
203
204  // Second pass scheduler.
205  if (!Fast)
206    PM.add(createPostRAScheduler());
207
208  // Branch folding must be run after regalloc and prolog/epilog insertion.
209  if (!Fast)
210    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
211
212  if (addPreEmitPass(PM, Fast) && PrintMachineCode)
213    PM.add(createMachineFunctionPrinterPass(cerr));
214
215  addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
216
217  // Delete machine code for this function
218  PM.add(createMachineCodeDeleter());
219
220  return false; // success!
221}
222