LLVMTargetMachine.cpp revision 10a95baae33a8b37820bf3bb73046769daff6ee6 
1//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by Chris Lattner and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the LLVMTargetMachine class.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/Target/TargetMachine.h"
15#include "llvm/PassManager.h"
16#include "llvm/Pass.h"
17#include "llvm/Assembly/PrintModulePass.h"
18#include "llvm/Analysis/LoopPass.h"
19#include "llvm/CodeGen/Passes.h"
20#include "llvm/Target/TargetOptions.h"
21#include "llvm/Transforms/Scalar.h"
22#include "llvm/Support/CommandLine.h"
23using namespace llvm;
24
25static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden,
26    cl::desc("Print LLVM IR produced by the loop-reduce pass"));
27static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden,
28    cl::desc("Print LLVM IR input to isel pass"));
29static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden,
30    cl::desc("Dump emitter generated instructions as assembly"));
31
32FileModel::Model
33LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM,
34                                       std::ostream &Out,
35                                       CodeGenFileType FileType,
36                                       bool Fast) {
37  // Standard LLVM-Level Passes.
38
39  // Run loop strength reduction before anything else.
40  if (!Fast) {
41    PM.add(createLoopStrengthReducePass(getTargetLowering()));
42    if (PrintLSR)
43      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
44  }
45
46  // FIXME: Implement efficient support for garbage collection intrinsics.
47  PM.add(createLowerGCPass());
48
49  if (!ExceptionHandling)
50    PM.add(createLowerInvokePass(getTargetLowering()));
51
52  // Make sure that no unreachable blocks are instruction selected.
53  PM.add(createUnreachableBlockEliminationPass());
54
55  if (!Fast)
56    PM.add(createCodeGenPreparePass(getTargetLowering()));
57
58  if (PrintISelInput)
59    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
60                                 &cerr));
61
62  // Ask the target for an isel.
63  if (addInstSelector(PM, Fast))
64    return FileModel::Error;
65
66  // Print the instruction selected machine code...
67  if (PrintMachineCode)
68    PM.add(createMachineFunctionPrinterPass(cerr));
69
70  // Perform register allocation to convert to a concrete x86 representation
71  PM.add(createRegisterAllocator());
72
73  if (PrintMachineCode)
74    PM.add(createMachineFunctionPrinterPass(cerr));
75
76  // Run post-ra passes.
77  if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
78    PM.add(createMachineFunctionPrinterPass(cerr));
79
80  // Insert prolog/epilog code.  Eliminate abstract frame index references...
81  PM.add(createPrologEpilogCodeInserter());
82
83  // Second pass scheduler.
84  if (!Fast)
85    PM.add(createPostRAScheduler());
86
87  // Branch folding must be run after regalloc and prolog/epilog insertion.
88  if (!Fast)
89    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
90
91  // Fold redundant debug labels.
92  PM.add(createDebugLabelFoldingPass());
93
94  if (PrintMachineCode)  // Print the register-allocated code
95    PM.add(createMachineFunctionPrinterPass(cerr));
96
97  if (addPreEmitPass(PM, Fast) && PrintMachineCode)
98    PM.add(createMachineFunctionPrinterPass(cerr));
99
100  PM.add(createLowerSubregsPass());
101
102  switch (FileType) {
103  default:
104    break;
105  case TargetMachine::AssemblyFile:
106    if (addAssemblyEmitter(PM, Fast, Out))
107      return FileModel::Error;
108    return FileModel::AsmFile;
109  case TargetMachine::ObjectFile:
110    if (getMachOWriterInfo())
111      return FileModel::MachOFile;
112    else if (getELFWriterInfo())
113      return FileModel::ElfFile;
114  }
115
116  return FileModel::Error;
117}
118
119/// addPassesToEmitFileFinish - If the passes to emit the specified file had to
120/// be split up (e.g., to add an object writer pass), this method can be used to
121/// finish up adding passes to emit the file, if necessary.
122bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM,
123                                                  MachineCodeEmitter *MCE,
124                                                  bool Fast) {
125  if (MCE)
126    addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE);
127
128  // Delete machine code for this function
129  PM.add(createMachineCodeDeleter());
130
131  return false; // success!
132}
133
134/// addPassesToEmitMachineCode - Add passes to the specified pass manager to
135/// get machine code emitted.  This uses a MachineCodeEmitter object to handle
136/// actually outputting the machine code and resolving things like the address
137/// of functions.  This method should returns true if machine code emission is
138/// not supported.
139///
140bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM,
141                                                   MachineCodeEmitter &MCE,
142                                                   bool Fast) {
143  // Standard LLVM-Level Passes.
144
145  // Run loop strength reduction before anything else.
146  if (!Fast) {
147    PM.add(createLoopStrengthReducePass(getTargetLowering()));
148    if (PrintLSR)
149      PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr));
150  }
151
152  // FIXME: Implement efficient support for garbage collection intrinsics.
153  PM.add(createLowerGCPass());
154
155  // FIXME: Implement the invoke/unwind instructions!
156  PM.add(createLowerInvokePass(getTargetLowering()));
157
158  // Make sure that no unreachable blocks are instruction selected.
159  PM.add(createUnreachableBlockEliminationPass());
160
161  if (!Fast)
162    PM.add(createCodeGenPreparePass(getTargetLowering()));
163
164  if (PrintISelInput)
165    PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n",
166                                 &cerr));
167
168  // Ask the target for an isel.
169  if (addInstSelector(PM, Fast))
170    return true;
171
172  // Print the instruction selected machine code...
173  if (PrintMachineCode)
174    PM.add(createMachineFunctionPrinterPass(cerr));
175
176  // Perform register allocation to convert to a concrete x86 representation
177  PM.add(createRegisterAllocator());
178
179  if (PrintMachineCode)
180    PM.add(createMachineFunctionPrinterPass(cerr));
181
182  // Run post-ra passes.
183  if (addPostRegAlloc(PM, Fast) && PrintMachineCode)
184    PM.add(createMachineFunctionPrinterPass(cerr));
185
186  // Insert prolog/epilog code.  Eliminate abstract frame index references...
187  PM.add(createPrologEpilogCodeInserter());
188
189  if (PrintMachineCode)  // Print the register-allocated code
190    PM.add(createMachineFunctionPrinterPass(cerr));
191
192  // Second pass scheduler.
193  if (!Fast)
194    PM.add(createPostRAScheduler());
195
196  // Branch folding must be run after regalloc and prolog/epilog insertion.
197  if (!Fast)
198    PM.add(createBranchFoldingPass(getEnableTailMergeDefault()));
199
200  if (addPreEmitPass(PM, Fast) && PrintMachineCode)
201    PM.add(createMachineFunctionPrinterPass(cerr));
202
203  PM.add(createLowerSubregsPass());
204
205  addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE);
206
207  // Delete machine code for this function
208  PM.add(createMachineCodeDeleter());
209
210  return false; // success!
211}
212