LLVMTargetMachine.cpp revision 4aab7ae1bb860f54be28dd3819017337b28faeba
1//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the LLVMTargetMachine class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/Target/TargetMachine.h" 15#include "llvm/PassManager.h" 16#include "llvm/Pass.h" 17#include "llvm/Assembly/PrintModulePass.h" 18#include "llvm/Analysis/LoopPass.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/Target/TargetOptions.h" 21#include "llvm/Transforms/Scalar.h" 22#include "llvm/Support/CommandLine.h" 23using namespace llvm; 24 25static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden, 26 cl::desc("Print LLVM IR produced by the loop-reduce pass")); 27static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden, 28 cl::desc("Print LLVM IR input to isel pass")); 29static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden, 30 cl::desc("Dump emitter generated instructions as assembly")); 31 32// Hidden options to help debugging 33static cl::opt<bool> 34EnableSinking("enable-sinking", cl::init(false), cl::Hidden, 35 cl::desc("Perform sinking on machine code")); 36static cl::opt<bool> 37PerformLICM("machine-licm", 38 cl::init(false), cl::Hidden, 39 cl::desc("Perform loop-invariant code motion on machine code")); 40 41FileModel::Model 42LLVMTargetMachine::addPassesToEmitFile(FunctionPassManager &PM, 43 std::ostream &Out, 44 CodeGenFileType FileType, 45 bool Fast) { 46 // Standard LLVM-Level Passes. 47 48 // Run loop strength reduction before anything else. 49 if (!Fast) { 50 PM.add(createLoopStrengthReducePass(getTargetLowering())); 51 if (PrintLSR) 52 PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr)); 53 } 54 55 // FIXME: Implement efficient support for garbage collection intrinsics. 56 PM.add(createLowerGCPass()); 57 58 if (!ExceptionHandling) 59 PM.add(createLowerInvokePass(getTargetLowering())); 60 61 // Make sure that no unreachable blocks are instruction selected. 62 PM.add(createUnreachableBlockEliminationPass()); 63 64 if (!Fast) 65 PM.add(createCodeGenPreparePass(getTargetLowering())); 66 67 if (PrintISelInput) 68 PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n", 69 &cerr)); 70 71 // Ask the target for an isel. 72 if (addInstSelector(PM, Fast)) 73 return FileModel::Error; 74 75 // Print the instruction selected machine code... 76 if (PrintMachineCode) 77 PM.add(createMachineFunctionPrinterPass(cerr)); 78 79 if (PerformLICM) 80 PM.add(createMachineLICMPass()); 81 82 if (EnableSinking) 83 PM.add(createMachineSinkingPass()); 84 85 // Perform register allocation to convert to a concrete x86 representation 86 PM.add(createRegisterAllocator()); 87 88 if (PrintMachineCode) 89 PM.add(createMachineFunctionPrinterPass(cerr)); 90 91 PM.add(createLowerSubregsPass()); 92 93 if (PrintMachineCode) // Print the subreg lowered code 94 PM.add(createMachineFunctionPrinterPass(cerr)); 95 96 // Run post-ra passes. 97 if (addPostRegAlloc(PM, Fast) && PrintMachineCode) 98 PM.add(createMachineFunctionPrinterPass(cerr)); 99 100 // Insert prolog/epilog code. Eliminate abstract frame index references... 101 PM.add(createPrologEpilogCodeInserter()); 102 103 // Second pass scheduler. 104 if (!Fast) 105 PM.add(createPostRAScheduler()); 106 107 // Branch folding must be run after regalloc and prolog/epilog insertion. 108 if (!Fast) 109 PM.add(createBranchFoldingPass(getEnableTailMergeDefault())); 110 111 // Fold redundant debug labels. 112 PM.add(createDebugLabelFoldingPass()); 113 114 if (PrintMachineCode) // Print the register-allocated code 115 PM.add(createMachineFunctionPrinterPass(cerr)); 116 117 if (addPreEmitPass(PM, Fast) && PrintMachineCode) 118 PM.add(createMachineFunctionPrinterPass(cerr)); 119 120 switch (FileType) { 121 default: 122 break; 123 case TargetMachine::AssemblyFile: 124 if (addAssemblyEmitter(PM, Fast, Out)) 125 return FileModel::Error; 126 return FileModel::AsmFile; 127 case TargetMachine::ObjectFile: 128 if (getMachOWriterInfo()) 129 return FileModel::MachOFile; 130 else if (getELFWriterInfo()) 131 return FileModel::ElfFile; 132 } 133 134 return FileModel::Error; 135} 136 137/// addPassesToEmitFileFinish - If the passes to emit the specified file had to 138/// be split up (e.g., to add an object writer pass), this method can be used to 139/// finish up adding passes to emit the file, if necessary. 140bool LLVMTargetMachine::addPassesToEmitFileFinish(FunctionPassManager &PM, 141 MachineCodeEmitter *MCE, 142 bool Fast) { 143 if (MCE) 144 addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE); 145 146 // Delete machine code for this function 147 PM.add(createMachineCodeDeleter()); 148 149 return false; // success! 150} 151 152/// addPassesToEmitMachineCode - Add passes to the specified pass manager to 153/// get machine code emitted. This uses a MachineCodeEmitter object to handle 154/// actually outputting the machine code and resolving things like the address 155/// of functions. This method should returns true if machine code emission is 156/// not supported. 157/// 158bool LLVMTargetMachine::addPassesToEmitMachineCode(FunctionPassManager &PM, 159 MachineCodeEmitter &MCE, 160 bool Fast) { 161 // Standard LLVM-Level Passes. 162 163 // Run loop strength reduction before anything else. 164 if (!Fast) { 165 PM.add(createLoopStrengthReducePass(getTargetLowering())); 166 if (PrintLSR) 167 PM.add(new PrintFunctionPass("\n\n*** Code after LSR *** \n", &cerr)); 168 } 169 170 // FIXME: Implement efficient support for garbage collection intrinsics. 171 PM.add(createLowerGCPass()); 172 173 // FIXME: Implement the invoke/unwind instructions! 174 PM.add(createLowerInvokePass(getTargetLowering())); 175 176 // Make sure that no unreachable blocks are instruction selected. 177 PM.add(createUnreachableBlockEliminationPass()); 178 179 if (!Fast) 180 PM.add(createCodeGenPreparePass(getTargetLowering())); 181 182 if (PrintISelInput) 183 PM.add(new PrintFunctionPass("\n\n*** Final LLVM Code input to ISel *** \n", 184 &cerr)); 185 186 // Ask the target for an isel. 187 if (addInstSelector(PM, Fast)) 188 return true; 189 190 // Print the instruction selected machine code... 191 if (PrintMachineCode) 192 PM.add(createMachineFunctionPrinterPass(cerr)); 193 194 if (PerformLICM) 195 PM.add(createMachineLICMPass()); 196 197 // Perform register allocation to convert to a concrete x86 representation 198 PM.add(createRegisterAllocator()); 199 200 if (PrintMachineCode) 201 PM.add(createMachineFunctionPrinterPass(cerr)); 202 203 PM.add(createLowerSubregsPass()); 204 205 if (PrintMachineCode) // Print the subreg lowered code 206 PM.add(createMachineFunctionPrinterPass(cerr)); 207 208 // Run post-ra passes. 209 if (addPostRegAlloc(PM, Fast) && PrintMachineCode) 210 PM.add(createMachineFunctionPrinterPass(cerr)); 211 212 // Insert prolog/epilog code. Eliminate abstract frame index references... 213 PM.add(createPrologEpilogCodeInserter()); 214 215 if (PrintMachineCode) // Print the register-allocated code 216 PM.add(createMachineFunctionPrinterPass(cerr)); 217 218 // Second pass scheduler. 219 if (!Fast) 220 PM.add(createPostRAScheduler()); 221 222 // Branch folding must be run after regalloc and prolog/epilog insertion. 223 if (!Fast) 224 PM.add(createBranchFoldingPass(getEnableTailMergeDefault())); 225 226 if (addPreEmitPass(PM, Fast) && PrintMachineCode) 227 PM.add(createMachineFunctionPrinterPass(cerr)); 228 229 addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE); 230 231 // Delete machine code for this function 232 PM.add(createMachineCodeDeleter()); 233 234 return false; // success! 235} 236