LLVMTargetMachine.cpp revision c963b638c783beb2252e8a6c580c2d15c36c9be9
1//===-- LLVMTargetMachine.cpp - Implement the LLVMTargetMachine class -----===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file implements the LLVMTargetMachine class. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/Target/TargetMachine.h" 15#include "llvm/PassManager.h" 16#include "llvm/Pass.h" 17#include "llvm/Assembly/PrintModulePass.h" 18#include "llvm/Analysis/LoopPass.h" 19#include "llvm/CodeGen/Passes.h" 20#include "llvm/CodeGen/GCStrategy.h" 21#include "llvm/Target/TargetOptions.h" 22#include "llvm/Target/TargetAsmInfo.h" 23#include "llvm/Transforms/Scalar.h" 24#include "llvm/Support/CommandLine.h" 25#include "llvm/Support/raw_ostream.h" 26using namespace llvm; 27 28namespace llvm { 29 bool EnableFastISel; 30} 31 32static cl::opt<bool> PrintLSR("print-lsr-output", cl::Hidden, 33 cl::desc("Print LLVM IR produced by the loop-reduce pass")); 34static cl::opt<bool> PrintISelInput("print-isel-input", cl::Hidden, 35 cl::desc("Print LLVM IR input to isel pass")); 36static cl::opt<bool> PrintEmittedAsm("print-emitted-asm", cl::Hidden, 37 cl::desc("Dump emitter generated instructions as assembly")); 38static cl::opt<bool> PrintGCInfo("print-gc", cl::Hidden, 39 cl::desc("Dump garbage collector data")); 40 41// When this works it will be on by default. 42static cl::opt<bool> 43DisablePostRAScheduler("disable-post-RA-scheduler", 44 cl::desc("Disable scheduling after register allocation"), 45 cl::init(true)); 46 47// Enable or disable FastISel. Both options are needed, because 48// FastISel is enabled by default with -fast, and we wish to be 49// able to enable or disable fast-isel independently from -fast. 50static cl::opt<cl::boolOrDefault> 51EnableFastISelOption("fast-isel", cl::Hidden, 52 cl::desc("Enable the experimental \"fast\" instruction selector")); 53 54FileModel::Model 55LLVMTargetMachine::addPassesToEmitFile(PassManagerBase &PM, 56 raw_ostream &Out, 57 CodeGenFileType FileType, 58 bool Fast) { 59 // Add common CodeGen passes. 60 if (addCommonCodeGenPasses(PM, Fast)) 61 return FileModel::Error; 62 63 // Fold redundant debug labels. 64 PM.add(createDebugLabelFoldingPass()); 65 66 if (PrintMachineCode) 67 PM.add(createMachineFunctionPrinterPass(cerr)); 68 69 if (addPreEmitPass(PM, Fast) && PrintMachineCode) 70 PM.add(createMachineFunctionPrinterPass(cerr)); 71 72 if (!Fast) 73 PM.add(createLoopAlignerPass()); 74 75 switch (FileType) { 76 default: 77 break; 78 case TargetMachine::AssemblyFile: 79 if (addAssemblyEmitter(PM, Fast, Out)) 80 return FileModel::Error; 81 return FileModel::AsmFile; 82 case TargetMachine::ObjectFile: 83 if (getMachOWriterInfo()) 84 return FileModel::MachOFile; 85 else if (getELFWriterInfo()) 86 return FileModel::ElfFile; 87 } 88 89 return FileModel::Error; 90} 91 92/// addPassesToEmitFileFinish - If the passes to emit the specified file had to 93/// be split up (e.g., to add an object writer pass), this method can be used to 94/// finish up adding passes to emit the file, if necessary. 95bool LLVMTargetMachine::addPassesToEmitFileFinish(PassManagerBase &PM, 96 MachineCodeEmitter *MCE, 97 bool Fast) { 98 if (MCE) 99 addSimpleCodeEmitter(PM, Fast, PrintEmittedAsm, *MCE); 100 101 PM.add(createGCInfoDeleter()); 102 103 // Delete machine code for this function 104 PM.add(createMachineCodeDeleter()); 105 106 return false; // success! 107} 108 109/// addPassesToEmitMachineCode - Add passes to the specified pass manager to 110/// get machine code emitted. This uses a MachineCodeEmitter object to handle 111/// actually outputting the machine code and resolving things like the address 112/// of functions. This method should returns true if machine code emission is 113/// not supported. 114/// 115bool LLVMTargetMachine::addPassesToEmitMachineCode(PassManagerBase &PM, 116 MachineCodeEmitter &MCE, 117 bool Fast) { 118 // Add common CodeGen passes. 119 if (addCommonCodeGenPasses(PM, Fast)) 120 return true; 121 122 if (addPreEmitPass(PM, Fast) && PrintMachineCode) 123 PM.add(createMachineFunctionPrinterPass(cerr)); 124 125 addCodeEmitter(PM, Fast, PrintEmittedAsm, MCE); 126 127 PM.add(createGCInfoDeleter()); 128 129 // Delete machine code for this function 130 PM.add(createMachineCodeDeleter()); 131 132 return false; // success! 133} 134 135/// addCommonCodeGenPasses - Add standard LLVM codegen passes used for 136/// both emitting to assembly files or machine code output. 137/// 138bool LLVMTargetMachine::addCommonCodeGenPasses(PassManagerBase &PM, bool Fast) { 139 // Standard LLVM-Level Passes. 140 141 // Run loop strength reduction before anything else. 142 if (!Fast) { 143 PM.add(createLoopStrengthReducePass(getTargetLowering())); 144 if (PrintLSR) 145 PM.add(createPrintFunctionPass("\n\n*** Code after LSR ***\n", &errs())); 146 } 147 148 PM.add(createGCLoweringPass()); 149 150 if (!getTargetAsmInfo()->doesSupportExceptionHandling()) 151 PM.add(createLowerInvokePass(getTargetLowering())); 152 153 // Make sure that no unreachable blocks are instruction selected. 154 PM.add(createUnreachableBlockEliminationPass()); 155 156 if (!Fast) 157 PM.add(createCodeGenPreparePass(getTargetLowering())); 158 159 PM.add(createStackProtectorPass(getTargetLowering())); 160 161 if (PrintISelInput) 162 PM.add(createPrintFunctionPass("\n\n" 163 "*** Final LLVM Code input to ISel ***\n", 164 &errs())); 165 166 // Standard Lower-Level Passes. 167 168 // Enable FastISel with -fast, but allow that to be overridden. 169 if (EnableFastISelOption == cl::BOU_TRUE || 170 (Fast && EnableFastISelOption != cl::BOU_FALSE)) 171 EnableFastISel = true; 172 173 // Ask the target for an isel. 174 if (addInstSelector(PM, Fast)) 175 return true; 176 177 // Print the instruction selected machine code... 178 if (PrintMachineCode) 179 PM.add(createMachineFunctionPrinterPass(cerr)); 180 181 if (!Fast) { 182 PM.add(createMachineLICMPass()); 183 PM.add(createMachineSinkingPass()); 184 } 185 186 // Run pre-ra passes. 187 if (addPreRegAlloc(PM, Fast) && PrintMachineCode) 188 PM.add(createMachineFunctionPrinterPass(cerr)); 189 190 // Perform register allocation. 191 PM.add(createRegisterAllocator()); 192 193 // Perform stack slot coloring. 194 if (!Fast) 195 PM.add(createStackSlotColoringPass()); 196 197 if (PrintMachineCode) // Print the register-allocated code 198 PM.add(createMachineFunctionPrinterPass(cerr)); 199 200 // Run post-ra passes. 201 if (addPostRegAlloc(PM, Fast) && PrintMachineCode) 202 PM.add(createMachineFunctionPrinterPass(cerr)); 203 204 if (PrintMachineCode) 205 PM.add(createMachineFunctionPrinterPass(cerr)); 206 207 PM.add(createLowerSubregsPass()); 208 209 if (PrintMachineCode) // Print the subreg lowered code 210 PM.add(createMachineFunctionPrinterPass(cerr)); 211 212 // Insert prolog/epilog code. Eliminate abstract frame index references... 213 PM.add(createPrologEpilogCodeInserter()); 214 215 if (PrintMachineCode) 216 PM.add(createMachineFunctionPrinterPass(cerr)); 217 218 // Second pass scheduler. 219 if (!Fast && !DisablePostRAScheduler) { 220 PM.add(createPostRAScheduler()); 221 222 if (PrintMachineCode) 223 PM.add(createMachineFunctionPrinterPass(cerr)); 224 } 225 226 // Branch folding must be run after regalloc and prolog/epilog insertion. 227 if (!Fast) 228 PM.add(createBranchFoldingPass(getEnableTailMergeDefault())); 229 230 if (PrintMachineCode) 231 PM.add(createMachineFunctionPrinterPass(cerr)); 232 233 PM.add(createGCMachineCodeAnalysisPass()); 234 235 if (PrintMachineCode) 236 PM.add(createMachineFunctionPrinterPass(cerr)); 237 238 if (PrintGCInfo) 239 PM.add(createGCInfoPrinter(*cerr)); 240 241 return false; 242} 243