LiveIntervalAnalysis.cpp revision 63841bc85d15ca0ce1b3208084f4262f3d33ef21 
1//===-- LiveIntervals.cpp - Live Interval Analysis ------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements the LiveInterval analysis pass which is used
11// by the Linear Scan Register allocator. This pass linearizes the
12// basic blocks of the function in DFS order and uses the
13// LiveVariables pass to conservatively compute live intervals for
14// each virtual and physical register.
15//
16//===----------------------------------------------------------------------===//
17
18#define DEBUG_TYPE "liveintervals"
19#include "llvm/CodeGen/LiveIntervals.h"
20#include "llvm/Function.h"
21#include "llvm/Analysis/LoopInfo.h"
22#include "llvm/CodeGen/LiveVariables.h"
23#include "llvm/CodeGen/MachineFrameInfo.h"
24#include "llvm/CodeGen/MachineFunctionPass.h"
25#include "llvm/CodeGen/MachineInstr.h"
26#include "llvm/CodeGen/Passes.h"
27#include "llvm/CodeGen/SSARegMap.h"
28#include "llvm/Target/MRegisterInfo.h"
29#include "llvm/Target/TargetInstrInfo.h"
30#include "llvm/Target/TargetMachine.h"
31#include "llvm/Target/TargetRegInfo.h"
32#include "llvm/Support/CFG.h"
33#include "Support/Debug.h"
34#include "Support/DepthFirstIterator.h"
35#include "Support/Statistic.h"
36#include <cmath>
37#include <iostream>
38#include <limits>
39
40using namespace llvm;
41
42namespace {
43    RegisterAnalysis<LiveIntervals> X("liveintervals",
44                                      "Live Interval Analysis");
45
46    Statistic<> numIntervals("liveintervals", "Number of intervals");
47};
48
49void LiveIntervals::getAnalysisUsage(AnalysisUsage &AU) const
50{
51    AU.addPreserved<LiveVariables>();
52    AU.addRequired<LiveVariables>();
53    AU.addPreservedID(PHIEliminationID);
54    AU.addRequiredID(PHIEliminationID);
55    AU.addRequiredID(TwoAddressInstructionPassID);
56    AU.addRequired<LoopInfo>();
57    MachineFunctionPass::getAnalysisUsage(AU);
58}
59
60/// runOnMachineFunction - Register allocate the whole function
61///
62bool LiveIntervals::runOnMachineFunction(MachineFunction &fn) {
63    DEBUG(std::cerr << "Machine Function\n");
64    mf_ = &fn;
65    tm_ = &fn.getTarget();
66    mri_ = tm_->getRegisterInfo();
67    lv_ = &getAnalysis<LiveVariables>();
68    allocatableRegisters_.clear();
69    mbbi2mbbMap_.clear();
70    mi2iMap_.clear();
71    r2iMap_.clear();
72    r2iMap_.clear();
73    intervals_.clear();
74
75    // mark allocatable registers
76    allocatableRegisters_.resize(MRegisterInfo::FirstVirtualRegister);
77    // Loop over all of the register classes...
78    for (MRegisterInfo::regclass_iterator
79             rci = mri_->regclass_begin(), rce = mri_->regclass_end();
80         rci != rce; ++rci) {
81        // Loop over all of the allocatable registers in the function...
82        for (TargetRegisterClass::iterator
83                 i = (*rci)->allocation_order_begin(*mf_),
84                 e = (*rci)->allocation_order_end(*mf_); i != e; ++i) {
85            allocatableRegisters_[*i] = true;  // The reg is allocatable!
86        }
87    }
88
89    // number MachineInstrs
90    unsigned miIndex = 0;
91    for (MachineFunction::iterator mbb = mf_->begin(), mbbEnd = mf_->end();
92         mbb != mbbEnd; ++mbb) {
93        const std::pair<MachineBasicBlock*, unsigned>& entry =
94            lv_->getMachineBasicBlockInfo(&*mbb);
95        bool inserted = mbbi2mbbMap_.insert(std::make_pair(entry.second,
96                                                           entry.first)).second;
97        assert(inserted && "multiple index -> MachineBasicBlock");
98
99        for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
100             mi != miEnd; ++mi) {
101            inserted = mi2iMap_.insert(std::make_pair(*mi, miIndex)).second;
102            assert(inserted && "multiple MachineInstr -> index mappings");
103            ++miIndex;
104        }
105    }
106
107    computeIntervals();
108
109    // compute spill weights
110    const LoopInfo& loopInfo = getAnalysis<LoopInfo>();
111    const TargetInstrInfo& tii = tm_->getInstrInfo();
112
113    for (MbbIndex2MbbMap::iterator
114             it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
115         it != itEnd; ++it) {
116        MachineBasicBlock* mbb = it->second;
117
118        unsigned loopDepth = loopInfo.getLoopDepth(mbb->getBasicBlock());
119
120        for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
121             mi != miEnd; ++mi) {
122            MachineInstr* instr = *mi;
123            for (int i = instr->getNumOperands() - 1; i >= 0; --i) {
124                MachineOperand& mop = instr->getOperand(i);
125
126                if (!mop.isVirtualRegister())
127                    continue;
128
129                unsigned reg = mop.getAllocatedRegNum();
130                Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
131                assert(r2iit != r2iMap_.end());
132                intervals_[r2iit->second].weight += pow(10.0F, loopDepth);
133            }
134        }
135    }
136
137    return true;
138}
139
140void LiveIntervals::printRegName(unsigned reg) const
141{
142    if (reg < MRegisterInfo::FirstVirtualRegister)
143        std::cerr << mri_->getName(reg);
144    else
145        std::cerr << '%' << reg;
146}
147
148void LiveIntervals::handleVirtualRegisterDef(MachineBasicBlock* mbb,
149                                             MachineBasicBlock::iterator mi,
150                                             unsigned reg)
151{
152    DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
153
154    unsigned instrIndex = getInstructionIndex(*mi);
155
156    LiveVariables::VarInfo& vi = lv_->getVarInfo(reg);
157
158    Interval* interval = 0;
159    Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
160    if (r2iit == r2iMap_.end()) {
161        // add new interval
162        intervals_.push_back(Interval(reg));
163        // update interval index for this register
164        r2iMap_[reg] = intervals_.size() - 1;
165        interval = &intervals_.back();
166    }
167    else {
168        interval = &intervals_[r2iit->second];
169    }
170
171    for (MbbIndex2MbbMap::iterator
172             it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
173         it != itEnd; ++it) {
174        unsigned liveBlockIndex = it->first;
175        MachineBasicBlock* liveBlock = it->second;
176        if (liveBlockIndex < vi.AliveBlocks.size() &&
177            vi.AliveBlocks[liveBlockIndex] &&
178            !liveBlock->empty()) {
179            unsigned start =  getInstructionIndex(liveBlock->front());
180            unsigned end = getInstructionIndex(liveBlock->back()) + 1;
181            interval->addRange(start, end);
182        }
183    }
184
185    bool killedInDefiningBasicBlock = false;
186    for (int i = 0, e = vi.Kills.size(); i != e; ++i) {
187        MachineBasicBlock* killerBlock = vi.Kills[i].first;
188        MachineInstr* killerInstr = vi.Kills[i].second;
189        unsigned start = (mbb == killerBlock ?
190                          instrIndex :
191                          getInstructionIndex(killerBlock->front()));
192        unsigned end = getInstructionIndex(killerInstr) + 1;
193        if (start < end) {
194            killedInDefiningBasicBlock |= mbb == killerBlock;
195            interval->addRange(start, end);
196        }
197    }
198
199    if (!killedInDefiningBasicBlock) {
200        unsigned end = getInstructionIndex(mbb->back()) + 1;
201        interval->addRange(instrIndex, end);
202    }
203}
204
205void LiveIntervals::handlePhysicalRegisterDef(MachineBasicBlock* mbb,
206                                              MachineBasicBlock::iterator mi,
207                                              unsigned reg)
208{
209    DEBUG(std::cerr << "\t\t\tregister: ";printRegName(reg); std::cerr << '\n');
210    if (!lv_->getAllocatablePhysicalRegisters()[reg]) {
211        DEBUG(std::cerr << "\t\t\t\tnon allocatable register: ignoring\n");
212        return;
213    }
214
215    unsigned start = getInstructionIndex(*mi);
216    unsigned end = start;
217
218    for (MachineBasicBlock::iterator e = mbb->end(); mi != e; ++mi) {
219        for (LiveVariables::killed_iterator
220                 ki = lv_->dead_begin(*mi),
221                 ke = lv_->dead_end(*mi);
222             ki != ke; ++ki) {
223            if (reg == ki->second) {
224                end = getInstructionIndex(ki->first) + 1;
225                goto exit;
226            }
227        }
228
229        for (LiveVariables::killed_iterator
230                 ki = lv_->killed_begin(*mi),
231                 ke = lv_->killed_end(*mi);
232             ki != ke; ++ki) {
233            if (reg == ki->second) {
234                end = getInstructionIndex(ki->first) + 1;
235                goto exit;
236            }
237        }
238    }
239exit:
240    assert(start < end && "did not find end of interval?");
241
242    Reg2IntervalMap::iterator r2iit = r2iMap_.find(reg);
243    if (r2iit != r2iMap_.end()) {
244        unsigned ii = r2iit->second;
245        Interval& interval = intervals_[ii];
246        interval.addRange(start, end);
247    }
248    else {
249        intervals_.push_back(Interval(reg));
250        Interval& interval = intervals_.back();
251        // update interval index for this register
252        r2iMap_[reg] = intervals_.size() - 1;
253        interval.addRange(start, end);
254    }
255}
256
257void LiveIntervals::handleRegisterDef(MachineBasicBlock* mbb,
258                                      MachineBasicBlock::iterator mi,
259                                      unsigned reg)
260{
261    if (reg < MRegisterInfo::FirstVirtualRegister) {
262        if (allocatableRegisters_[reg]) {
263            handlePhysicalRegisterDef(mbb, mi, reg);
264            for (const unsigned* as = mri_->getAliasSet(reg); *as; ++as)
265                handlePhysicalRegisterDef(mbb, mi, *as);
266        }
267    }
268    else {
269        handleVirtualRegisterDef(mbb, mi, reg);
270    }
271}
272
273unsigned LiveIntervals::getInstructionIndex(MachineInstr* instr) const
274{
275    assert(mi2iMap_.find(instr) != mi2iMap_.end() &&
276           "instruction not assigned a number");
277    return mi2iMap_.find(instr)->second;
278}
279
280/// computeIntervals - computes the live intervals for virtual
281/// registers. for some ordering of the machine instructions [1,N] a
282/// live interval is an interval [i, j] where 1 <= i <= j <= N for
283/// which a variable is live
284void LiveIntervals::computeIntervals()
285{
286    DEBUG(std::cerr << "computing live intervals:\n");
287
288    for (MbbIndex2MbbMap::iterator
289             it = mbbi2mbbMap_.begin(), itEnd = mbbi2mbbMap_.end();
290         it != itEnd; ++it) {
291        MachineBasicBlock* mbb = it->second;
292        DEBUG(std::cerr << "machine basic block: "
293              << mbb->getBasicBlock()->getName() << "\n");
294
295        for (MachineBasicBlock::iterator mi = mbb->begin(), miEnd = mbb->end();
296             mi != miEnd; ++mi) {
297            MachineInstr* instr = *mi;
298            const TargetInstrDescriptor& tid =
299                tm_->getInstrInfo().get(instr->getOpcode());
300            DEBUG(std::cerr << "\t\tinstruction["
301                  << getInstructionIndex(instr) << "]: ";
302                  instr->print(std::cerr, *tm_););
303
304            // handle implicit defs
305            for (const unsigned* id = tid.ImplicitDefs; *id; ++id)
306                handleRegisterDef(mbb, mi, *id);
307
308            // handle explicit defs
309            for (int i = instr->getNumOperands() - 1; i >= 0; --i) {
310                MachineOperand& mop = instr->getOperand(i);
311
312                if (!mop.isRegister())
313                    continue;
314
315                // handle defs - build intervals
316                if (mop.isDef())
317                    handleRegisterDef(mbb, mi, mop.getAllocatedRegNum());
318            }
319        }
320    }
321
322    std::sort(intervals_.begin(), intervals_.end(), StartPointComp());
323    DEBUG(std::copy(intervals_.begin(), intervals_.end(),
324                    std::ostream_iterator<Interval>(std::cerr, "\n")));
325}
326
327LiveIntervals::Interval::Interval(unsigned r)
328    : reg(r), hint(0),
329      weight((r < MRegisterInfo::FirstVirtualRegister ?
330              std::numeric_limits<float>::max() : 0.0F))
331{
332
333}
334
335void LiveIntervals::Interval::addRange(unsigned start, unsigned end)
336{
337    DEBUG(std::cerr << "\t\t\t\tadding range: [" << start <<','<< end << "]\n");
338    //assert(start < end && "invalid range?");
339    Range range = std::make_pair(start, end);
340    Ranges::iterator it =
341        ranges.insert(std::upper_bound(ranges.begin(), ranges.end(), range),
342                      range);
343
344    DEBUG(std::cerr << "\t\t\t\tbefore merge forward: " << *this << '\n');
345    mergeRangesForward(it);
346    DEBUG(std::cerr << "\t\t\t\tbefore merge backward: " << *this << '\n');
347    mergeRangesBackward(it);
348    DEBUG(std::cerr << "\t\t\t\tafter merging: " << *this << '\n');
349}
350
351void LiveIntervals::Interval::mergeRangesForward(Ranges::iterator it)
352{
353    for (Ranges::iterator next = it + 1;
354         next != ranges.end() && it->second >= next->first; ) {
355        it->second = std::max(it->second, next->second);
356        next = ranges.erase(next);
357    }
358}
359
360void LiveIntervals::Interval::mergeRangesBackward(Ranges::iterator it)
361{
362    for (Ranges::iterator prev = it - 1;
363         it != ranges.begin() && it->first <= prev->second; ) {
364        it->first = std::min(it->first, prev->first);
365        it->second = std::max(it->second, prev->second);
366        it = ranges.erase(prev);
367        prev = it - 1;
368    }
369}
370
371bool LiveIntervals::Interval::liveAt(unsigned index) const
372{
373    Ranges::const_iterator r = ranges.begin();
374    while (r != ranges.end() && index < r->second) {
375        if (index >= r->first)
376            return true;
377        ++r;
378    }
379    return false;
380}
381
382bool LiveIntervals::Interval::overlaps(const Interval& other) const
383{
384    Ranges::const_iterator i = ranges.begin();
385    Ranges::const_iterator j = other.ranges.begin();
386
387    while (i != ranges.end() && j != other.ranges.end()) {
388        if (i->first < j->first) {
389            if (i->second > j->first) {
390                return true;
391            }
392            else {
393                ++i;
394            }
395        }
396        else if (j->first < i->first) {
397            if (j->second > i->first) {
398                return true;
399            }
400            else {
401                ++j;
402            }
403        }
404        else {
405            return true;
406        }
407    }
408
409    return false;
410}
411
412std::ostream& llvm::operator<<(std::ostream& os,
413                               const LiveIntervals::Interval& li)
414{
415    os << "%reg" << li.reg << ',' << li.weight << " = ";
416    for (LiveIntervals::Interval::Ranges::const_iterator
417             i = li.ranges.begin(), e = li.ranges.end(); i != e; ++i) {
418        os << "[" << i->first << "," << i->second << ")";
419    }
420    return os;
421}
422