136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines//===--- LivePhysRegs.cpp - Live Physical Register Set --------------------===// 236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// 336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// The LLVM Compiler Infrastructure 436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// 536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// This file is distributed under the University of Illinois Open Source 636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// License. See LICENSE.TXT for details. 736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// 836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines//===----------------------------------------------------------------------===// 936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// 1036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// This file implements the LivePhysRegs utility for tracking liveness of 1136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// physical registers across machine instructions in forward or backward order. 1236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// A more detailed description can be found in the corresponding header file. 1336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines// 1436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines//===----------------------------------------------------------------------===// 1536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 1636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/CodeGen/LivePhysRegs.h" 1736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/CodeGen/MachineInstrBundle.h" 1836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#include "llvm/Support/Debug.h" 1936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesusing namespace llvm; 2036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 2236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// \brief Remove all registers from the set that get clobbered by the register 2336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// mask. 2436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesvoid LivePhysRegs::removeRegsInMask(const MachineOperand &MO) { 2536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SparseSet<unsigned>::iterator LRI = LiveRegs.begin(); 2636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines while (LRI != LiveRegs.end()) { 2736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (MO.clobbersPhysReg(*LRI)) 2836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines LRI = LiveRegs.erase(LRI); 2936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines else 3036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines ++LRI; 3136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 3236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 3336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 3436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// Simulates liveness when stepping backwards over an instruction(bundle): 3536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// Remove Defs, add uses. This is the recommended way of calculating liveness. 3636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesvoid LivePhysRegs::stepBackward(const MachineInstr &MI) { 3736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines // Remove defined registers and regmask kills from the set. 3836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) { 3936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (O->isReg()) { 4036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (!O->isDef()) 4136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines continue; 4236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned Reg = O->getReg(); 4336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (Reg == 0) 4436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines continue; 4536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines removeReg(Reg); 4636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } else if (O->isRegMask()) 4736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines removeRegsInMask(*O); 4836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 4936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 5036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines // Add uses to the set. 5136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) { 5236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (!O->isReg() || !O->readsReg() || O->isUndef()) 5336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines continue; 5436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned Reg = O->getReg(); 5536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (Reg == 0) 5636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines continue; 5736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines addReg(Reg); 5836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 5936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 6036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 6136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// Simulates liveness when stepping forward over an instruction(bundle): Remove 6236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// killed-uses, add defs. This is the not recommended way, because it depends 6336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// on accurate kill flags. If possible use stepBackwards() instead of this 6436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// function. 6536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesvoid LivePhysRegs::stepForward(const MachineInstr &MI) { 6636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines SmallVector<unsigned, 4> Defs; 6736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines // Remove killed registers from the set. 6836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines for (ConstMIBundleOperands O(&MI); O.isValid(); ++O) { 6936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (O->isReg()) { 7036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines unsigned Reg = O->getReg(); 7136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (Reg == 0) 7236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines continue; 7336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (O->isDef()) { 7436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (!O->isDead()) 7536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines Defs.push_back(Reg); 7636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } else { 7736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (!O->isKill()) 7836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines continue; 7936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines assert(O->isUse()); 8036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines removeReg(Reg); 8136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 8236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } else if (O->isRegMask()) 8336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines removeRegsInMask(*O); 8436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 8536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 8636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines // Add defs to the set. 8736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines for (unsigned i = 0, e = Defs.size(); i != e; ++i) 8836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines addReg(Defs[i]); 8936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 9036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 9136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// Prin the currently live registers to OS. 9236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesvoid LivePhysRegs::print(raw_ostream &OS) const { 9336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines OS << "Live Registers:"; 9436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (!TRI) { 9536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines OS << " (uninitialized)\n"; 9636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return; 9736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 9836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 9936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines if (empty()) { 10036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines OS << " (empty)\n"; 10136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines return; 10236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines } 10336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 10436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines for (const_iterator I = begin(), E = end(); I != E; ++I) 10536b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines OS << " " << PrintReg(*I, TRI); 10636b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines OS << "\n"; 10736b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 10836b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines 10936b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines/// Dumps the currently live registers to the debug output. 11036b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hinesvoid LivePhysRegs::dump() const { 11136b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 11236b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines dbgs() << " " << *this; 11336b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines#endif 11436b56886974eae4f9c5ebc96befd3e7bfe5de338Stephen Hines} 115