MachineBasicBlock.cpp revision 57903357ee4f9fed47dcad6f3739414301136b0f
1//===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Collect the sequence of machine instructions for a basic block. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/MachineBasicBlock.h" 15#include "llvm/BasicBlock.h" 16#include "llvm/CodeGen/LiveVariables.h" 17#include "llvm/CodeGen/MachineDominators.h" 18#include "llvm/CodeGen/MachineFunction.h" 19#include "llvm/CodeGen/MachineLoopInfo.h" 20#include "llvm/CodeGen/SlotIndexes.h" 21#include "llvm/MC/MCAsmInfo.h" 22#include "llvm/MC/MCContext.h" 23#include "llvm/Target/TargetRegisterInfo.h" 24#include "llvm/Target/TargetData.h" 25#include "llvm/Target/TargetInstrDesc.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Target/TargetMachine.h" 28#include "llvm/Assembly/Writer.h" 29#include "llvm/ADT/SmallString.h" 30#include "llvm/ADT/SmallPtrSet.h" 31#include "llvm/Support/Debug.h" 32#include "llvm/Support/LeakDetector.h" 33#include "llvm/Support/raw_ostream.h" 34#include <algorithm> 35using namespace llvm; 36 37MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb) 38 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false), 39 AddressTaken(false) { 40 Insts.Parent = this; 41} 42 43MachineBasicBlock::~MachineBasicBlock() { 44 LeakDetector::removeGarbageObject(this); 45} 46 47/// getSymbol - Return the MCSymbol for this basic block. 48/// 49MCSymbol *MachineBasicBlock::getSymbol() const { 50 const MachineFunction *MF = getParent(); 51 MCContext &Ctx = MF->getContext(); 52 const char *Prefix = Ctx.getAsmInfo().getPrivateGlobalPrefix(); 53 return Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" + 54 Twine(MF->getFunctionNumber()) + "_" + 55 Twine(getNumber())); 56} 57 58 59raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) { 60 MBB.print(OS); 61 return OS; 62} 63 64/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the 65/// parent pointer of the MBB, the MBB numbering, and any instructions in the 66/// MBB to be on the right operand list for registers. 67/// 68/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it 69/// gets the next available unique MBB number. If it is removed from a 70/// MachineFunction, it goes back to being #-1. 71void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) { 72 MachineFunction &MF = *N->getParent(); 73 N->Number = MF.addToMBBNumbering(N); 74 75 // Make sure the instructions have their operands in the reginfo lists. 76 MachineRegisterInfo &RegInfo = MF.getRegInfo(); 77 for (MachineBasicBlock::iterator I = N->begin(), E = N->end(); I != E; ++I) 78 I->AddRegOperandsToUseLists(RegInfo); 79 80 LeakDetector::removeGarbageObject(N); 81} 82 83void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) { 84 N->getParent()->removeFromMBBNumbering(N->Number); 85 N->Number = -1; 86 LeakDetector::addGarbageObject(N); 87} 88 89 90/// addNodeToList (MI) - When we add an instruction to a basic block 91/// list, we update its parent pointer and add its operands from reg use/def 92/// lists if appropriate. 93void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) { 94 assert(N->getParent() == 0 && "machine instruction already in a basic block"); 95 N->setParent(Parent); 96 97 // Add the instruction's register operands to their corresponding 98 // use/def lists. 99 MachineFunction *MF = Parent->getParent(); 100 N->AddRegOperandsToUseLists(MF->getRegInfo()); 101 102 LeakDetector::removeGarbageObject(N); 103} 104 105/// removeNodeFromList (MI) - When we remove an instruction from a basic block 106/// list, we update its parent pointer and remove its operands from reg use/def 107/// lists if appropriate. 108void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) { 109 assert(N->getParent() != 0 && "machine instruction not in a basic block"); 110 111 // Remove from the use/def lists. 112 N->RemoveRegOperandsFromUseLists(); 113 114 N->setParent(0); 115 116 LeakDetector::addGarbageObject(N); 117} 118 119/// transferNodesFromList (MI) - When moving a range of instructions from one 120/// MBB list to another, we need to update the parent pointers and the use/def 121/// lists. 122void ilist_traits<MachineInstr>:: 123transferNodesFromList(ilist_traits<MachineInstr> &fromList, 124 MachineBasicBlock::iterator first, 125 MachineBasicBlock::iterator last) { 126 assert(Parent->getParent() == fromList.Parent->getParent() && 127 "MachineInstr parent mismatch!"); 128 129 // Splice within the same MBB -> no change. 130 if (Parent == fromList.Parent) return; 131 132 // If splicing between two blocks within the same function, just update the 133 // parent pointers. 134 for (; first != last; ++first) 135 first->setParent(Parent); 136} 137 138void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) { 139 assert(!MI->getParent() && "MI is still in a block!"); 140 Parent->getParent()->DeleteMachineInstr(MI); 141} 142 143MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() { 144 iterator I = begin(); 145 while (I != end() && I->isPHI()) 146 ++I; 147 return I; 148} 149 150MachineBasicBlock::iterator 151MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) { 152 while (I != end() && (I->isPHI() || I->isLabel() || I->isDebugValue())) 153 ++I; 154 return I; 155} 156 157MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() { 158 iterator I = end(); 159 while (I != begin() && ((--I)->getDesc().isTerminator() || I->isDebugValue())) 160 ; /*noop */ 161 while (I != end() && !I->getDesc().isTerminator()) 162 ++I; 163 return I; 164} 165 166MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() { 167 iterator B = begin(), I = end(); 168 while (I != B) { 169 --I; 170 if (I->isDebugValue()) 171 continue; 172 return I; 173 } 174 // The block is all debug values. 175 return end(); 176} 177 178const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const { 179 // A block with a landing pad successor only has one other successor. 180 if (succ_size() > 2) 181 return 0; 182 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I) 183 if ((*I)->isLandingPad()) 184 return *I; 185 return 0; 186} 187 188void MachineBasicBlock::dump() const { 189 print(dbgs()); 190} 191 192StringRef MachineBasicBlock::getName() const { 193 if (const BasicBlock *LBB = getBasicBlock()) 194 return LBB->getName(); 195 else 196 return "(null)"; 197} 198 199void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const { 200 const MachineFunction *MF = getParent(); 201 if (!MF) { 202 OS << "Can't print out MachineBasicBlock because parent MachineFunction" 203 << " is null\n"; 204 return; 205 } 206 207 if (Alignment) { OS << "Alignment " << Alignment << "\n"; } 208 209 if (Indexes) 210 OS << Indexes->getMBBStartIdx(this) << '\t'; 211 212 OS << "BB#" << getNumber() << ": "; 213 214 const char *Comma = ""; 215 if (const BasicBlock *LBB = getBasicBlock()) { 216 OS << Comma << "derived from LLVM BB "; 217 WriteAsOperand(OS, LBB, /*PrintType=*/false); 218 Comma = ", "; 219 } 220 if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; } 221 if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; } 222 OS << '\n'; 223 224 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 225 if (!livein_empty()) { 226 if (Indexes) OS << '\t'; 227 OS << " Live Ins:"; 228 for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I) 229 OS << ' ' << PrintReg(*I, TRI); 230 OS << '\n'; 231 } 232 // Print the preds of this block according to the CFG. 233 if (!pred_empty()) { 234 if (Indexes) OS << '\t'; 235 OS << " Predecessors according to CFG:"; 236 for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI) 237 OS << " BB#" << (*PI)->getNumber(); 238 OS << '\n'; 239 } 240 241 for (const_iterator I = begin(); I != end(); ++I) { 242 if (Indexes) { 243 if (Indexes->hasIndex(I)) 244 OS << Indexes->getInstructionIndex(I); 245 OS << '\t'; 246 } 247 OS << '\t'; 248 I->print(OS, &getParent()->getTarget()); 249 } 250 251 // Print the successors of this block according to the CFG. 252 if (!succ_empty()) { 253 if (Indexes) OS << '\t'; 254 OS << " Successors according to CFG:"; 255 for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) 256 OS << " BB#" << (*SI)->getNumber(); 257 OS << '\n'; 258 } 259} 260 261void MachineBasicBlock::removeLiveIn(unsigned Reg) { 262 std::vector<unsigned>::iterator I = 263 std::find(LiveIns.begin(), LiveIns.end(), Reg); 264 assert(I != LiveIns.end() && "Not a live in!"); 265 LiveIns.erase(I); 266} 267 268bool MachineBasicBlock::isLiveIn(unsigned Reg) const { 269 livein_iterator I = std::find(livein_begin(), livein_end(), Reg); 270 return I != livein_end(); 271} 272 273void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) { 274 getParent()->splice(NewAfter, this); 275} 276 277void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) { 278 MachineFunction::iterator BBI = NewBefore; 279 getParent()->splice(++BBI, this); 280} 281 282void MachineBasicBlock::updateTerminator() { 283 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 284 // A block with no successors has no concerns with fall-through edges. 285 if (this->succ_empty()) return; 286 287 MachineBasicBlock *TBB = 0, *FBB = 0; 288 SmallVector<MachineOperand, 4> Cond; 289 DebugLoc dl; // FIXME: this is nowhere 290 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond); 291 (void) B; 292 assert(!B && "UpdateTerminators requires analyzable predecessors!"); 293 if (Cond.empty()) { 294 if (TBB) { 295 // The block has an unconditional branch. If its successor is now 296 // its layout successor, delete the branch. 297 if (isLayoutSuccessor(TBB)) 298 TII->RemoveBranch(*this); 299 } else { 300 // The block has an unconditional fallthrough. If its successor is not 301 // its layout successor, insert a branch. 302 TBB = *succ_begin(); 303 if (!isLayoutSuccessor(TBB)) 304 TII->InsertBranch(*this, TBB, 0, Cond, dl); 305 } 306 } else { 307 if (FBB) { 308 // The block has a non-fallthrough conditional branch. If one of its 309 // successors is its layout successor, rewrite it to a fallthrough 310 // conditional branch. 311 if (isLayoutSuccessor(TBB)) { 312 if (TII->ReverseBranchCondition(Cond)) 313 return; 314 TII->RemoveBranch(*this); 315 TII->InsertBranch(*this, FBB, 0, Cond, dl); 316 } else if (isLayoutSuccessor(FBB)) { 317 TII->RemoveBranch(*this); 318 TII->InsertBranch(*this, TBB, 0, Cond, dl); 319 } 320 } else { 321 // The block has a fallthrough conditional branch. 322 MachineBasicBlock *MBBA = *succ_begin(); 323 MachineBasicBlock *MBBB = *llvm::next(succ_begin()); 324 if (MBBA == TBB) std::swap(MBBB, MBBA); 325 if (isLayoutSuccessor(TBB)) { 326 if (TII->ReverseBranchCondition(Cond)) { 327 // We can't reverse the condition, add an unconditional branch. 328 Cond.clear(); 329 TII->InsertBranch(*this, MBBA, 0, Cond, dl); 330 return; 331 } 332 TII->RemoveBranch(*this); 333 TII->InsertBranch(*this, MBBA, 0, Cond, dl); 334 } else if (!isLayoutSuccessor(MBBA)) { 335 TII->RemoveBranch(*this); 336 TII->InsertBranch(*this, TBB, MBBA, Cond, dl); 337 } 338 } 339 } 340} 341 342void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ) { 343 Successors.push_back(succ); 344 succ->addPredecessor(this); 345} 346 347void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) { 348 succ->removePredecessor(this); 349 succ_iterator I = std::find(Successors.begin(), Successors.end(), succ); 350 assert(I != Successors.end() && "Not a current successor!"); 351 Successors.erase(I); 352} 353 354MachineBasicBlock::succ_iterator 355MachineBasicBlock::removeSuccessor(succ_iterator I) { 356 assert(I != Successors.end() && "Not a current successor!"); 357 (*I)->removePredecessor(this); 358 return Successors.erase(I); 359} 360 361void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) { 362 Predecessors.push_back(pred); 363} 364 365void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) { 366 pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred); 367 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!"); 368 Predecessors.erase(I); 369} 370 371void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) { 372 if (this == fromMBB) 373 return; 374 375 while (!fromMBB->succ_empty()) { 376 MachineBasicBlock *Succ = *fromMBB->succ_begin(); 377 addSuccessor(Succ); 378 fromMBB->removeSuccessor(Succ); 379 } 380} 381 382void 383MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB) { 384 if (this == fromMBB) 385 return; 386 387 while (!fromMBB->succ_empty()) { 388 MachineBasicBlock *Succ = *fromMBB->succ_begin(); 389 addSuccessor(Succ); 390 fromMBB->removeSuccessor(Succ); 391 392 // Fix up any PHI nodes in the successor. 393 for (MachineBasicBlock::iterator MI = Succ->begin(), ME = Succ->end(); 394 MI != ME && MI->isPHI(); ++MI) 395 for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) { 396 MachineOperand &MO = MI->getOperand(i); 397 if (MO.getMBB() == fromMBB) 398 MO.setMBB(this); 399 } 400 } 401} 402 403bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const { 404 const_succ_iterator I = std::find(Successors.begin(), Successors.end(), MBB); 405 return I != Successors.end(); 406} 407 408bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const { 409 MachineFunction::const_iterator I(this); 410 return llvm::next(I) == MachineFunction::const_iterator(MBB); 411} 412 413bool MachineBasicBlock::canFallThrough() { 414 MachineFunction::iterator Fallthrough = this; 415 ++Fallthrough; 416 // If FallthroughBlock is off the end of the function, it can't fall through. 417 if (Fallthrough == getParent()->end()) 418 return false; 419 420 // If FallthroughBlock isn't a successor, no fallthrough is possible. 421 if (!isSuccessor(Fallthrough)) 422 return false; 423 424 // Analyze the branches, if any, at the end of the block. 425 MachineBasicBlock *TBB = 0, *FBB = 0; 426 SmallVector<MachineOperand, 4> Cond; 427 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 428 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) { 429 // If we couldn't analyze the branch, examine the last instruction. 430 // If the block doesn't end in a known control barrier, assume fallthrough 431 // is possible. The isPredicable check is needed because this code can be 432 // called during IfConversion, where an instruction which is normally a 433 // Barrier is predicated and thus no longer an actual control barrier. This 434 // is over-conservative though, because if an instruction isn't actually 435 // predicated we could still treat it like a barrier. 436 return empty() || !back().getDesc().isBarrier() || 437 back().getDesc().isPredicable(); 438 } 439 440 // If there is no branch, control always falls through. 441 if (TBB == 0) return true; 442 443 // If there is some explicit branch to the fallthrough block, it can obviously 444 // reach, even though the branch should get folded to fall through implicitly. 445 if (MachineFunction::iterator(TBB) == Fallthrough || 446 MachineFunction::iterator(FBB) == Fallthrough) 447 return true; 448 449 // If it's an unconditional branch to some block not the fall through, it 450 // doesn't fall through. 451 if (Cond.empty()) return false; 452 453 // Otherwise, if it is conditional and has no explicit false block, it falls 454 // through. 455 return FBB == 0; 456} 457 458MachineBasicBlock * 459MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) { 460 MachineFunction *MF = getParent(); 461 DebugLoc dl; // FIXME: this is nowhere 462 463 // We may need to update this's terminator, but we can't do that if 464 // AnalyzeBranch fails. If this uses a jump table, we won't touch it. 465 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); 466 MachineBasicBlock *TBB = 0, *FBB = 0; 467 SmallVector<MachineOperand, 4> Cond; 468 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) 469 return NULL; 470 471 // Avoid bugpoint weirdness: A block may end with a conditional branch but 472 // jumps to the same MBB is either case. We have duplicate CFG edges in that 473 // case that we can't handle. Since this never happens in properly optimized 474 // code, just skip those edges. 475 if (TBB && TBB == FBB) { 476 DEBUG(dbgs() << "Won't split critical edge after degenerate BB#" 477 << getNumber() << '\n'); 478 return NULL; 479 } 480 481 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock(); 482 MF->insert(llvm::next(MachineFunction::iterator(this)), NMBB); 483 DEBUG(dbgs() << "Splitting critical edge:" 484 " BB#" << getNumber() 485 << " -- BB#" << NMBB->getNumber() 486 << " -- BB#" << Succ->getNumber() << '\n'); 487 488 // On some targets like Mips, branches may kill virtual registers. Make sure 489 // that LiveVariables is properly updated after updateTerminator replaces the 490 // terminators. 491 LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>(); 492 493 // Collect a list of virtual registers killed by the terminators. 494 SmallVector<unsigned, 4> KilledRegs; 495 if (LV) 496 for (iterator I = getFirstTerminator(), E = end(); I != E; ++I) { 497 MachineInstr *MI = I; 498 for (MachineInstr::mop_iterator OI = MI->operands_begin(), 499 OE = MI->operands_end(); OI != OE; ++OI) { 500 if (!OI->isReg() || !OI->isUse() || !OI->isKill() || OI->isUndef()) 501 continue; 502 unsigned Reg = OI->getReg(); 503 if (TargetRegisterInfo::isVirtualRegister(Reg) && 504 LV->getVarInfo(Reg).removeKill(MI)) { 505 KilledRegs.push_back(Reg); 506 DEBUG(dbgs() << "Removing terminator kill: " << *MI); 507 OI->setIsKill(false); 508 } 509 } 510 } 511 512 ReplaceUsesOfBlockWith(Succ, NMBB); 513 updateTerminator(); 514 515 // Insert unconditional "jump Succ" instruction in NMBB if necessary. 516 NMBB->addSuccessor(Succ); 517 if (!NMBB->isLayoutSuccessor(Succ)) { 518 Cond.clear(); 519 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, NULL, Cond, dl); 520 } 521 522 // Fix PHI nodes in Succ so they refer to NMBB instead of this 523 for (MachineBasicBlock::iterator i = Succ->begin(), e = Succ->end(); 524 i != e && i->isPHI(); ++i) 525 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2) 526 if (i->getOperand(ni+1).getMBB() == this) 527 i->getOperand(ni+1).setMBB(NMBB); 528 529 // Update LiveVariables. 530 if (LV) { 531 // Restore kills of virtual registers that were killed by the terminators. 532 while (!KilledRegs.empty()) { 533 unsigned Reg = KilledRegs.pop_back_val(); 534 for (iterator I = end(), E = begin(); I != E;) { 535 if (!(--I)->addRegisterKilled(Reg, NULL, /* addIfNotFound= */ false)) 536 continue; 537 LV->getVarInfo(Reg).Kills.push_back(I); 538 DEBUG(dbgs() << "Restored terminator kill: " << *I); 539 break; 540 } 541 } 542 // Update relevant live-through information. 543 LV->addNewBlock(NMBB, this, Succ); 544 } 545 546 if (MachineDominatorTree *MDT = 547 P->getAnalysisIfAvailable<MachineDominatorTree>()) { 548 // Update dominator information. 549 MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ); 550 551 bool IsNewIDom = true; 552 for (const_pred_iterator PI = Succ->pred_begin(), E = Succ->pred_end(); 553 PI != E; ++PI) { 554 MachineBasicBlock *PredBB = *PI; 555 if (PredBB == NMBB) 556 continue; 557 if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) { 558 IsNewIDom = false; 559 break; 560 } 561 } 562 563 // We know "this" dominates the newly created basic block. 564 MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this); 565 566 // If all the other predecessors of "Succ" are dominated by "Succ" itself 567 // then the new block is the new immediate dominator of "Succ". Otherwise, 568 // the new block doesn't dominate anything. 569 if (IsNewIDom) 570 MDT->changeImmediateDominator(SucccDTNode, NewDTNode); 571 } 572 573 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>()) 574 if (MachineLoop *TIL = MLI->getLoopFor(this)) { 575 // If one or the other blocks were not in a loop, the new block is not 576 // either, and thus LI doesn't need to be updated. 577 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) { 578 if (TIL == DestLoop) { 579 // Both in the same loop, the NMBB joins loop. 580 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); 581 } else if (TIL->contains(DestLoop)) { 582 // Edge from an outer loop to an inner loop. Add to the outer loop. 583 TIL->addBasicBlockToLoop(NMBB, MLI->getBase()); 584 } else if (DestLoop->contains(TIL)) { 585 // Edge from an inner loop to an outer loop. Add to the outer loop. 586 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); 587 } else { 588 // Edge from two loops with no containment relation. Because these 589 // are natural loops, we know that the destination block must be the 590 // header of its loop (adding a branch into a loop elsewhere would 591 // create an irreducible loop). 592 assert(DestLoop->getHeader() == Succ && 593 "Should not create irreducible loops!"); 594 if (MachineLoop *P = DestLoop->getParentLoop()) 595 P->addBasicBlockToLoop(NMBB, MLI->getBase()); 596 } 597 } 598 } 599 600 return NMBB; 601} 602 603/// removeFromParent - This method unlinks 'this' from the containing function, 604/// and returns it, but does not delete it. 605MachineBasicBlock *MachineBasicBlock::removeFromParent() { 606 assert(getParent() && "Not embedded in a function!"); 607 getParent()->remove(this); 608 return this; 609} 610 611 612/// eraseFromParent - This method unlinks 'this' from the containing function, 613/// and deletes it. 614void MachineBasicBlock::eraseFromParent() { 615 assert(getParent() && "Not embedded in a function!"); 616 getParent()->erase(this); 617} 618 619 620/// ReplaceUsesOfBlockWith - Given a machine basic block that branched to 621/// 'Old', change the code and CFG so that it branches to 'New' instead. 622void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old, 623 MachineBasicBlock *New) { 624 assert(Old != New && "Cannot replace self with self!"); 625 626 MachineBasicBlock::iterator I = end(); 627 while (I != begin()) { 628 --I; 629 if (!I->getDesc().isTerminator()) break; 630 631 // Scan the operands of this machine instruction, replacing any uses of Old 632 // with New. 633 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) 634 if (I->getOperand(i).isMBB() && 635 I->getOperand(i).getMBB() == Old) 636 I->getOperand(i).setMBB(New); 637 } 638 639 // Update the successor information. 640 removeSuccessor(Old); 641 addSuccessor(New); 642} 643 644/// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the 645/// CFG to be inserted. If we have proven that MBB can only branch to DestA and 646/// DestB, remove any other MBB successors from the CFG. DestA and DestB can be 647/// null. 648/// 649/// Besides DestA and DestB, retain other edges leading to LandingPads 650/// (currently there can be only one; we don't check or require that here). 651/// Note it is possible that DestA and/or DestB are LandingPads. 652bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA, 653 MachineBasicBlock *DestB, 654 bool isCond) { 655 // The values of DestA and DestB frequently come from a call to the 656 // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial 657 // values from there. 658 // 659 // 1. If both DestA and DestB are null, then the block ends with no branches 660 // (it falls through to its successor). 661 // 2. If DestA is set, DestB is null, and isCond is false, then the block ends 662 // with only an unconditional branch. 663 // 3. If DestA is set, DestB is null, and isCond is true, then the block ends 664 // with a conditional branch that falls through to a successor (DestB). 665 // 4. If DestA and DestB is set and isCond is true, then the block ends with a 666 // conditional branch followed by an unconditional branch. DestA is the 667 // 'true' destination and DestB is the 'false' destination. 668 669 bool Changed = false; 670 671 MachineFunction::iterator FallThru = 672 llvm::next(MachineFunction::iterator(this)); 673 674 if (DestA == 0 && DestB == 0) { 675 // Block falls through to successor. 676 DestA = FallThru; 677 DestB = FallThru; 678 } else if (DestA != 0 && DestB == 0) { 679 if (isCond) 680 // Block ends in conditional jump that falls through to successor. 681 DestB = FallThru; 682 } else { 683 assert(DestA && DestB && isCond && 684 "CFG in a bad state. Cannot correct CFG edges"); 685 } 686 687 // Remove superfluous edges. I.e., those which aren't destinations of this 688 // basic block, duplicate edges, or landing pads. 689 SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs; 690 MachineBasicBlock::succ_iterator SI = succ_begin(); 691 while (SI != succ_end()) { 692 const MachineBasicBlock *MBB = *SI; 693 if (!SeenMBBs.insert(MBB) || 694 (MBB != DestA && MBB != DestB && !MBB->isLandingPad())) { 695 // This is a superfluous edge, remove it. 696 SI = removeSuccessor(SI); 697 Changed = true; 698 } else { 699 ++SI; 700 } 701 } 702 703 return Changed; 704} 705 706/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping 707/// any DBG_VALUE instructions. Return UnknownLoc if there is none. 708DebugLoc 709MachineBasicBlock::findDebugLoc(MachineBasicBlock::iterator &MBBI) { 710 DebugLoc DL; 711 MachineBasicBlock::iterator E = end(); 712 if (MBBI != E) { 713 // Skip debug declarations, we don't want a DebugLoc from them. 714 MachineBasicBlock::iterator MBBI2 = MBBI; 715 while (MBBI2 != E && MBBI2->isDebugValue()) 716 MBBI2++; 717 if (MBBI2 != E) 718 DL = MBBI2->getDebugLoc(); 719 } 720 return DL; 721} 722 723void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB, 724 bool t) { 725 OS << "BB#" << MBB->getNumber(); 726} 727 728