MachineBasicBlock.cpp revision 5a96b3dad2f634c9081c8b2b6c2575441dc5a2bd
1//===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Collect the sequence of machine instructions for a basic block.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/MachineBasicBlock.h"
15#include "llvm/BasicBlock.h"
16#include "llvm/CodeGen/LiveVariables.h"
17#include "llvm/CodeGen/MachineDominators.h"
18#include "llvm/CodeGen/MachineFunction.h"
19#include "llvm/CodeGen/MachineLoopInfo.h"
20#include "llvm/CodeGen/SlotIndexes.h"
21#include "llvm/MC/MCAsmInfo.h"
22#include "llvm/MC/MCContext.h"
23#include "llvm/Target/TargetRegisterInfo.h"
24#include "llvm/Target/TargetData.h"
25#include "llvm/Target/TargetInstrInfo.h"
26#include "llvm/Target/TargetMachine.h"
27#include "llvm/Assembly/Writer.h"
28#include "llvm/ADT/SmallString.h"
29#include "llvm/ADT/SmallPtrSet.h"
30#include "llvm/Support/Debug.h"
31#include "llvm/Support/LeakDetector.h"
32#include "llvm/Support/raw_ostream.h"
33#include <algorithm>
34using namespace llvm;
35
36MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb)
37  : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false),
38    AddressTaken(false) {
39  Insts.Parent = this;
40}
41
42MachineBasicBlock::~MachineBasicBlock() {
43  LeakDetector::removeGarbageObject(this);
44}
45
46/// getSymbol - Return the MCSymbol for this basic block.
47///
48MCSymbol *MachineBasicBlock::getSymbol() const {
49  const MachineFunction *MF = getParent();
50  MCContext &Ctx = MF->getContext();
51  const char *Prefix = Ctx.getAsmInfo().getPrivateGlobalPrefix();
52  return Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" +
53                               Twine(MF->getFunctionNumber()) + "_" +
54                               Twine(getNumber()));
55}
56
57
58raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) {
59  MBB.print(OS);
60  return OS;
61}
62
63/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the
64/// parent pointer of the MBB, the MBB numbering, and any instructions in the
65/// MBB to be on the right operand list for registers.
66///
67/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it
68/// gets the next available unique MBB number. If it is removed from a
69/// MachineFunction, it goes back to being #-1.
70void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) {
71  MachineFunction &MF = *N->getParent();
72  N->Number = MF.addToMBBNumbering(N);
73
74  // Make sure the instructions have their operands in the reginfo lists.
75  MachineRegisterInfo &RegInfo = MF.getRegInfo();
76  for (MachineBasicBlock::insn_iterator I = N->insn_begin(), E = N->insn_end();
77       I != E; ++I)
78    I->AddRegOperandsToUseLists(RegInfo);
79
80  LeakDetector::removeGarbageObject(N);
81}
82
83void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) {
84  N->getParent()->removeFromMBBNumbering(N->Number);
85  N->Number = -1;
86  LeakDetector::addGarbageObject(N);
87}
88
89
90/// addNodeToList (MI) - When we add an instruction to a basic block
91/// list, we update its parent pointer and add its operands from reg use/def
92/// lists if appropriate.
93void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) {
94  assert(N->getParent() == 0 && "machine instruction already in a basic block");
95  N->setParent(Parent);
96
97  // Add the instruction's register operands to their corresponding
98  // use/def lists.
99  MachineFunction *MF = Parent->getParent();
100  N->AddRegOperandsToUseLists(MF->getRegInfo());
101
102  LeakDetector::removeGarbageObject(N);
103}
104
105/// removeNodeFromList (MI) - When we remove an instruction from a basic block
106/// list, we update its parent pointer and remove its operands from reg use/def
107/// lists if appropriate.
108void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) {
109  assert(N->getParent() != 0 && "machine instruction not in a basic block");
110
111  // Remove from the use/def lists.
112  N->RemoveRegOperandsFromUseLists();
113
114  N->setParent(0);
115
116  LeakDetector::addGarbageObject(N);
117}
118
119/// transferNodesFromList (MI) - When moving a range of instructions from one
120/// MBB list to another, we need to update the parent pointers and the use/def
121/// lists.
122void ilist_traits<MachineInstr>::
123transferNodesFromList(ilist_traits<MachineInstr> &fromList,
124                      ilist_iterator<MachineInstr> first,
125                      ilist_iterator<MachineInstr> last) {
126  assert(Parent->getParent() == fromList.Parent->getParent() &&
127        "MachineInstr parent mismatch!");
128
129  // Splice within the same MBB -> no change.
130  if (Parent == fromList.Parent) return;
131
132  // If splicing between two blocks within the same function, just update the
133  // parent pointers.
134  for (; first != last; ++first)
135    first->setParent(Parent);
136}
137
138void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) {
139  assert(!MI->getParent() && "MI is still in a block!");
140  Parent->getParent()->DeleteMachineInstr(MI);
141}
142
143MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() {
144  insn_iterator I = insn_begin();
145  while (I != end() && I->isPHI())
146    ++I;
147  assert(!I->isInsideBundle() && "First non-phi MI cannot be inside a bundle!");
148  return I;
149}
150
151MachineBasicBlock::iterator
152MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) {
153  while (I != end() && (I->isPHI() || I->isLabel() || I->isDebugValue()))
154    ++I;
155  // FIXME: This needs to change if we wish to bundle labels / dbg_values
156  // inside the bundle.
157  assert(!I->isInsideBundle() &&
158         "First non-phi / non-label instruction is inside a bundle!");
159  return I;
160}
161
162MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() {
163  iterator I = end();
164  while (I != begin() && ((--I)->isTerminator() || I->isDebugValue()))
165    ; /*noop */
166  while (I != end() && !I->isTerminator())
167    ++I;
168  return I;
169}
170
171MachineBasicBlock::const_iterator
172MachineBasicBlock::getFirstTerminator() const {
173  const_iterator I = end();
174  while (I != begin() && ((--I)->isTerminator() || I->isDebugValue()))
175    ; /*noop */
176  while (I != end() && !I->isTerminator())
177    ++I;
178  return I;
179}
180
181MachineBasicBlock::insn_iterator MachineBasicBlock::getFirstInsnTerminator() {
182  insn_iterator I = insn_end();
183  while (I != insn_begin() && ((--I)->isTerminator() || I->isDebugValue()))
184    ; /*noop */
185  while (I != insn_end() && !I->isTerminator())
186    ++I;
187  return I;
188}
189
190MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() {
191  // Skip over end-of-block dbg_value instructions.
192  insn_iterator B = insn_begin(), I = insn_end();
193  while (I != B) {
194    --I;
195    // Return instruction that starts a bundle.
196    if (I->isDebugValue() || I->isInsideBundle())
197      continue;
198    return I;
199  }
200  // The block is all debug values.
201  return end();
202}
203
204MachineBasicBlock::const_iterator
205MachineBasicBlock::getLastNonDebugInstr() const {
206  // Skip over end-of-block dbg_value instructions.
207  const_insn_iterator B = insn_begin(), I = insn_end();
208  while (I != B) {
209    --I;
210    // Return instruction that starts a bundle.
211    if (I->isDebugValue() || I->isInsideBundle())
212      continue;
213    return I;
214  }
215  // The block is all debug values.
216  return end();
217}
218
219const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const {
220  // A block with a landing pad successor only has one other successor.
221  if (succ_size() > 2)
222    return 0;
223  for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I)
224    if ((*I)->isLandingPad())
225      return *I;
226  return 0;
227}
228
229void MachineBasicBlock::dump() const {
230  print(dbgs());
231}
232
233StringRef MachineBasicBlock::getName() const {
234  if (const BasicBlock *LBB = getBasicBlock())
235    return LBB->getName();
236  else
237    return "(null)";
238}
239
240void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const {
241  const MachineFunction *MF = getParent();
242  if (!MF) {
243    OS << "Can't print out MachineBasicBlock because parent MachineFunction"
244       << " is null\n";
245    return;
246  }
247
248  if (Indexes)
249    OS << Indexes->getMBBStartIdx(this) << '\t';
250
251  OS << "BB#" << getNumber() << ": ";
252
253  const char *Comma = "";
254  if (const BasicBlock *LBB = getBasicBlock()) {
255    OS << Comma << "derived from LLVM BB ";
256    WriteAsOperand(OS, LBB, /*PrintType=*/false);
257    Comma = ", ";
258  }
259  if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; }
260  if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; }
261  if (Alignment) {
262    OS << Comma << "Align " << Alignment << " (" << (1u << Alignment)
263       << " bytes)";
264    Comma = ", ";
265  }
266
267  OS << '\n';
268
269  const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo();
270  if (!livein_empty()) {
271    if (Indexes) OS << '\t';
272    OS << "    Live Ins:";
273    for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I)
274      OS << ' ' << PrintReg(*I, TRI);
275    OS << '\n';
276  }
277  // Print the preds of this block according to the CFG.
278  if (!pred_empty()) {
279    if (Indexes) OS << '\t';
280    OS << "    Predecessors according to CFG:";
281    for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI)
282      OS << " BB#" << (*PI)->getNumber();
283    OS << '\n';
284  }
285
286  for (const_iterator I = begin(); I != end(); ++I) {
287    if (Indexes) {
288      if (Indexes->hasIndex(I))
289        OS << Indexes->getInstructionIndex(I);
290      OS << '\t';
291    }
292    OS << '\t';
293    I->print(OS, &getParent()->getTarget());
294  }
295
296  // Print the successors of this block according to the CFG.
297  if (!succ_empty()) {
298    if (Indexes) OS << '\t';
299    OS << "    Successors according to CFG:";
300    for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI)
301      OS << " BB#" << (*SI)->getNumber();
302    OS << '\n';
303  }
304}
305
306void MachineBasicBlock::removeLiveIn(unsigned Reg) {
307  std::vector<unsigned>::iterator I =
308    std::find(LiveIns.begin(), LiveIns.end(), Reg);
309  assert(I != LiveIns.end() && "Not a live in!");
310  LiveIns.erase(I);
311}
312
313bool MachineBasicBlock::isLiveIn(unsigned Reg) const {
314  livein_iterator I = std::find(livein_begin(), livein_end(), Reg);
315  return I != livein_end();
316}
317
318void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) {
319  getParent()->splice(NewAfter, this);
320}
321
322void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) {
323  MachineFunction::iterator BBI = NewBefore;
324  getParent()->splice(++BBI, this);
325}
326
327void MachineBasicBlock::updateTerminator() {
328  const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
329  // A block with no successors has no concerns with fall-through edges.
330  if (this->succ_empty()) return;
331
332  MachineBasicBlock *TBB = 0, *FBB = 0;
333  SmallVector<MachineOperand, 4> Cond;
334  DebugLoc dl;  // FIXME: this is nowhere
335  bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond);
336  (void) B;
337  assert(!B && "UpdateTerminators requires analyzable predecessors!");
338  if (Cond.empty()) {
339    if (TBB) {
340      // The block has an unconditional branch. If its successor is now
341      // its layout successor, delete the branch.
342      if (isLayoutSuccessor(TBB))
343        TII->RemoveBranch(*this);
344    } else {
345      // The block has an unconditional fallthrough. If its successor is not
346      // its layout successor, insert a branch. First we have to locate the
347      // only non-landing-pad successor, as that is the fallthrough block.
348      for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) {
349        if ((*SI)->isLandingPad())
350          continue;
351        assert(!TBB && "Found more than one non-landing-pad successor!");
352        TBB = *SI;
353      }
354
355      // If there is no non-landing-pad successor, the block has no
356      // fall-through edges to be concerned with.
357      if (!TBB)
358        return;
359
360      // Finally update the unconditional successor to be reached via a branch
361      // if it would not be reached by fallthrough.
362      if (!isLayoutSuccessor(TBB))
363        TII->InsertBranch(*this, TBB, 0, Cond, dl);
364    }
365  } else {
366    if (FBB) {
367      // The block has a non-fallthrough conditional branch. If one of its
368      // successors is its layout successor, rewrite it to a fallthrough
369      // conditional branch.
370      if (isLayoutSuccessor(TBB)) {
371        if (TII->ReverseBranchCondition(Cond))
372          return;
373        TII->RemoveBranch(*this);
374        TII->InsertBranch(*this, FBB, 0, Cond, dl);
375      } else if (isLayoutSuccessor(FBB)) {
376        TII->RemoveBranch(*this);
377        TII->InsertBranch(*this, TBB, 0, Cond, dl);
378      }
379    } else {
380      // The block has a fallthrough conditional branch.
381      MachineBasicBlock *MBBA = *succ_begin();
382      MachineBasicBlock *MBBB = *llvm::next(succ_begin());
383      if (MBBA == TBB) std::swap(MBBB, MBBA);
384      if (isLayoutSuccessor(TBB)) {
385        if (TII->ReverseBranchCondition(Cond)) {
386          // We can't reverse the condition, add an unconditional branch.
387          Cond.clear();
388          TII->InsertBranch(*this, MBBA, 0, Cond, dl);
389          return;
390        }
391        TII->RemoveBranch(*this);
392        TII->InsertBranch(*this, MBBA, 0, Cond, dl);
393      } else if (!isLayoutSuccessor(MBBA)) {
394        TII->RemoveBranch(*this);
395        TII->InsertBranch(*this, TBB, MBBA, Cond, dl);
396      }
397    }
398  }
399}
400
401void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ, uint32_t weight) {
402
403  // If we see non-zero value for the first time it means we actually use Weight
404  // list, so we fill all Weights with 0's.
405  if (weight != 0 && Weights.empty())
406    Weights.resize(Successors.size());
407
408  if (weight != 0 || !Weights.empty())
409    Weights.push_back(weight);
410
411   Successors.push_back(succ);
412   succ->addPredecessor(this);
413 }
414
415void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) {
416  succ->removePredecessor(this);
417  succ_iterator I = std::find(Successors.begin(), Successors.end(), succ);
418  assert(I != Successors.end() && "Not a current successor!");
419
420  // If Weight list is empty it means we don't use it (disabled optimization).
421  if (!Weights.empty()) {
422    weight_iterator WI = getWeightIterator(I);
423    Weights.erase(WI);
424  }
425
426  Successors.erase(I);
427}
428
429MachineBasicBlock::succ_iterator
430MachineBasicBlock::removeSuccessor(succ_iterator I) {
431  assert(I != Successors.end() && "Not a current successor!");
432
433  // If Weight list is empty it means we don't use it (disabled optimization).
434  if (!Weights.empty()) {
435    weight_iterator WI = getWeightIterator(I);
436    Weights.erase(WI);
437  }
438
439  (*I)->removePredecessor(this);
440  return Successors.erase(I);
441}
442
443void MachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old,
444                                         MachineBasicBlock *New) {
445  uint32_t weight = 0;
446  succ_iterator SI = std::find(Successors.begin(), Successors.end(), Old);
447
448  // If Weight list is empty it means we don't use it (disabled optimization).
449  if (!Weights.empty()) {
450    weight_iterator WI = getWeightIterator(SI);
451    weight = *WI;
452  }
453
454  // Update the successor information.
455  removeSuccessor(SI);
456  addSuccessor(New, weight);
457}
458
459void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) {
460  Predecessors.push_back(pred);
461}
462
463void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) {
464  pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred);
465  assert(I != Predecessors.end() && "Pred is not a predecessor of this block!");
466  Predecessors.erase(I);
467}
468
469void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) {
470  if (this == fromMBB)
471    return;
472
473  while (!fromMBB->succ_empty()) {
474    MachineBasicBlock *Succ = *fromMBB->succ_begin();
475    uint32_t weight = 0;
476
477
478    // If Weight list is empty it means we don't use it (disabled optimization).
479    if (!fromMBB->Weights.empty())
480      weight = *fromMBB->Weights.begin();
481
482    addSuccessor(Succ, weight);
483    fromMBB->removeSuccessor(Succ);
484  }
485}
486
487void
488MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB) {
489  if (this == fromMBB)
490    return;
491
492  while (!fromMBB->succ_empty()) {
493    MachineBasicBlock *Succ = *fromMBB->succ_begin();
494    addSuccessor(Succ);
495    fromMBB->removeSuccessor(Succ);
496
497    // Fix up any PHI nodes in the successor.
498    for (MachineBasicBlock::insn_iterator MI = Succ->insn_begin(),
499           ME = Succ->insn_end(); MI != ME && MI->isPHI(); ++MI)
500      for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) {
501        MachineOperand &MO = MI->getOperand(i);
502        if (MO.getMBB() == fromMBB)
503          MO.setMBB(this);
504      }
505  }
506}
507
508bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const {
509  const_succ_iterator I = std::find(Successors.begin(), Successors.end(), MBB);
510  return I != Successors.end();
511}
512
513bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const {
514  MachineFunction::const_iterator I(this);
515  return llvm::next(I) == MachineFunction::const_iterator(MBB);
516}
517
518bool MachineBasicBlock::canFallThrough() {
519  MachineFunction::iterator Fallthrough = this;
520  ++Fallthrough;
521  // If FallthroughBlock is off the end of the function, it can't fall through.
522  if (Fallthrough == getParent()->end())
523    return false;
524
525  // If FallthroughBlock isn't a successor, no fallthrough is possible.
526  if (!isSuccessor(Fallthrough))
527    return false;
528
529  // Analyze the branches, if any, at the end of the block.
530  MachineBasicBlock *TBB = 0, *FBB = 0;
531  SmallVector<MachineOperand, 4> Cond;
532  const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo();
533  if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) {
534    // If we couldn't analyze the branch, examine the last instruction.
535    // If the block doesn't end in a known control barrier, assume fallthrough
536    // is possible. The isPredicable check is needed because this code can be
537    // called during IfConversion, where an instruction which is normally a
538    // Barrier is predicated and thus no longer an actual control barrier. This
539    // is over-conservative though, because if an instruction isn't actually
540    // predicated we could still treat it like a barrier.
541    return empty() || !back().isBarrier() ||
542           back().isPredicable();
543  }
544
545  // If there is no branch, control always falls through.
546  if (TBB == 0) return true;
547
548  // If there is some explicit branch to the fallthrough block, it can obviously
549  // reach, even though the branch should get folded to fall through implicitly.
550  if (MachineFunction::iterator(TBB) == Fallthrough ||
551      MachineFunction::iterator(FBB) == Fallthrough)
552    return true;
553
554  // If it's an unconditional branch to some block not the fall through, it
555  // doesn't fall through.
556  if (Cond.empty()) return false;
557
558  // Otherwise, if it is conditional and has no explicit false block, it falls
559  // through.
560  return FBB == 0;
561}
562
563MachineBasicBlock *
564MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) {
565  MachineFunction *MF = getParent();
566  DebugLoc dl;  // FIXME: this is nowhere
567
568  // We may need to update this's terminator, but we can't do that if
569  // AnalyzeBranch fails. If this uses a jump table, we won't touch it.
570  const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
571  MachineBasicBlock *TBB = 0, *FBB = 0;
572  SmallVector<MachineOperand, 4> Cond;
573  if (TII->AnalyzeBranch(*this, TBB, FBB, Cond))
574    return NULL;
575
576  // Avoid bugpoint weirdness: A block may end with a conditional branch but
577  // jumps to the same MBB is either case. We have duplicate CFG edges in that
578  // case that we can't handle. Since this never happens in properly optimized
579  // code, just skip those edges.
580  if (TBB && TBB == FBB) {
581    DEBUG(dbgs() << "Won't split critical edge after degenerate BB#"
582                 << getNumber() << '\n');
583    return NULL;
584  }
585
586  MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock();
587  MF->insert(llvm::next(MachineFunction::iterator(this)), NMBB);
588  DEBUG(dbgs() << "Splitting critical edge:"
589        " BB#" << getNumber()
590        << " -- BB#" << NMBB->getNumber()
591        << " -- BB#" << Succ->getNumber() << '\n');
592
593  // On some targets like Mips, branches may kill virtual registers. Make sure
594  // that LiveVariables is properly updated after updateTerminator replaces the
595  // terminators.
596  LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>();
597
598  // Collect a list of virtual registers killed by the terminators.
599  SmallVector<unsigned, 4> KilledRegs;
600  if (LV)
601    for (insn_iterator I = getFirstInsnTerminator(), E = insn_end();
602         I != E; ++I) {
603      MachineInstr *MI = I;
604      for (MachineInstr::mop_iterator OI = MI->operands_begin(),
605           OE = MI->operands_end(); OI != OE; ++OI) {
606        if (!OI->isReg() || !OI->isUse() || !OI->isKill() || OI->isUndef())
607          continue;
608        unsigned Reg = OI->getReg();
609        if (TargetRegisterInfo::isVirtualRegister(Reg) &&
610            LV->getVarInfo(Reg).removeKill(MI)) {
611          KilledRegs.push_back(Reg);
612          DEBUG(dbgs() << "Removing terminator kill: " << *MI);
613          OI->setIsKill(false);
614        }
615      }
616    }
617
618  ReplaceUsesOfBlockWith(Succ, NMBB);
619  updateTerminator();
620
621  // Insert unconditional "jump Succ" instruction in NMBB if necessary.
622  NMBB->addSuccessor(Succ);
623  if (!NMBB->isLayoutSuccessor(Succ)) {
624    Cond.clear();
625    MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, NULL, Cond, dl);
626  }
627
628  // Fix PHI nodes in Succ so they refer to NMBB instead of this
629  for (MachineBasicBlock::insn_iterator
630         i = Succ->insn_begin(),e = Succ->insn_end(); i != e && i->isPHI(); ++i)
631    for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2)
632      if (i->getOperand(ni+1).getMBB() == this)
633        i->getOperand(ni+1).setMBB(NMBB);
634
635  // Inherit live-ins from the successor
636  for (MachineBasicBlock::livein_iterator I = Succ->livein_begin(),
637	 E = Succ->livein_end(); I != E; ++I)
638    NMBB->addLiveIn(*I);
639
640  // Update LiveVariables.
641  if (LV) {
642    // Restore kills of virtual registers that were killed by the terminators.
643    while (!KilledRegs.empty()) {
644      unsigned Reg = KilledRegs.pop_back_val();
645      for (insn_iterator I = insn_end(), E = insn_begin(); I != E;) {
646        if (!(--I)->addRegisterKilled(Reg, NULL, /* addIfNotFound= */ false))
647          continue;
648        LV->getVarInfo(Reg).Kills.push_back(I);
649        DEBUG(dbgs() << "Restored terminator kill: " << *I);
650        break;
651      }
652    }
653    // Update relevant live-through information.
654    LV->addNewBlock(NMBB, this, Succ);
655  }
656
657  if (MachineDominatorTree *MDT =
658      P->getAnalysisIfAvailable<MachineDominatorTree>()) {
659    // Update dominator information.
660    MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ);
661
662    bool IsNewIDom = true;
663    for (const_pred_iterator PI = Succ->pred_begin(), E = Succ->pred_end();
664         PI != E; ++PI) {
665      MachineBasicBlock *PredBB = *PI;
666      if (PredBB == NMBB)
667        continue;
668      if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) {
669        IsNewIDom = false;
670        break;
671      }
672    }
673
674    // We know "this" dominates the newly created basic block.
675    MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this);
676
677    // If all the other predecessors of "Succ" are dominated by "Succ" itself
678    // then the new block is the new immediate dominator of "Succ". Otherwise,
679    // the new block doesn't dominate anything.
680    if (IsNewIDom)
681      MDT->changeImmediateDominator(SucccDTNode, NewDTNode);
682  }
683
684  if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>())
685    if (MachineLoop *TIL = MLI->getLoopFor(this)) {
686      // If one or the other blocks were not in a loop, the new block is not
687      // either, and thus LI doesn't need to be updated.
688      if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) {
689        if (TIL == DestLoop) {
690          // Both in the same loop, the NMBB joins loop.
691          DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
692        } else if (TIL->contains(DestLoop)) {
693          // Edge from an outer loop to an inner loop.  Add to the outer loop.
694          TIL->addBasicBlockToLoop(NMBB, MLI->getBase());
695        } else if (DestLoop->contains(TIL)) {
696          // Edge from an inner loop to an outer loop.  Add to the outer loop.
697          DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase());
698        } else {
699          // Edge from two loops with no containment relation.  Because these
700          // are natural loops, we know that the destination block must be the
701          // header of its loop (adding a branch into a loop elsewhere would
702          // create an irreducible loop).
703          assert(DestLoop->getHeader() == Succ &&
704                 "Should not create irreducible loops!");
705          if (MachineLoop *P = DestLoop->getParentLoop())
706            P->addBasicBlockToLoop(NMBB, MLI->getBase());
707        }
708      }
709    }
710
711  return NMBB;
712}
713
714/// removeFromParent - This method unlinks 'this' from the containing function,
715/// and returns it, but does not delete it.
716MachineBasicBlock *MachineBasicBlock::removeFromParent() {
717  assert(getParent() && "Not embedded in a function!");
718  getParent()->remove(this);
719  return this;
720}
721
722
723/// eraseFromParent - This method unlinks 'this' from the containing function,
724/// and deletes it.
725void MachineBasicBlock::eraseFromParent() {
726  assert(getParent() && "Not embedded in a function!");
727  getParent()->erase(this);
728}
729
730
731/// ReplaceUsesOfBlockWith - Given a machine basic block that branched to
732/// 'Old', change the code and CFG so that it branches to 'New' instead.
733void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old,
734                                               MachineBasicBlock *New) {
735  assert(Old != New && "Cannot replace self with self!");
736
737  MachineBasicBlock::insn_iterator I = insn_end();
738  while (I != insn_begin()) {
739    --I;
740    if (!I->isTerminator()) break;
741
742    // Scan the operands of this machine instruction, replacing any uses of Old
743    // with New.
744    for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i)
745      if (I->getOperand(i).isMBB() &&
746          I->getOperand(i).getMBB() == Old)
747        I->getOperand(i).setMBB(New);
748  }
749
750  // Update the successor information.
751  replaceSuccessor(Old, New);
752}
753
754/// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the
755/// CFG to be inserted.  If we have proven that MBB can only branch to DestA and
756/// DestB, remove any other MBB successors from the CFG.  DestA and DestB can be
757/// null.
758///
759/// Besides DestA and DestB, retain other edges leading to LandingPads
760/// (currently there can be only one; we don't check or require that here).
761/// Note it is possible that DestA and/or DestB are LandingPads.
762bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA,
763                                             MachineBasicBlock *DestB,
764                                             bool isCond) {
765  // The values of DestA and DestB frequently come from a call to the
766  // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial
767  // values from there.
768  //
769  // 1. If both DestA and DestB are null, then the block ends with no branches
770  //    (it falls through to its successor).
771  // 2. If DestA is set, DestB is null, and isCond is false, then the block ends
772  //    with only an unconditional branch.
773  // 3. If DestA is set, DestB is null, and isCond is true, then the block ends
774  //    with a conditional branch that falls through to a successor (DestB).
775  // 4. If DestA and DestB is set and isCond is true, then the block ends with a
776  //    conditional branch followed by an unconditional branch. DestA is the
777  //    'true' destination and DestB is the 'false' destination.
778
779  bool Changed = false;
780
781  MachineFunction::iterator FallThru =
782    llvm::next(MachineFunction::iterator(this));
783
784  if (DestA == 0 && DestB == 0) {
785    // Block falls through to successor.
786    DestA = FallThru;
787    DestB = FallThru;
788  } else if (DestA != 0 && DestB == 0) {
789    if (isCond)
790      // Block ends in conditional jump that falls through to successor.
791      DestB = FallThru;
792  } else {
793    assert(DestA && DestB && isCond &&
794           "CFG in a bad state. Cannot correct CFG edges");
795  }
796
797  // Remove superfluous edges. I.e., those which aren't destinations of this
798  // basic block, duplicate edges, or landing pads.
799  SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs;
800  MachineBasicBlock::succ_iterator SI = succ_begin();
801  while (SI != succ_end()) {
802    const MachineBasicBlock *MBB = *SI;
803    if (!SeenMBBs.insert(MBB) ||
804        (MBB != DestA && MBB != DestB && !MBB->isLandingPad())) {
805      // This is a superfluous edge, remove it.
806      SI = removeSuccessor(SI);
807      Changed = true;
808    } else {
809      ++SI;
810    }
811  }
812
813  return Changed;
814}
815
816/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping
817/// any DBG_VALUE instructions.  Return UnknownLoc if there is none.
818DebugLoc
819MachineBasicBlock::findDebugLoc(insn_iterator MBBI) {
820  DebugLoc DL;
821  insn_iterator E = insn_end();
822  if (MBBI == E)
823    return DL;
824
825  // Skip debug declarations, we don't want a DebugLoc from them.
826  while (MBBI != E && MBBI->isDebugValue())
827    MBBI++;
828  if (MBBI != E)
829    DL = MBBI->getDebugLoc();
830  return DL;
831}
832
833/// getSuccWeight - Return weight of the edge from this block to MBB.
834///
835uint32_t MachineBasicBlock::getSuccWeight(MachineBasicBlock *succ) {
836  if (Weights.empty())
837    return 0;
838
839  succ_iterator I = std::find(Successors.begin(), Successors.end(), succ);
840  return *getWeightIterator(I);
841}
842
843/// getWeightIterator - Return wight iterator corresonding to the I successor
844/// iterator
845MachineBasicBlock::weight_iterator MachineBasicBlock::
846getWeightIterator(MachineBasicBlock::succ_iterator I) {
847  assert(Weights.size() == Successors.size() && "Async weight list!");
848  size_t index = std::distance(Successors.begin(), I);
849  assert(index < Weights.size() && "Not a current successor!");
850  return Weights.begin() + index;
851}
852
853void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB,
854                          bool t) {
855  OS << "BB#" << MBB->getNumber();
856}
857
858