MachineBasicBlock.cpp revision cbe3f5e1622b5f809bc04d61da125801e4658a73
1//===-- llvm/CodeGen/MachineBasicBlock.cpp ----------------------*- C++ -*-===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// Collect the sequence of machine instructions for a basic block. 11// 12//===----------------------------------------------------------------------===// 13 14#include "llvm/CodeGen/MachineBasicBlock.h" 15#include "llvm/ADT/SmallPtrSet.h" 16#include "llvm/ADT/SmallString.h" 17#include "llvm/Assembly/Writer.h" 18#include "llvm/CodeGen/LiveVariables.h" 19#include "llvm/CodeGen/MachineDominators.h" 20#include "llvm/CodeGen/MachineFunction.h" 21#include "llvm/CodeGen/MachineLoopInfo.h" 22#include "llvm/CodeGen/SlotIndexes.h" 23#include "llvm/IR/BasicBlock.h" 24#include "llvm/IR/DataLayout.h" 25#include "llvm/MC/MCAsmInfo.h" 26#include "llvm/MC/MCContext.h" 27#include "llvm/Support/Debug.h" 28#include "llvm/Support/LeakDetector.h" 29#include "llvm/Support/raw_ostream.h" 30#include "llvm/Target/TargetInstrInfo.h" 31#include "llvm/Target/TargetMachine.h" 32#include "llvm/Target/TargetRegisterInfo.h" 33#include <algorithm> 34using namespace llvm; 35 36MachineBasicBlock::MachineBasicBlock(MachineFunction &mf, const BasicBlock *bb) 37 : BB(bb), Number(-1), xParent(&mf), Alignment(0), IsLandingPad(false), 38 AddressTaken(false) { 39 Insts.Parent = this; 40} 41 42MachineBasicBlock::~MachineBasicBlock() { 43 LeakDetector::removeGarbageObject(this); 44} 45 46/// getSymbol - Return the MCSymbol for this basic block. 47/// 48MCSymbol *MachineBasicBlock::getSymbol() const { 49 const MachineFunction *MF = getParent(); 50 MCContext &Ctx = MF->getContext(); 51 const char *Prefix = Ctx.getAsmInfo().getPrivateGlobalPrefix(); 52 return Ctx.GetOrCreateSymbol(Twine(Prefix) + "BB" + 53 Twine(MF->getFunctionNumber()) + "_" + 54 Twine(getNumber())); 55} 56 57 58raw_ostream &llvm::operator<<(raw_ostream &OS, const MachineBasicBlock &MBB) { 59 MBB.print(OS); 60 return OS; 61} 62 63/// addNodeToList (MBB) - When an MBB is added to an MF, we need to update the 64/// parent pointer of the MBB, the MBB numbering, and any instructions in the 65/// MBB to be on the right operand list for registers. 66/// 67/// MBBs start out as #-1. When a MBB is added to a MachineFunction, it 68/// gets the next available unique MBB number. If it is removed from a 69/// MachineFunction, it goes back to being #-1. 70void ilist_traits<MachineBasicBlock>::addNodeToList(MachineBasicBlock *N) { 71 MachineFunction &MF = *N->getParent(); 72 N->Number = MF.addToMBBNumbering(N); 73 74 // Make sure the instructions have their operands in the reginfo lists. 75 MachineRegisterInfo &RegInfo = MF.getRegInfo(); 76 for (MachineBasicBlock::instr_iterator 77 I = N->instr_begin(), E = N->instr_end(); I != E; ++I) 78 I->AddRegOperandsToUseLists(RegInfo); 79 80 LeakDetector::removeGarbageObject(N); 81} 82 83void ilist_traits<MachineBasicBlock>::removeNodeFromList(MachineBasicBlock *N) { 84 N->getParent()->removeFromMBBNumbering(N->Number); 85 N->Number = -1; 86 LeakDetector::addGarbageObject(N); 87} 88 89 90/// addNodeToList (MI) - When we add an instruction to a basic block 91/// list, we update its parent pointer and add its operands from reg use/def 92/// lists if appropriate. 93void ilist_traits<MachineInstr>::addNodeToList(MachineInstr *N) { 94 assert(N->getParent() == 0 && "machine instruction already in a basic block"); 95 N->setParent(Parent); 96 97 // Add the instruction's register operands to their corresponding 98 // use/def lists. 99 MachineFunction *MF = Parent->getParent(); 100 N->AddRegOperandsToUseLists(MF->getRegInfo()); 101 102 LeakDetector::removeGarbageObject(N); 103} 104 105/// removeNodeFromList (MI) - When we remove an instruction from a basic block 106/// list, we update its parent pointer and remove its operands from reg use/def 107/// lists if appropriate. 108void ilist_traits<MachineInstr>::removeNodeFromList(MachineInstr *N) { 109 assert(N->getParent() != 0 && "machine instruction not in a basic block"); 110 111 // Remove from the use/def lists. 112 if (MachineFunction *MF = N->getParent()->getParent()) 113 N->RemoveRegOperandsFromUseLists(MF->getRegInfo()); 114 115 N->setParent(0); 116 117 LeakDetector::addGarbageObject(N); 118} 119 120/// transferNodesFromList (MI) - When moving a range of instructions from one 121/// MBB list to another, we need to update the parent pointers and the use/def 122/// lists. 123void ilist_traits<MachineInstr>:: 124transferNodesFromList(ilist_traits<MachineInstr> &fromList, 125 ilist_iterator<MachineInstr> first, 126 ilist_iterator<MachineInstr> last) { 127 assert(Parent->getParent() == fromList.Parent->getParent() && 128 "MachineInstr parent mismatch!"); 129 130 // Splice within the same MBB -> no change. 131 if (Parent == fromList.Parent) return; 132 133 // If splicing between two blocks within the same function, just update the 134 // parent pointers. 135 for (; first != last; ++first) 136 first->setParent(Parent); 137} 138 139void ilist_traits<MachineInstr>::deleteNode(MachineInstr* MI) { 140 assert(!MI->getParent() && "MI is still in a block!"); 141 Parent->getParent()->DeleteMachineInstr(MI); 142} 143 144MachineBasicBlock::iterator MachineBasicBlock::getFirstNonPHI() { 145 instr_iterator I = instr_begin(), E = instr_end(); 146 while (I != E && I->isPHI()) 147 ++I; 148 assert((I == E || !I->isInsideBundle()) && 149 "First non-phi MI cannot be inside a bundle!"); 150 return I; 151} 152 153MachineBasicBlock::iterator 154MachineBasicBlock::SkipPHIsAndLabels(MachineBasicBlock::iterator I) { 155 iterator E = end(); 156 while (I != E && (I->isPHI() || I->isLabel() || I->isDebugValue())) 157 ++I; 158 // FIXME: This needs to change if we wish to bundle labels / dbg_values 159 // inside the bundle. 160 assert((I == E || !I->isInsideBundle()) && 161 "First non-phi / non-label instruction is inside a bundle!"); 162 return I; 163} 164 165MachineBasicBlock::iterator MachineBasicBlock::getFirstTerminator() { 166 iterator B = begin(), E = end(), I = E; 167 while (I != B && ((--I)->isTerminator() || I->isDebugValue())) 168 ; /*noop */ 169 while (I != E && !I->isTerminator()) 170 ++I; 171 return I; 172} 173 174MachineBasicBlock::const_iterator 175MachineBasicBlock::getFirstTerminator() const { 176 const_iterator B = begin(), E = end(), I = E; 177 while (I != B && ((--I)->isTerminator() || I->isDebugValue())) 178 ; /*noop */ 179 while (I != E && !I->isTerminator()) 180 ++I; 181 return I; 182} 183 184MachineBasicBlock::instr_iterator MachineBasicBlock::getFirstInstrTerminator() { 185 instr_iterator B = instr_begin(), E = instr_end(), I = E; 186 while (I != B && ((--I)->isTerminator() || I->isDebugValue())) 187 ; /*noop */ 188 while (I != E && !I->isTerminator()) 189 ++I; 190 return I; 191} 192 193MachineBasicBlock::iterator MachineBasicBlock::getLastNonDebugInstr() { 194 // Skip over end-of-block dbg_value instructions. 195 instr_iterator B = instr_begin(), I = instr_end(); 196 while (I != B) { 197 --I; 198 // Return instruction that starts a bundle. 199 if (I->isDebugValue() || I->isInsideBundle()) 200 continue; 201 return I; 202 } 203 // The block is all debug values. 204 return end(); 205} 206 207MachineBasicBlock::const_iterator 208MachineBasicBlock::getLastNonDebugInstr() const { 209 // Skip over end-of-block dbg_value instructions. 210 const_instr_iterator B = instr_begin(), I = instr_end(); 211 while (I != B) { 212 --I; 213 // Return instruction that starts a bundle. 214 if (I->isDebugValue() || I->isInsideBundle()) 215 continue; 216 return I; 217 } 218 // The block is all debug values. 219 return end(); 220} 221 222const MachineBasicBlock *MachineBasicBlock::getLandingPadSuccessor() const { 223 // A block with a landing pad successor only has one other successor. 224 if (succ_size() > 2) 225 return 0; 226 for (const_succ_iterator I = succ_begin(), E = succ_end(); I != E; ++I) 227 if ((*I)->isLandingPad()) 228 return *I; 229 return 0; 230} 231 232#if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) 233void MachineBasicBlock::dump() const { 234 print(dbgs()); 235} 236#endif 237 238StringRef MachineBasicBlock::getName() const { 239 if (const BasicBlock *LBB = getBasicBlock()) 240 return LBB->getName(); 241 else 242 return "(null)"; 243} 244 245/// Return a hopefully unique identifier for this block. 246std::string MachineBasicBlock::getFullName() const { 247 std::string Name; 248 if (getParent()) 249 Name = (getParent()->getName() + ":").str(); 250 if (getBasicBlock()) 251 Name += getBasicBlock()->getName(); 252 else 253 Name += (Twine("BB") + Twine(getNumber())).str(); 254 return Name; 255} 256 257void MachineBasicBlock::print(raw_ostream &OS, SlotIndexes *Indexes) const { 258 const MachineFunction *MF = getParent(); 259 if (!MF) { 260 OS << "Can't print out MachineBasicBlock because parent MachineFunction" 261 << " is null\n"; 262 return; 263 } 264 265 if (Indexes) 266 OS << Indexes->getMBBStartIdx(this) << '\t'; 267 268 OS << "BB#" << getNumber() << ": "; 269 270 const char *Comma = ""; 271 if (const BasicBlock *LBB = getBasicBlock()) { 272 OS << Comma << "derived from LLVM BB "; 273 WriteAsOperand(OS, LBB, /*PrintType=*/false); 274 Comma = ", "; 275 } 276 if (isLandingPad()) { OS << Comma << "EH LANDING PAD"; Comma = ", "; } 277 if (hasAddressTaken()) { OS << Comma << "ADDRESS TAKEN"; Comma = ", "; } 278 if (Alignment) 279 OS << Comma << "Align " << Alignment << " (" << (1u << Alignment) 280 << " bytes)"; 281 282 OS << '\n'; 283 284 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 285 if (!livein_empty()) { 286 if (Indexes) OS << '\t'; 287 OS << " Live Ins:"; 288 for (livein_iterator I = livein_begin(),E = livein_end(); I != E; ++I) 289 OS << ' ' << PrintReg(*I, TRI); 290 OS << '\n'; 291 } 292 // Print the preds of this block according to the CFG. 293 if (!pred_empty()) { 294 if (Indexes) OS << '\t'; 295 OS << " Predecessors according to CFG:"; 296 for (const_pred_iterator PI = pred_begin(), E = pred_end(); PI != E; ++PI) 297 OS << " BB#" << (*PI)->getNumber(); 298 OS << '\n'; 299 } 300 301 for (const_instr_iterator I = instr_begin(); I != instr_end(); ++I) { 302 if (Indexes) { 303 if (Indexes->hasIndex(I)) 304 OS << Indexes->getInstructionIndex(I); 305 OS << '\t'; 306 } 307 OS << '\t'; 308 if (I->isInsideBundle()) 309 OS << " * "; 310 I->print(OS, &getParent()->getTarget()); 311 } 312 313 // Print the successors of this block according to the CFG. 314 if (!succ_empty()) { 315 if (Indexes) OS << '\t'; 316 OS << " Successors according to CFG:"; 317 for (const_succ_iterator SI = succ_begin(), E = succ_end(); SI != E; ++SI) { 318 OS << " BB#" << (*SI)->getNumber(); 319 if (!Weights.empty()) 320 OS << '(' << *getWeightIterator(SI) << ')'; 321 } 322 OS << '\n'; 323 } 324} 325 326void MachineBasicBlock::removeLiveIn(unsigned Reg) { 327 std::vector<unsigned>::iterator I = 328 std::find(LiveIns.begin(), LiveIns.end(), Reg); 329 if (I != LiveIns.end()) 330 LiveIns.erase(I); 331} 332 333bool MachineBasicBlock::isLiveIn(unsigned Reg) const { 334 livein_iterator I = std::find(livein_begin(), livein_end(), Reg); 335 return I != livein_end(); 336} 337 338void MachineBasicBlock::moveBefore(MachineBasicBlock *NewAfter) { 339 getParent()->splice(NewAfter, this); 340} 341 342void MachineBasicBlock::moveAfter(MachineBasicBlock *NewBefore) { 343 MachineFunction::iterator BBI = NewBefore; 344 getParent()->splice(++BBI, this); 345} 346 347void MachineBasicBlock::updateTerminator() { 348 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 349 // A block with no successors has no concerns with fall-through edges. 350 if (this->succ_empty()) return; 351 352 MachineBasicBlock *TBB = 0, *FBB = 0; 353 SmallVector<MachineOperand, 4> Cond; 354 DebugLoc dl; // FIXME: this is nowhere 355 bool B = TII->AnalyzeBranch(*this, TBB, FBB, Cond); 356 (void) B; 357 assert(!B && "UpdateTerminators requires analyzable predecessors!"); 358 if (Cond.empty()) { 359 if (TBB) { 360 // The block has an unconditional branch. If its successor is now 361 // its layout successor, delete the branch. 362 if (isLayoutSuccessor(TBB)) 363 TII->RemoveBranch(*this); 364 } else { 365 // The block has an unconditional fallthrough. If its successor is not 366 // its layout successor, insert a branch. First we have to locate the 367 // only non-landing-pad successor, as that is the fallthrough block. 368 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) { 369 if ((*SI)->isLandingPad()) 370 continue; 371 assert(!TBB && "Found more than one non-landing-pad successor!"); 372 TBB = *SI; 373 } 374 375 // If there is no non-landing-pad successor, the block has no 376 // fall-through edges to be concerned with. 377 if (!TBB) 378 return; 379 380 // Finally update the unconditional successor to be reached via a branch 381 // if it would not be reached by fallthrough. 382 if (!isLayoutSuccessor(TBB)) 383 TII->InsertBranch(*this, TBB, 0, Cond, dl); 384 } 385 } else { 386 if (FBB) { 387 // The block has a non-fallthrough conditional branch. If one of its 388 // successors is its layout successor, rewrite it to a fallthrough 389 // conditional branch. 390 if (isLayoutSuccessor(TBB)) { 391 if (TII->ReverseBranchCondition(Cond)) 392 return; 393 TII->RemoveBranch(*this); 394 TII->InsertBranch(*this, FBB, 0, Cond, dl); 395 } else if (isLayoutSuccessor(FBB)) { 396 TII->RemoveBranch(*this); 397 TII->InsertBranch(*this, TBB, 0, Cond, dl); 398 } 399 } else { 400 // Walk through the successors and find the successor which is not 401 // a landing pad and is not the conditional branch destination (in TBB) 402 // as the fallthrough successor. 403 MachineBasicBlock *FallthroughBB = 0; 404 for (succ_iterator SI = succ_begin(), SE = succ_end(); SI != SE; ++SI) { 405 if ((*SI)->isLandingPad() || *SI == TBB) 406 continue; 407 assert(!FallthroughBB && "Found more than one fallthrough successor."); 408 FallthroughBB = *SI; 409 } 410 if (!FallthroughBB && canFallThrough()) { 411 // We fallthrough to the same basic block as the conditional jump 412 // targets. Remove the conditional jump, leaving unconditional 413 // fallthrough. 414 // FIXME: This does not seem like a reasonable pattern to support, but it 415 // has been seen in the wild coming out of degenerate ARM test cases. 416 TII->RemoveBranch(*this); 417 418 // Finally update the unconditional successor to be reached via a branch 419 // if it would not be reached by fallthrough. 420 if (!isLayoutSuccessor(TBB)) 421 TII->InsertBranch(*this, TBB, 0, Cond, dl); 422 return; 423 } 424 425 // The block has a fallthrough conditional branch. 426 if (isLayoutSuccessor(TBB)) { 427 if (TII->ReverseBranchCondition(Cond)) { 428 // We can't reverse the condition, add an unconditional branch. 429 Cond.clear(); 430 TII->InsertBranch(*this, FallthroughBB, 0, Cond, dl); 431 return; 432 } 433 TII->RemoveBranch(*this); 434 TII->InsertBranch(*this, FallthroughBB, 0, Cond, dl); 435 } else if (!isLayoutSuccessor(FallthroughBB)) { 436 TII->RemoveBranch(*this); 437 TII->InsertBranch(*this, TBB, FallthroughBB, Cond, dl); 438 } 439 } 440 } 441} 442 443void MachineBasicBlock::addSuccessor(MachineBasicBlock *succ, uint32_t weight) { 444 445 // If we see non-zero value for the first time it means we actually use Weight 446 // list, so we fill all Weights with 0's. 447 if (weight != 0 && Weights.empty()) 448 Weights.resize(Successors.size()); 449 450 if (weight != 0 || !Weights.empty()) 451 Weights.push_back(weight); 452 453 Successors.push_back(succ); 454 succ->addPredecessor(this); 455 } 456 457void MachineBasicBlock::removeSuccessor(MachineBasicBlock *succ) { 458 succ->removePredecessor(this); 459 succ_iterator I = std::find(Successors.begin(), Successors.end(), succ); 460 assert(I != Successors.end() && "Not a current successor!"); 461 462 // If Weight list is empty it means we don't use it (disabled optimization). 463 if (!Weights.empty()) { 464 weight_iterator WI = getWeightIterator(I); 465 Weights.erase(WI); 466 } 467 468 Successors.erase(I); 469} 470 471MachineBasicBlock::succ_iterator 472MachineBasicBlock::removeSuccessor(succ_iterator I) { 473 assert(I != Successors.end() && "Not a current successor!"); 474 475 // If Weight list is empty it means we don't use it (disabled optimization). 476 if (!Weights.empty()) { 477 weight_iterator WI = getWeightIterator(I); 478 Weights.erase(WI); 479 } 480 481 (*I)->removePredecessor(this); 482 return Successors.erase(I); 483} 484 485void MachineBasicBlock::replaceSuccessor(MachineBasicBlock *Old, 486 MachineBasicBlock *New) { 487 if (Old == New) 488 return; 489 490 succ_iterator E = succ_end(); 491 succ_iterator NewI = E; 492 succ_iterator OldI = E; 493 for (succ_iterator I = succ_begin(); I != E; ++I) { 494 if (*I == Old) { 495 OldI = I; 496 if (NewI != E) 497 break; 498 } 499 if (*I == New) { 500 NewI = I; 501 if (OldI != E) 502 break; 503 } 504 } 505 assert(OldI != E && "Old is not a successor of this block"); 506 Old->removePredecessor(this); 507 508 // If New isn't already a successor, let it take Old's place. 509 if (NewI == E) { 510 New->addPredecessor(this); 511 *OldI = New; 512 return; 513 } 514 515 // New is already a successor. 516 // Update its weight instead of adding a duplicate edge. 517 if (!Weights.empty()) { 518 weight_iterator OldWI = getWeightIterator(OldI); 519 *getWeightIterator(NewI) += *OldWI; 520 Weights.erase(OldWI); 521 } 522 Successors.erase(OldI); 523} 524 525void MachineBasicBlock::addPredecessor(MachineBasicBlock *pred) { 526 Predecessors.push_back(pred); 527} 528 529void MachineBasicBlock::removePredecessor(MachineBasicBlock *pred) { 530 pred_iterator I = std::find(Predecessors.begin(), Predecessors.end(), pred); 531 assert(I != Predecessors.end() && "Pred is not a predecessor of this block!"); 532 Predecessors.erase(I); 533} 534 535void MachineBasicBlock::transferSuccessors(MachineBasicBlock *fromMBB) { 536 if (this == fromMBB) 537 return; 538 539 while (!fromMBB->succ_empty()) { 540 MachineBasicBlock *Succ = *fromMBB->succ_begin(); 541 uint32_t Weight = 0; 542 543 // If Weight list is empty it means we don't use it (disabled optimization). 544 if (!fromMBB->Weights.empty()) 545 Weight = *fromMBB->Weights.begin(); 546 547 addSuccessor(Succ, Weight); 548 fromMBB->removeSuccessor(Succ); 549 } 550} 551 552void 553MachineBasicBlock::transferSuccessorsAndUpdatePHIs(MachineBasicBlock *fromMBB) { 554 if (this == fromMBB) 555 return; 556 557 while (!fromMBB->succ_empty()) { 558 MachineBasicBlock *Succ = *fromMBB->succ_begin(); 559 uint32_t Weight = 0; 560 if (!fromMBB->Weights.empty()) 561 Weight = *fromMBB->Weights.begin(); 562 addSuccessor(Succ, Weight); 563 fromMBB->removeSuccessor(Succ); 564 565 // Fix up any PHI nodes in the successor. 566 for (MachineBasicBlock::instr_iterator MI = Succ->instr_begin(), 567 ME = Succ->instr_end(); MI != ME && MI->isPHI(); ++MI) 568 for (unsigned i = 2, e = MI->getNumOperands()+1; i != e; i += 2) { 569 MachineOperand &MO = MI->getOperand(i); 570 if (MO.getMBB() == fromMBB) 571 MO.setMBB(this); 572 } 573 } 574} 575 576bool MachineBasicBlock::isPredecessor(const MachineBasicBlock *MBB) const { 577 return std::find(pred_begin(), pred_end(), MBB) != pred_end(); 578} 579 580bool MachineBasicBlock::isSuccessor(const MachineBasicBlock *MBB) const { 581 return std::find(succ_begin(), succ_end(), MBB) != succ_end(); 582} 583 584bool MachineBasicBlock::isLayoutSuccessor(const MachineBasicBlock *MBB) const { 585 MachineFunction::const_iterator I(this); 586 return llvm::next(I) == MachineFunction::const_iterator(MBB); 587} 588 589bool MachineBasicBlock::canFallThrough() { 590 MachineFunction::iterator Fallthrough = this; 591 ++Fallthrough; 592 // If FallthroughBlock is off the end of the function, it can't fall through. 593 if (Fallthrough == getParent()->end()) 594 return false; 595 596 // If FallthroughBlock isn't a successor, no fallthrough is possible. 597 if (!isSuccessor(Fallthrough)) 598 return false; 599 600 // Analyze the branches, if any, at the end of the block. 601 MachineBasicBlock *TBB = 0, *FBB = 0; 602 SmallVector<MachineOperand, 4> Cond; 603 const TargetInstrInfo *TII = getParent()->getTarget().getInstrInfo(); 604 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) { 605 // If we couldn't analyze the branch, examine the last instruction. 606 // If the block doesn't end in a known control barrier, assume fallthrough 607 // is possible. The isPredicated check is needed because this code can be 608 // called during IfConversion, where an instruction which is normally a 609 // Barrier is predicated and thus no longer an actual control barrier. 610 return empty() || !back().isBarrier() || TII->isPredicated(&back()); 611 } 612 613 // If there is no branch, control always falls through. 614 if (TBB == 0) return true; 615 616 // If there is some explicit branch to the fallthrough block, it can obviously 617 // reach, even though the branch should get folded to fall through implicitly. 618 if (MachineFunction::iterator(TBB) == Fallthrough || 619 MachineFunction::iterator(FBB) == Fallthrough) 620 return true; 621 622 // If it's an unconditional branch to some block not the fall through, it 623 // doesn't fall through. 624 if (Cond.empty()) return false; 625 626 // Otherwise, if it is conditional and has no explicit false block, it falls 627 // through. 628 return FBB == 0; 629} 630 631MachineBasicBlock * 632MachineBasicBlock::SplitCriticalEdge(MachineBasicBlock *Succ, Pass *P) { 633 // Splitting the critical edge to a landing pad block is non-trivial. Don't do 634 // it in this generic function. 635 if (Succ->isLandingPad()) 636 return NULL; 637 638 MachineFunction *MF = getParent(); 639 DebugLoc dl; // FIXME: this is nowhere 640 641 // We may need to update this's terminator, but we can't do that if 642 // AnalyzeBranch fails. If this uses a jump table, we won't touch it. 643 const TargetInstrInfo *TII = MF->getTarget().getInstrInfo(); 644 MachineBasicBlock *TBB = 0, *FBB = 0; 645 SmallVector<MachineOperand, 4> Cond; 646 if (TII->AnalyzeBranch(*this, TBB, FBB, Cond)) 647 return NULL; 648 649 // Avoid bugpoint weirdness: A block may end with a conditional branch but 650 // jumps to the same MBB is either case. We have duplicate CFG edges in that 651 // case that we can't handle. Since this never happens in properly optimized 652 // code, just skip those edges. 653 if (TBB && TBB == FBB) { 654 DEBUG(dbgs() << "Won't split critical edge after degenerate BB#" 655 << getNumber() << '\n'); 656 return NULL; 657 } 658 659 MachineBasicBlock *NMBB = MF->CreateMachineBasicBlock(); 660 MF->insert(llvm::next(MachineFunction::iterator(this)), NMBB); 661 DEBUG(dbgs() << "Splitting critical edge:" 662 " BB#" << getNumber() 663 << " -- BB#" << NMBB->getNumber() 664 << " -- BB#" << Succ->getNumber() << '\n'); 665 SlotIndexes *Indexes = P->getAnalysisIfAvailable<SlotIndexes>(); 666 if (Indexes) 667 Indexes->insertMBBInMaps(NMBB); 668 669 // On some targets like Mips, branches may kill virtual registers. Make sure 670 // that LiveVariables is properly updated after updateTerminator replaces the 671 // terminators. 672 LiveVariables *LV = P->getAnalysisIfAvailable<LiveVariables>(); 673 674 // Collect a list of virtual registers killed by the terminators. 675 SmallVector<unsigned, 4> KilledRegs; 676 if (LV) 677 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end(); 678 I != E; ++I) { 679 MachineInstr *MI = I; 680 for (MachineInstr::mop_iterator OI = MI->operands_begin(), 681 OE = MI->operands_end(); OI != OE; ++OI) { 682 if (!OI->isReg() || OI->getReg() == 0 || 683 !OI->isUse() || !OI->isKill() || OI->isUndef()) 684 continue; 685 unsigned Reg = OI->getReg(); 686 if (TargetRegisterInfo::isPhysicalRegister(Reg) || 687 LV->getVarInfo(Reg).removeKill(MI)) { 688 KilledRegs.push_back(Reg); 689 DEBUG(dbgs() << "Removing terminator kill: " << *MI); 690 OI->setIsKill(false); 691 } 692 } 693 } 694 695 ReplaceUsesOfBlockWith(Succ, NMBB); 696 697 // If updateTerminator() removes instructions, we need to remove them from 698 // SlotIndexes. 699 SmallVector<MachineInstr*, 4> Terminators; 700 if (Indexes) { 701 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end(); 702 I != E; ++I) 703 Terminators.push_back(I); 704 } 705 706 updateTerminator(); 707 708 if (Indexes) { 709 SmallVector<MachineInstr*, 4> NewTerminators; 710 for (instr_iterator I = getFirstInstrTerminator(), E = instr_end(); 711 I != E; ++I) 712 NewTerminators.push_back(I); 713 714 for (SmallVectorImpl<MachineInstr*>::iterator I = Terminators.begin(), 715 E = Terminators.end(); I != E; ++I) { 716 if (std::find(NewTerminators.begin(), NewTerminators.end(), *I) == 717 NewTerminators.end()) 718 Indexes->removeMachineInstrFromMaps(*I); 719 } 720 } 721 722 // Insert unconditional "jump Succ" instruction in NMBB if necessary. 723 NMBB->addSuccessor(Succ); 724 if (!NMBB->isLayoutSuccessor(Succ)) { 725 Cond.clear(); 726 MF->getTarget().getInstrInfo()->InsertBranch(*NMBB, Succ, NULL, Cond, dl); 727 728 if (Indexes) { 729 for (instr_iterator I = NMBB->instr_begin(), E = NMBB->instr_end(); 730 I != E; ++I) { 731 // Some instructions may have been moved to NMBB by updateTerminator(), 732 // so we first remove any instruction that already has an index. 733 if (Indexes->hasIndex(I)) 734 Indexes->removeMachineInstrFromMaps(I); 735 Indexes->insertMachineInstrInMaps(I); 736 } 737 } 738 } 739 740 // Fix PHI nodes in Succ so they refer to NMBB instead of this 741 for (MachineBasicBlock::instr_iterator 742 i = Succ->instr_begin(),e = Succ->instr_end(); 743 i != e && i->isPHI(); ++i) 744 for (unsigned ni = 1, ne = i->getNumOperands(); ni != ne; ni += 2) 745 if (i->getOperand(ni+1).getMBB() == this) 746 i->getOperand(ni+1).setMBB(NMBB); 747 748 // Inherit live-ins from the successor 749 for (MachineBasicBlock::livein_iterator I = Succ->livein_begin(), 750 E = Succ->livein_end(); I != E; ++I) 751 NMBB->addLiveIn(*I); 752 753 // Update LiveVariables. 754 const TargetRegisterInfo *TRI = MF->getTarget().getRegisterInfo(); 755 if (LV) { 756 // Restore kills of virtual registers that were killed by the terminators. 757 while (!KilledRegs.empty()) { 758 unsigned Reg = KilledRegs.pop_back_val(); 759 for (instr_iterator I = instr_end(), E = instr_begin(); I != E;) { 760 if (!(--I)->addRegisterKilled(Reg, TRI, /* addIfNotFound= */ false)) 761 continue; 762 if (TargetRegisterInfo::isVirtualRegister(Reg)) 763 LV->getVarInfo(Reg).Kills.push_back(I); 764 DEBUG(dbgs() << "Restored terminator kill: " << *I); 765 break; 766 } 767 } 768 // Update relevant live-through information. 769 LV->addNewBlock(NMBB, this, Succ); 770 } 771 772 if (MachineDominatorTree *MDT = 773 P->getAnalysisIfAvailable<MachineDominatorTree>()) { 774 // Update dominator information. 775 MachineDomTreeNode *SucccDTNode = MDT->getNode(Succ); 776 777 bool IsNewIDom = true; 778 for (const_pred_iterator PI = Succ->pred_begin(), E = Succ->pred_end(); 779 PI != E; ++PI) { 780 MachineBasicBlock *PredBB = *PI; 781 if (PredBB == NMBB) 782 continue; 783 if (!MDT->dominates(SucccDTNode, MDT->getNode(PredBB))) { 784 IsNewIDom = false; 785 break; 786 } 787 } 788 789 // We know "this" dominates the newly created basic block. 790 MachineDomTreeNode *NewDTNode = MDT->addNewBlock(NMBB, this); 791 792 // If all the other predecessors of "Succ" are dominated by "Succ" itself 793 // then the new block is the new immediate dominator of "Succ". Otherwise, 794 // the new block doesn't dominate anything. 795 if (IsNewIDom) 796 MDT->changeImmediateDominator(SucccDTNode, NewDTNode); 797 } 798 799 if (MachineLoopInfo *MLI = P->getAnalysisIfAvailable<MachineLoopInfo>()) 800 if (MachineLoop *TIL = MLI->getLoopFor(this)) { 801 // If one or the other blocks were not in a loop, the new block is not 802 // either, and thus LI doesn't need to be updated. 803 if (MachineLoop *DestLoop = MLI->getLoopFor(Succ)) { 804 if (TIL == DestLoop) { 805 // Both in the same loop, the NMBB joins loop. 806 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); 807 } else if (TIL->contains(DestLoop)) { 808 // Edge from an outer loop to an inner loop. Add to the outer loop. 809 TIL->addBasicBlockToLoop(NMBB, MLI->getBase()); 810 } else if (DestLoop->contains(TIL)) { 811 // Edge from an inner loop to an outer loop. Add to the outer loop. 812 DestLoop->addBasicBlockToLoop(NMBB, MLI->getBase()); 813 } else { 814 // Edge from two loops with no containment relation. Because these 815 // are natural loops, we know that the destination block must be the 816 // header of its loop (adding a branch into a loop elsewhere would 817 // create an irreducible loop). 818 assert(DestLoop->getHeader() == Succ && 819 "Should not create irreducible loops!"); 820 if (MachineLoop *P = DestLoop->getParentLoop()) 821 P->addBasicBlockToLoop(NMBB, MLI->getBase()); 822 } 823 } 824 } 825 826 return NMBB; 827} 828 829/// Prepare MI to be removed from its bundle. This fixes bundle flags on MI's 830/// neighboring instructions so the bundle won't be broken by removing MI. 831static void unbundleSingleMI(MachineInstr *MI) { 832 // Removing the first instruction in a bundle. 833 if (MI->isBundledWithSucc() && !MI->isBundledWithPred()) 834 MI->unbundleFromSucc(); 835 // Removing the last instruction in a bundle. 836 if (MI->isBundledWithPred() && !MI->isBundledWithSucc()) 837 MI->unbundleFromPred(); 838 // If MI is not bundled, or if it is internal to a bundle, the neighbor flags 839 // are already fine. 840} 841 842MachineBasicBlock::instr_iterator 843MachineBasicBlock::erase(MachineBasicBlock::instr_iterator I) { 844 unbundleSingleMI(I); 845 return Insts.erase(I); 846} 847 848MachineInstr *MachineBasicBlock::remove_instr(MachineInstr *MI) { 849 unbundleSingleMI(MI); 850 MI->clearFlag(MachineInstr::BundledPred); 851 MI->clearFlag(MachineInstr::BundledSucc); 852 return Insts.remove(MI); 853} 854 855MachineBasicBlock::instr_iterator 856MachineBasicBlock::insert(instr_iterator I, MachineInstr *MI) { 857 assert(!MI->isBundledWithPred() && !MI->isBundledWithSucc() && 858 "Cannot insert instruction with bundle flags"); 859 // Set the bundle flags when inserting inside a bundle. 860 if (I != instr_end() && I->isBundledWithPred()) { 861 MI->setFlag(MachineInstr::BundledPred); 862 MI->setFlag(MachineInstr::BundledSucc); 863 } 864 return Insts.insert(I, MI); 865} 866 867/// removeFromParent - This method unlinks 'this' from the containing function, 868/// and returns it, but does not delete it. 869MachineBasicBlock *MachineBasicBlock::removeFromParent() { 870 assert(getParent() && "Not embedded in a function!"); 871 getParent()->remove(this); 872 return this; 873} 874 875 876/// eraseFromParent - This method unlinks 'this' from the containing function, 877/// and deletes it. 878void MachineBasicBlock::eraseFromParent() { 879 assert(getParent() && "Not embedded in a function!"); 880 getParent()->erase(this); 881} 882 883 884/// ReplaceUsesOfBlockWith - Given a machine basic block that branched to 885/// 'Old', change the code and CFG so that it branches to 'New' instead. 886void MachineBasicBlock::ReplaceUsesOfBlockWith(MachineBasicBlock *Old, 887 MachineBasicBlock *New) { 888 assert(Old != New && "Cannot replace self with self!"); 889 890 MachineBasicBlock::instr_iterator I = instr_end(); 891 while (I != instr_begin()) { 892 --I; 893 if (!I->isTerminator()) break; 894 895 // Scan the operands of this machine instruction, replacing any uses of Old 896 // with New. 897 for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) 898 if (I->getOperand(i).isMBB() && 899 I->getOperand(i).getMBB() == Old) 900 I->getOperand(i).setMBB(New); 901 } 902 903 // Update the successor information. 904 replaceSuccessor(Old, New); 905} 906 907/// CorrectExtraCFGEdges - Various pieces of code can cause excess edges in the 908/// CFG to be inserted. If we have proven that MBB can only branch to DestA and 909/// DestB, remove any other MBB successors from the CFG. DestA and DestB can be 910/// null. 911/// 912/// Besides DestA and DestB, retain other edges leading to LandingPads 913/// (currently there can be only one; we don't check or require that here). 914/// Note it is possible that DestA and/or DestB are LandingPads. 915bool MachineBasicBlock::CorrectExtraCFGEdges(MachineBasicBlock *DestA, 916 MachineBasicBlock *DestB, 917 bool isCond) { 918 // The values of DestA and DestB frequently come from a call to the 919 // 'TargetInstrInfo::AnalyzeBranch' method. We take our meaning of the initial 920 // values from there. 921 // 922 // 1. If both DestA and DestB are null, then the block ends with no branches 923 // (it falls through to its successor). 924 // 2. If DestA is set, DestB is null, and isCond is false, then the block ends 925 // with only an unconditional branch. 926 // 3. If DestA is set, DestB is null, and isCond is true, then the block ends 927 // with a conditional branch that falls through to a successor (DestB). 928 // 4. If DestA and DestB is set and isCond is true, then the block ends with a 929 // conditional branch followed by an unconditional branch. DestA is the 930 // 'true' destination and DestB is the 'false' destination. 931 932 bool Changed = false; 933 934 MachineFunction::iterator FallThru = 935 llvm::next(MachineFunction::iterator(this)); 936 937 if (DestA == 0 && DestB == 0) { 938 // Block falls through to successor. 939 DestA = FallThru; 940 DestB = FallThru; 941 } else if (DestA != 0 && DestB == 0) { 942 if (isCond) 943 // Block ends in conditional jump that falls through to successor. 944 DestB = FallThru; 945 } else { 946 assert(DestA && DestB && isCond && 947 "CFG in a bad state. Cannot correct CFG edges"); 948 } 949 950 // Remove superfluous edges. I.e., those which aren't destinations of this 951 // basic block, duplicate edges, or landing pads. 952 SmallPtrSet<const MachineBasicBlock*, 8> SeenMBBs; 953 MachineBasicBlock::succ_iterator SI = succ_begin(); 954 while (SI != succ_end()) { 955 const MachineBasicBlock *MBB = *SI; 956 if (!SeenMBBs.insert(MBB) || 957 (MBB != DestA && MBB != DestB && !MBB->isLandingPad())) { 958 // This is a superfluous edge, remove it. 959 SI = removeSuccessor(SI); 960 Changed = true; 961 } else { 962 ++SI; 963 } 964 } 965 966 return Changed; 967} 968 969/// findDebugLoc - find the next valid DebugLoc starting at MBBI, skipping 970/// any DBG_VALUE instructions. Return UnknownLoc if there is none. 971DebugLoc 972MachineBasicBlock::findDebugLoc(instr_iterator MBBI) { 973 DebugLoc DL; 974 instr_iterator E = instr_end(); 975 if (MBBI == E) 976 return DL; 977 978 // Skip debug declarations, we don't want a DebugLoc from them. 979 while (MBBI != E && MBBI->isDebugValue()) 980 MBBI++; 981 if (MBBI != E) 982 DL = MBBI->getDebugLoc(); 983 return DL; 984} 985 986/// getSuccWeight - Return weight of the edge from this block to MBB. 987/// 988uint32_t MachineBasicBlock::getSuccWeight(const_succ_iterator Succ) const { 989 if (Weights.empty()) 990 return 0; 991 992 return *getWeightIterator(Succ); 993} 994 995/// getWeightIterator - Return wight iterator corresonding to the I successor 996/// iterator 997MachineBasicBlock::weight_iterator MachineBasicBlock:: 998getWeightIterator(MachineBasicBlock::succ_iterator I) { 999 assert(Weights.size() == Successors.size() && "Async weight list!"); 1000 size_t index = std::distance(Successors.begin(), I); 1001 assert(index < Weights.size() && "Not a current successor!"); 1002 return Weights.begin() + index; 1003} 1004 1005/// getWeightIterator - Return wight iterator corresonding to the I successor 1006/// iterator 1007MachineBasicBlock::const_weight_iterator MachineBasicBlock:: 1008getWeightIterator(MachineBasicBlock::const_succ_iterator I) const { 1009 assert(Weights.size() == Successors.size() && "Async weight list!"); 1010 const size_t index = std::distance(Successors.begin(), I); 1011 assert(index < Weights.size() && "Not a current successor!"); 1012 return Weights.begin() + index; 1013} 1014 1015/// Return whether (physical) register "Reg" has been <def>ined and not <kill>ed 1016/// as of just before "MI". 1017/// 1018/// Search is localised to a neighborhood of 1019/// Neighborhood instructions before (searching for defs or kills) and N 1020/// instructions after (searching just for defs) MI. 1021MachineBasicBlock::LivenessQueryResult 1022MachineBasicBlock::computeRegisterLiveness(const TargetRegisterInfo *TRI, 1023 unsigned Reg, MachineInstr *MI, 1024 unsigned Neighborhood) { 1025 unsigned N = Neighborhood; 1026 MachineBasicBlock *MBB = MI->getParent(); 1027 1028 // Start by searching backwards from MI, looking for kills, reads or defs. 1029 1030 MachineBasicBlock::iterator I(MI); 1031 // If this is the first insn in the block, don't search backwards. 1032 if (I != MBB->begin()) { 1033 do { 1034 --I; 1035 1036 MachineOperandIteratorBase::PhysRegInfo Analysis = 1037 MIOperands(I).analyzePhysReg(Reg, TRI); 1038 1039 if (Analysis.Defines) 1040 // Outputs happen after inputs so they take precedence if both are 1041 // present. 1042 return Analysis.DefinesDead ? LQR_Dead : LQR_Live; 1043 1044 if (Analysis.Kills || Analysis.Clobbers) 1045 // Register killed, so isn't live. 1046 return LQR_Dead; 1047 1048 else if (Analysis.ReadsOverlap) 1049 // Defined or read without a previous kill - live. 1050 return Analysis.Reads ? LQR_Live : LQR_OverlappingLive; 1051 1052 } while (I != MBB->begin() && --N > 0); 1053 } 1054 1055 // Did we get to the start of the block? 1056 if (I == MBB->begin()) { 1057 // If so, the register's state is definitely defined by the live-in state. 1058 for (MCRegAliasIterator RAI(Reg, TRI, /*IncludeSelf=*/true); 1059 RAI.isValid(); ++RAI) { 1060 if (MBB->isLiveIn(*RAI)) 1061 return (*RAI == Reg) ? LQR_Live : LQR_OverlappingLive; 1062 } 1063 1064 return LQR_Dead; 1065 } 1066 1067 N = Neighborhood; 1068 1069 // Try searching forwards from MI, looking for reads or defs. 1070 I = MachineBasicBlock::iterator(MI); 1071 // If this is the last insn in the block, don't search forwards. 1072 if (I != MBB->end()) { 1073 for (++I; I != MBB->end() && N > 0; ++I, --N) { 1074 MachineOperandIteratorBase::PhysRegInfo Analysis = 1075 MIOperands(I).analyzePhysReg(Reg, TRI); 1076 1077 if (Analysis.ReadsOverlap) 1078 // Used, therefore must have been live. 1079 return (Analysis.Reads) ? 1080 LQR_Live : LQR_OverlappingLive; 1081 1082 else if (Analysis.Clobbers || Analysis.Defines) 1083 // Defined (but not read) therefore cannot have been live. 1084 return LQR_Dead; 1085 } 1086 } 1087 1088 // At this point we have no idea of the liveness of the register. 1089 return LQR_Unknown; 1090} 1091 1092void llvm::WriteAsOperand(raw_ostream &OS, const MachineBasicBlock *MBB, 1093 bool t) { 1094 OS << "BB#" << MBB->getNumber(); 1095} 1096 1097