MachineInstr.cpp revision 3bc1a3735f216f4a122fe4a05d39f63888ab205a
1e138b3dd1ff02d826233482831318708a166ed93Chris Lattner//===-- lib/CodeGen/MachineInstr.cpp --------------------------------------===// 2edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman// 3b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell// The LLVM Compiler Infrastructure 4b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman// 8b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell//===----------------------------------------------------------------------===// 921326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke// 1021326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke// Methods common to all machine instructions. 1121326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke// 12035dfbe7f2d109008d2d62d9f2a67efb477a7ab6Chris Lattner//===----------------------------------------------------------------------===// 1370bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve 14822b4fb896846b87dd11a330ae13f2239329aeefChris Lattner#include "llvm/CodeGen/MachineInstr.h" 15fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng#include "llvm/Constants.h" 16fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng#include "llvm/InlineAsm.h" 1784bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#include "llvm/Value.h" 188517e1f0beea9b5e47974f083396d53294c390adChris Lattner#include "llvm/CodeGen/MachineFunction.h" 1962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner#include "llvm/CodeGen/MachineRegisterInfo.h" 2069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman#include "llvm/CodeGen/PseudoSourceValue.h" 211049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner#include "llvm/Target/TargetMachine.h" 22bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng#include "llvm/Target/TargetInstrInfo.h" 23f14cf85e334ff03bbdd23e473f14ffa4fb025e94Chris Lattner#include "llvm/Target/TargetInstrDesc.h" 246f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#include "llvm/Target/TargetRegisterInfo.h" 252c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman#include "llvm/Support/LeakDetector.h" 26ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman#include "llvm/Support/MathExtras.h" 27a09362eb975730ac624c0bd210a95655ee105296Bill Wendling#include "llvm/Support/Streams.h" 28edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner#include "llvm/Support/raw_ostream.h" 29b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman#include "llvm/ADT/FoldingSet.h" 30c21c5eeb4f56f160e79522df2d3aab5cfe73c05dJeff Cohen#include <ostream> 310742b59913a7760eb26f08121cd244a37e83e3b3Chris Lattnerusing namespace llvm; 32d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 33f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 34f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner// MachineOperand Implementation 35f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 36f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 3762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// AddRegOperandToRegInfo - Add this register operand to the specified 3862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// MachineRegisterInfo. If it is null, then the next/prev fields should be 3962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// explicitly nulled out. 4062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) { 41d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman assert(isReg() && "Can only add reg operand to use lists"); 4262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 4362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If the reginfo pointer is null, just explicitly null out or next/prev 4462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // pointers, to ensure they are not garbage. 4562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo == 0) { 4662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.Prev = 0; 4762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.Next = 0; 4862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 4962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 5062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 5162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, add this operand to the head of the registers use/def list. 5280fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg()); 5362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 5480fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner // For SSA values, we prefer to keep the definition at the start of the list. 5580fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner // we do this by skipping over the definition if it is at the head of the 5680fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner // list. 5780fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner if (*Head && (*Head)->isDef()) 5880fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner Head = &(*Head)->Contents.Reg.Next; 5980fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner 6080fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner Contents.Reg.Next = *Head; 6162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Contents.Reg.Next) { 6262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert(getReg() == Contents.Reg.Next->getReg() && 6362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner "Different regs on the same list!"); 6462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.Next->Contents.Reg.Prev = &Contents.Reg.Next; 6562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 6662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 6780fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner Contents.Reg.Prev = Head; 6880fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner *Head = this; 6962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 7062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 713bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman/// RemoveRegOperandFromRegInfo - Remove this register operand from the 723bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman/// MachineRegisterInfo it is linked with. 733bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohmanvoid MachineOperand::RemoveRegOperandFromRegInfo() { 743bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman assert(isOnRegUseList() && "Reg operand is not on a use list"); 753bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman // Unlink this from the doubly linked list of operands. 763bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman MachineOperand *NextOp = Contents.Reg.Next; 773bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman *Contents.Reg.Prev = NextOp; 783bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman if (NextOp) { 793bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman assert(NextOp->getReg() == getReg() && "Corrupt reg use/def chain!"); 803bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman NextOp->Contents.Reg.Prev = Contents.Reg.Prev; 813bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman } 823bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman Contents.Reg.Prev = 0; 833bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman Contents.Reg.Next = 0; 843bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman} 853bc1a3735f216f4a122fe4a05d39f63888ab205aDan Gohman 8662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::setReg(unsigned Reg) { 8762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (getReg() == Reg) return; // No change. 8862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 8962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we have to change the register. If this operand is embedded 9062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // into a machine function, we need to update the old and new register's 9162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // use/def lists. 9262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineInstr *MI = getParent()) 9362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineBasicBlock *MBB = MI->getParent()) 9462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineFunction *MF = MBB->getParent()) { 9562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner RemoveRegOperandFromRegInfo(); 9662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.RegNo = Reg; 9762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner AddRegOperandToRegInfo(&MF->getRegInfo()); 9862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 9962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 10062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 10162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, just change the register, no problem. :) 10262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.RegNo = Reg; 10362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 10462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 10562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// ChangeToImmediate - Replace this operand with a new immediate operand of 10662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the specified value. If an operand is known to be an immediate already, 10762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the setImm method should be used. 10862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::ChangeToImmediate(int64_t ImmVal) { 10962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this operand is currently a register operand, and if this is in a 11062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // function, deregister the operand from the register's use/def list. 111d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (isReg() && getParent() && getParent()->getParent() && 11262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner getParent()->getParent()->getParent()) 11362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner RemoveRegOperandFromRegInfo(); 11462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 11562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner OpKind = MO_Immediate; 11662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.ImmVal = ImmVal; 11762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 11862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 11962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// ChangeToRegister - Replace this operand with a new register operand of 12062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the specified value. If an operand is known to be an register already, 12162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the setReg method should be used. 12262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, 123e009180f2bbcf5edbe3b583936c37c4b3be2d082Dale Johannesen bool isKill, bool isDead) { 12462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this operand is already a register operand, use setReg to update the 12562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // register's use/def lists. 126d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (isReg()) { 127e009180f2bbcf5edbe3b583936c37c4b3be2d082Dale Johannesen assert(!isEarlyClobber()); 12862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner setReg(Reg); 12962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } else { 13062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, change this to a register and set the reg#. 13162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner OpKind = MO_Register; 13262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.RegNo = Reg; 13362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 13462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this operand is embedded in a function, add the operand to the 13562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // register's use/def list. 13662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineInstr *MI = getParent()) 13762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineBasicBlock *MBB = MI->getParent()) 13862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineFunction *MF = MBB->getParent()) 13962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner AddRegOperandToRegInfo(&MF->getRegInfo()); 14062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 14162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 14262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsDef = isDef; 14362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsImp = isImp; 14462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsKill = isKill; 14562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsDead = isDead; 146e009180f2bbcf5edbe3b583936c37c4b3be2d082Dale Johannesen IsEarlyClobber = false; 14762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner SubReg = 0; 14862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 14962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 150f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// isIdenticalTo - Return true if this operand is identical to the specified 151f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// operand. 152f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattnerbool MachineOperand::isIdenticalTo(const MachineOperand &Other) const { 153f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getType() != Other.getType()) return false; 154f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 155f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner switch (getType()) { 156f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner default: assert(0 && "Unrecognized operand type"); 157f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Register: 158f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getReg() == Other.getReg() && isDef() == Other.isDef() && 159f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getSubReg() == Other.getSubReg(); 160f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Immediate: 161f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getImm() == Other.getImm(); 162e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman case MachineOperand::MO_FPImmediate: 163e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman return getFPImm() == Other.getFPImm(); 164f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_MachineBasicBlock: 165f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getMBB() == Other.getMBB(); 166f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_FrameIndex: 1678aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner return getIndex() == Other.getIndex(); 168f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ConstantPoolIndex: 1698aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner return getIndex() == Other.getIndex() && getOffset() == Other.getOffset(); 170f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_JumpTableIndex: 1718aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner return getIndex() == Other.getIndex(); 172f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_GlobalAddress: 173f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset(); 174f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ExternalSymbol: 175f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return !strcmp(getSymbolName(), Other.getSymbolName()) && 176f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getOffset() == Other.getOffset(); 177f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 178f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner} 179f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 180f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// print - Print the specified machine operand. 181f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// 182f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattnervoid MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const { 1835ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang raw_os_ostream RawOS(OS); 1845ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang print(RawOS, TM); 1855ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang} 1865ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang 1875ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wangvoid MachineOperand::print(raw_ostream &OS, const TargetMachine *TM) const { 188f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner switch (getType()) { 189f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Register: 1906f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman if (getReg() == 0 || TargetRegisterInfo::isVirtualRegister(getReg())) { 191f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "%reg" << getReg(); 192f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } else { 193f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner // If the instruction is embedded into a basic block, we can find the 19462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // target info for the instruction. 195f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (TM == 0) 196f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (const MachineInstr *MI = getParent()) 197f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (const MachineBasicBlock *MBB = MI->getParent()) 198f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (const MachineFunction *MF = MBB->getParent()) 199f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner TM = &MF->getTarget(); 200f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 201f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (TM) 202e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling OS << "%" << TM->getRegisterInfo()->get(getReg()).Name; 203f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner else 204f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "%mreg" << getReg(); 205f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 2062ccc83966914593d98af5671ce10a3bf2dcf7513Dan Gohman 2072ccc83966914593d98af5671ce10a3bf2dcf7513Dan Gohman if (getSubReg() != 0) { 2082ccc83966914593d98af5671ce10a3bf2dcf7513Dan Gohman OS << ":" << getSubReg(); 2092ccc83966914593d98af5671ce10a3bf2dcf7513Dan Gohman } 2102ccc83966914593d98af5671ce10a3bf2dcf7513Dan Gohman 21186b49f8e2de796cb46c7c8b6a4c4900533fd53f4Dale Johannesen if (isDef() || isKill() || isDead() || isImplicit() || isEarlyClobber()) { 212f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "<"; 213f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner bool NeedComma = false; 214f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (isImplicit()) { 21591aac1015e6714d959801dd8d60f55a72827dc4dDale Johannesen if (NeedComma) OS << ","; 216f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << (isDef() ? "imp-def" : "imp-use"); 217f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner NeedComma = true; 218f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } else if (isDef()) { 21991aac1015e6714d959801dd8d60f55a72827dc4dDale Johannesen if (NeedComma) OS << ","; 220913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen if (isEarlyClobber()) 221913d3dfac43f29921467f33aa743f28ee1bfc5d1Dale Johannesen OS << "earlyclobber,"; 222f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "def"; 223f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner NeedComma = true; 224f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 225f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (isKill() || isDead()) { 226181eb737b28628adc4376b973610a02039385026Bill Wendling if (NeedComma) OS << ","; 227181eb737b28628adc4376b973610a02039385026Bill Wendling if (isKill()) OS << "kill"; 228181eb737b28628adc4376b973610a02039385026Bill Wendling if (isDead()) OS << "dead"; 229f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 230f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 231f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 232f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 233f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Immediate: 234f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << getImm(); 235f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 236e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman case MachineOperand::MO_FPImmediate: 237e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman if (getFPImm()->getType() == Type::FloatTy) { 238e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman OS << getFPImm()->getValueAPF().convertToFloat(); 239e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman } else { 240e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman OS << getFPImm()->getValueAPF().convertToDouble(); 241e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman } 242e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman break; 243f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_MachineBasicBlock: 244f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "mbb<" 2458aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner << ((Value*)getMBB()->getBasicBlock())->getName() 2468aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner << "," << (void*)getMBB() << ">"; 247f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 248f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_FrameIndex: 2498aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner OS << "<fi#" << getIndex() << ">"; 250f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 251f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ConstantPoolIndex: 2528aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner OS << "<cp#" << getIndex(); 253f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getOffset()) OS << "+" << getOffset(); 254f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 255f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 256f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_JumpTableIndex: 2578aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner OS << "<jt#" << getIndex() << ">"; 258f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 259f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_GlobalAddress: 260f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "<ga:" << ((Value*)getGlobal())->getName(); 261f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getOffset()) OS << "+" << getOffset(); 262f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 263f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 264f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ExternalSymbol: 265f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "<es:" << getSymbolName(); 266f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getOffset()) OS << "+" << getOffset(); 267f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 268f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 269f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner default: 270f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner assert(0 && "Unrecognized operand type"); 271f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 272f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner} 273f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 274f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 275ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman// MachineMemOperand Implementation 276ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman//===----------------------------------------------------------------------===// 277ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman 278ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan GohmanMachineMemOperand::MachineMemOperand(const Value *v, unsigned int f, 279ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman int64_t o, uint64_t s, unsigned int a) 280ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman : Offset(o), Size(s), V(v), 281ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman Flags((f & 7) | ((Log2_32(a) + 1) << 3)) { 282f1bf29e648a25a440d3dcf5a445b30c4129c9bcaDan Gohman assert(isPowerOf2_32(a) && "Alignment is not a power of 2!"); 283c5e1f98fdf44993c2bfe4c1ef633b2358cd718c1Dan Gohman assert((isLoad() || isStore()) && "Not a load/store!"); 284ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman} 285ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman 286b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman/// Profile - Gather unique data for the object. 287b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman/// 288b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohmanvoid MachineMemOperand::Profile(FoldingSetNodeID &ID) const { 289b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman ID.AddInteger(Offset); 290b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman ID.AddInteger(Size); 291b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman ID.AddPointer(V); 292b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman ID.AddInteger(Flags); 293b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman} 294b8d2f550b84523e8a73198f98e5d450ec3b4fee7Dan Gohman 295ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman//===----------------------------------------------------------------------===// 296f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner// MachineInstr Implementation 297f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 298f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 299c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// MachineInstr ctor - This constructor creates a dummy MachineInstr with 30067f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng/// TID NULL and no operands. 301c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan ChengMachineInstr::MachineInstr() 30206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen : TID(0), NumImplicitOps(0), Parent(0), debugLoc(DebugLoc::getUnknownLoc()) { 3032c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman // Make sure that we get added to a machine basicblock 3042c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman LeakDetector::addGarbageObject(this); 3057279122e668816bed0d4f38d3392bbab0140fad0Chris Lattner} 3067279122e668816bed0d4f38d3392bbab0140fad0Chris Lattner 30767f660cb080965ea93ed6d7265a67100f2fe38e4Evan Chengvoid MachineInstr::addImplicitDefUseOperands() { 30867f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitDefs) 309a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7dChris Lattner for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) 3108019f41c0b7fda031d494e3900eada7d4e494772Chris Lattner addOperand(MachineOperand::CreateReg(*ImpDefs, true, true)); 31167f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitUses) 312a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7dChris Lattner for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) 3138019f41c0b7fda031d494e3900eada7d4e494772Chris Lattner addOperand(MachineOperand::CreateReg(*ImpUses, false, true)); 314d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng} 315d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 316d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng/// MachineInstr ctor - This constructor create a MachineInstr and add the 317c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// implicit operands. It reserves space for number of operands specified by 318749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner/// TargetInstrDesc or the numOperands if it is not zero. (for 319c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// instructions with variable number of operands). 320749c6f6b5ed301c84aac562e414486549d7b98ebChris LattnerMachineInstr::MachineInstr(const TargetInstrDesc &tid, bool NoImp) 32106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen : TID(&tid), NumImplicitOps(0), Parent(0), 32206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen debugLoc(DebugLoc::getUnknownLoc()) { 323349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner if (!NoImp && TID->getImplicitDefs()) 324349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs) 325d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 326349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner if (!NoImp && TID->getImplicitUses()) 327349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses) 328d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 329349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner Operands.reserve(NumImplicitOps + TID->getNumOperands()); 330fa9457276a2174aaf302240dd32d89900ad021aeEvan Cheng if (!NoImp) 331fa9457276a2174aaf302240dd32d89900ad021aeEvan Cheng addImplicitDefUseOperands(); 3322c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman // Make sure that we get added to a machine basicblock 3332c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman LeakDetector::addGarbageObject(this); 334d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng} 335d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 33606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen/// MachineInstr ctor - As above, but with a DebugLoc. 33706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale JohannesenMachineInstr::MachineInstr(const TargetInstrDesc &tid, const DebugLoc dl, 33806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen bool NoImp) 33906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen : TID(&tid), NumImplicitOps(0), Parent(0), debugLoc(dl) { 34006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen if (!NoImp && TID->getImplicitDefs()) 34106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs) 34206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen NumImplicitOps++; 34306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen if (!NoImp && TID->getImplicitUses()) 34406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses) 34506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen NumImplicitOps++; 34606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen Operands.reserve(NumImplicitOps + TID->getNumOperands()); 34706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen if (!NoImp) 34806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen addImplicitDefUseOperands(); 34906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // Make sure that we get added to a machine basicblock 35006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen LeakDetector::addGarbageObject(this); 35106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen} 35206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 35306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen/// MachineInstr ctor - Work exactly the same as the ctor two above, except 35406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen/// that the MachineInstr is created and added to the end of the specified 35506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen/// basic block. 35606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen/// 35706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale JohannesenMachineInstr::MachineInstr(MachineBasicBlock *MBB, const TargetInstrDesc &tid) 35806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen : TID(&tid), NumImplicitOps(0), Parent(0), 35906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen debugLoc(DebugLoc::getUnknownLoc()) { 36006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen assert(MBB && "Cannot use inserting ctor with null basic block!"); 36106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen if (TID->ImplicitDefs) 36206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs) 36306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen NumImplicitOps++; 36406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen if (TID->ImplicitUses) 36506efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses) 36606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen NumImplicitOps++; 36706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen Operands.reserve(NumImplicitOps + TID->getNumOperands()); 36806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen addImplicitDefUseOperands(); 36906efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen // Make sure that we get added to a machine basicblock 37006efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen LeakDetector::addGarbageObject(this); 37106efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen MBB->push_back(this); // Add instruction to end of basic block! 37206efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen} 37306efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen 37406efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen/// MachineInstr ctor - As above, but with a DebugLoc. 375ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner/// 37606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale JohannesenMachineInstr::MachineInstr(MachineBasicBlock *MBB, const DebugLoc dl, 377749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &tid) 37806efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen : TID(&tid), NumImplicitOps(0), Parent(0), debugLoc(dl) { 379ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner assert(MBB && "Cannot use inserting ctor with null basic block!"); 38067f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitDefs) 381349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs) 382d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 38367f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitUses) 384349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses) 385d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 386349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner Operands.reserve(NumImplicitOps + TID->getNumOperands()); 38767f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng addImplicitDefUseOperands(); 3882c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman // Make sure that we get added to a machine basicblock 3892c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman LeakDetector::addGarbageObject(this); 390ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner MBB->push_back(this); // Add instruction to end of basic block! 391ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner} 392ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner 393ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman/// MachineInstr ctor - Copies MachineInstr arg exactly 394ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman/// 3951ed9922794cda9dbe295e74674b909287e544632Evan ChengMachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) 39606efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen : TID(&MI.getDesc()), NumImplicitOps(0), Parent(0), 39706efc02854a96a9f92edc3bf46b0451f488cf2e6Dale Johannesen debugLoc(MI.getDebugLoc()) { 398943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner Operands.reserve(MI.getNumOperands()); 399b5159ed0cb7943e5938782f7693beb18342165ceTanya Lattner 400ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman // Add operands 4011ed9922794cda9dbe295e74674b909287e544632Evan Cheng for (unsigned i = 0; i != MI.getNumOperands(); ++i) 4021ed9922794cda9dbe295e74674b909287e544632Evan Cheng addOperand(MI.getOperand(i)); 4031ed9922794cda9dbe295e74674b909287e544632Evan Cheng NumImplicitOps = MI.NumImplicitOps; 4040c63e03e04d3982e1913479bba404c3debc9a27eTanya Lattner 4058e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // Add memory operands. 406fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman for (std::list<MachineMemOperand>::const_iterator i = MI.memoperands_begin(), 4078e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman j = MI.memoperands_end(); i != j; ++i) 4088e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman addMemOperand(MF, *i); 4098e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 4108e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // Set parent to null. 411f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner Parent = 0; 4126116a73da420d9b414a34ce2599dc7f6476e23fcDan Gohman 4136116a73da420d9b414a34ce2599dc7f6476e23fcDan Gohman LeakDetector::addGarbageObject(this); 414466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner} 415466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner 416ce22e76996d3ff0930716fa60c29df60a7e0481bMisha BrukmanMachineInstr::~MachineInstr() { 4172c3f7ae3843bdc9dcfe85393e178211976c1f9bdDan Gohman LeakDetector::removeGarbageObject(this); 4188e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman assert(MemOperands.empty() && 4198e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman "MachineInstr being deleted with live memoperands!"); 420e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner#ifndef NDEBUG 42162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 422e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner assert(Operands[i].ParentMI == this && "ParentMI mismatch!"); 423d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman assert((!Operands[i].isReg() || !Operands[i].isOnRegUseList()) && 42462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner "Reg operand def/use list corrupted"); 42562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 426e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner#endif 427aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos} 428aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos 42962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// getRegInfo - If this instruction is embedded into a MachineFunction, 43062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// return the MachineRegisterInfo object for the current function, otherwise 43162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// return null. 43262ed6b9ade63bf01717ce5274fa11e93e873d245Chris LattnerMachineRegisterInfo *MachineInstr::getRegInfo() { 43362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineBasicBlock *MBB = getParent()) 4344e526b9a5b36d9bac170c03df0a5d6fb76740ae2Dan Gohman return &MBB->getParent()->getRegInfo(); 43562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return 0; 43662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 43762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 43862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in 43962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// this instruction from their respective use lists. This requires that the 44062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// operands already be on their use lists. 44162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::RemoveRegOperandsFromUseLists() { 44262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 443d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Operands[i].isReg()) 44462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].RemoveRegOperandFromRegInfo(); 44562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 44662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 44762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 44862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// AddRegOperandsToUseLists - Add all of the register operands in 44962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// this instruction from their respective use lists. This requires that the 45062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// operands not be on their use lists yet. 45162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo) { 45262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 453d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Operands[i].isReg()) 45462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].AddRegOperandToRegInfo(&RegInfo); 45562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 45662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 45762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 45862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 45962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// addOperand - Add the specified operand to the instruction. If it is an 46062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// implicit operand, it is added to the end of the operand list. If it is 46162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// an explicit operand it is added at the end of the explicit operand list 46262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// (before the first implicit operand). 46362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::addOperand(const MachineOperand &Op) { 464d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman bool isImpReg = Op.isReg() && Op.isImplicit(); 46562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert((isImpReg || !OperandsComplete()) && 46662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner "Trying to add an operand to a machine instr that is already done!"); 46762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 468bcf28c08b3f0a3c4aa1be8f1485f6452d9a2b690Dan Gohman MachineRegisterInfo *RegInfo = getRegInfo(); 469bcf28c08b3f0a3c4aa1be8f1485f6452d9a2b690Dan Gohman 47062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If we are adding the operand to the end of the list, our job is simpler. 47162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // This is true most of the time, so this is a reasonable optimization. 47262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (isImpReg || NumImplicitOps == 0) { 47362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // We can only do this optimization if we know that the operand list won't 47462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // reallocate. 47562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands.empty() || Operands.size()+1 <= Operands.capacity()) { 47662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.push_back(Op); 47762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 47862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Set the parent of the operand. 47962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.back().ParentMI = this; 48062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 48162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If the operand is a register, update the operand's use list. 482d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Op.isReg()) 483bcf28c08b3f0a3c4aa1be8f1485f6452d9a2b690Dan Gohman Operands.back().AddRegOperandToRegInfo(RegInfo); 48462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 48562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 48662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 48762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 48862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we have to insert a real operand before any implicit ones. 48962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner unsigned OpNo = Operands.size()-NumImplicitOps; 49062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 49162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this instruction isn't embedded into a function, then we don't need to 49262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // update any operand lists. 49362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo == 0) { 49462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Simple insertion, no reginfo update needed for other register operands. 49562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.insert(Operands.begin()+OpNo, Op); 49662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].ParentMI = this; 49762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 49862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Do explicitly set the reginfo for this operand though, to ensure the 49962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // next/prev fields are properly nulled out. 500d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Operands[OpNo].isReg()) 50162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].AddRegOperandToRegInfo(0); 50262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 50362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } else if (Operands.size()+1 <= Operands.capacity()) { 50462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we have to remove register operands from their register use 50562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // list, add the operand, then add the register operands back to their use 50662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // list. This also must handle the case when the operand list reallocates 50762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // to somewhere else. 50862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 50962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If insertion of this operand won't cause reallocation of the operand 51062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // list, just remove the implicit operands, add the operand, then re-add all 51162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // the rest of the operands. 51262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 513d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman assert(Operands[i].isReg() && "Should only be an implicit reg!"); 51462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].RemoveRegOperandFromRegInfo(); 51562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 51662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 51762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Add the operand. If it is a register, add it to the reg list. 51862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.insert(Operands.begin()+OpNo, Op); 51962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].ParentMI = this; 52062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 521d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Operands[OpNo].isReg()) 52262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].AddRegOperandToRegInfo(RegInfo); 52362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 52462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Re-add all the implicit ops. 52562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo+1, e = Operands.size(); i != e; ++i) { 526d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman assert(Operands[i].isReg() && "Should only be an implicit reg!"); 52762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].AddRegOperandToRegInfo(RegInfo); 52862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 52962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } else { 53062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we will be reallocating the operand list. Remove all reg 53162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // operands from their list, then readd them after the operand list is 53262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // reallocated. 53362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner RemoveRegOperandsFromUseLists(); 53462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 53562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.insert(Operands.begin()+OpNo, Op); 53662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].ParentMI = this; 53762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 53862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Re-add all the operands. 53962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner AddRegOperandsToUseLists(*RegInfo); 54062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 54162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 54262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 54362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// RemoveOperand - Erase an operand from an instruction, leaving it with one 54462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// fewer operand than it started with. 54562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// 54662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::RemoveOperand(unsigned OpNo) { 54762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert(OpNo < Operands.size() && "Invalid operand number"); 54862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 54962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Special case removing the last one. 55062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (OpNo == Operands.size()-1) { 55162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If needed, remove from the reg def/use list. 552d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Operands.back().isReg() && Operands.back().isOnRegUseList()) 55362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.back().RemoveRegOperandFromRegInfo(); 55462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 55562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.pop_back(); 55662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 55762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 55862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 55962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we are removing an interior operand. If we have reginfo to 56062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // update, remove all operands that will be shifted down from their reg lists, 56162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // move everything down, then re-add them. 56262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner MachineRegisterInfo *RegInfo = getRegInfo(); 56362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo) { 56462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 565d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Operands[i].isReg()) 56662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].RemoveRegOperandFromRegInfo(); 56762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 56862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 56962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 57062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.erase(Operands.begin()+OpNo); 57162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 57262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo) { 57362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 574d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (Operands[i].isReg()) 57562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].AddRegOperandToRegInfo(RegInfo); 57662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 57762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 57862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 57962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 5808e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// addMemOperand - Add a MachineMemOperand to the machine instruction, 5818e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// referencing arbitrary storage. 5828e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::addMemOperand(MachineFunction &MF, 5838e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman const MachineMemOperand &MO) { 584fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman MemOperands.push_back(MO); 5858e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman} 5868e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 5878e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands. 5888e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::clearMemOperands(MachineFunction &MF) { 589fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman MemOperands.clear(); 5908e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman} 5918e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 59262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 59348d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner/// removeFromParent - This method unlinks 'this' from the containing basic 59448d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner/// block, and returns it, but does not delete it. 59548d7c069c76882475c23de153bda9483cd3c9bb4Chris LattnerMachineInstr *MachineInstr::removeFromParent() { 59648d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner assert(getParent() && "Not embedded in a basic block!"); 59748d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner getParent()->remove(this); 59848d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner return this; 59948d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner} 60048d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner 60148d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner 6028e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// eraseFromParent - This method unlinks 'this' from the containing basic 6038e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// block, and deletes it. 6048e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::eraseFromParent() { 6058e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman assert(getParent() && "Not embedded in a basic block!"); 6068e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman getParent()->erase(this); 6078e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman} 6088e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 6098e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 61021326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke/// OperandComplete - Return true if it's illegal to add a new operand 61121326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke/// 6122a90ba60175f93e7438165d8423100aa573c16c5Chris Lattnerbool MachineInstr::OperandsComplete() const { 613349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner unsigned short NumOperands = TID->getNumOperands(); 6148f707e15fbd09ca948b86419bcb0c92470827ac9Chris Lattner if (!TID->isVariadic() && getNumOperands()-NumImplicitOps >= NumOperands) 6153497782f3843007de3be0c43e3ff206a01e2ccacVikram S. Adve return true; // Broken: we have all the operands of this instruction! 616413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner return false; 61770bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve} 61870bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve 61919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// getNumExplicitOperands - Returns the number of non-implicit operands. 62019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// 62119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Chengunsigned MachineInstr::getNumExplicitOperands() const { 622349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner unsigned NumOperands = TID->getNumOperands(); 6238f707e15fbd09ca948b86419bcb0c92470827ac9Chris Lattner if (!TID->isVariadic()) 62419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng return NumOperands; 62519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 62619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) { 62719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng const MachineOperand &MO = getOperand(NumOperands); 628d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (!MO.isReg() || !MO.isImplicit()) 62919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng NumOperands++; 63019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 63119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng return NumOperands; 63219e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng} 63319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 6348ace2cd034be10c09be51daf08c3dda327f54262Chris Lattner 6354406604047423576e36657c7ede266ca42e79642Dan Gohman/// isLabel - Returns true if the MachineInstr represents a label. 6364406604047423576e36657c7ede266ca42e79642Dan Gohman/// 6374406604047423576e36657c7ede266ca42e79642Dan Gohmanbool MachineInstr::isLabel() const { 6384406604047423576e36657c7ede266ca42e79642Dan Gohman return getOpcode() == TargetInstrInfo::DBG_LABEL || 6394406604047423576e36657c7ede266ca42e79642Dan Gohman getOpcode() == TargetInstrInfo::EH_LABEL || 6404406604047423576e36657c7ede266ca42e79642Dan Gohman getOpcode() == TargetInstrInfo::GC_LABEL; 6414406604047423576e36657c7ede266ca42e79642Dan Gohman} 6424406604047423576e36657c7ede266ca42e79642Dan Gohman 643bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng/// isDebugLabel - Returns true if the MachineInstr represents a debug label. 644bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng/// 645bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Chengbool MachineInstr::isDebugLabel() const { 6464406604047423576e36657c7ede266ca42e79642Dan Gohman return getOpcode() == TargetInstrInfo::DBG_LABEL; 647bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng} 648bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng 649faa510726f4b40aa4495e60e4d341c6467e3fb01Evan Cheng/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of 65032eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng/// the specific register or -1 if it is not found. It further tightening 65176d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng/// the search criteria to a use that kills the register if isKill is true. 6526130f66eaae89f8878590796977678afa8448926Evan Chengint MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, 6536130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI) const { 654576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 655f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng const MachineOperand &MO = getOperand(i); 656d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (!MO.isReg() || !MO.isUse()) 6576130f66eaae89f8878590796977678afa8448926Evan Cheng continue; 6586130f66eaae89f8878590796977678afa8448926Evan Cheng unsigned MOReg = MO.getReg(); 6596130f66eaae89f8878590796977678afa8448926Evan Cheng if (!MOReg) 6606130f66eaae89f8878590796977678afa8448926Evan Cheng continue; 6616130f66eaae89f8878590796977678afa8448926Evan Cheng if (MOReg == Reg || 6626130f66eaae89f8878590796977678afa8448926Evan Cheng (TRI && 6636130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(MOReg) && 6646130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(Reg) && 6656130f66eaae89f8878590796977678afa8448926Evan Cheng TRI->isSubRegister(MOReg, Reg))) 66676d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng if (!isKill || MO.isKill()) 66732eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng return i; 668b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng } 66932eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng return -1; 670b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng} 671b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 6726130f66eaae89f8878590796977678afa8448926Evan Cheng/// findRegisterDefOperandIdx() - Returns the operand index that is a def of 673703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// the specified register or -1 if it is not found. If isDead is true, defs 674703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// that are not dead are skipped. If TargetRegisterInfo is non-null, then it 675703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// also checks if there is a def of a super-register. 6766130f66eaae89f8878590796977678afa8448926Evan Chengint MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, 6776130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI) const { 678b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 6796130f66eaae89f8878590796977678afa8448926Evan Cheng const MachineOperand &MO = getOperand(i); 680d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (!MO.isReg() || !MO.isDef()) 6816130f66eaae89f8878590796977678afa8448926Evan Cheng continue; 6826130f66eaae89f8878590796977678afa8448926Evan Cheng unsigned MOReg = MO.getReg(); 6836130f66eaae89f8878590796977678afa8448926Evan Cheng if (MOReg == Reg || 6846130f66eaae89f8878590796977678afa8448926Evan Cheng (TRI && 6856130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(MOReg) && 6866130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(Reg) && 6876130f66eaae89f8878590796977678afa8448926Evan Cheng TRI->isSubRegister(MOReg, Reg))) 6886130f66eaae89f8878590796977678afa8448926Evan Cheng if (!isDead || MO.isDead()) 6896130f66eaae89f8878590796977678afa8448926Evan Cheng return i; 690576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng } 6916130f66eaae89f8878590796977678afa8448926Evan Cheng return -1; 692576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng} 69319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 694f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// findFirstPredOperandIdx() - Find the index of the first operand in the 695f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// operand list that is used to represent the predicate. It returns -1 if 696f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// none is found. 697f277ee4be7edabb759a7f78138b693d72d0c263fEvan Chengint MachineInstr::findFirstPredOperandIdx() const { 698749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &TID = getDesc(); 699749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner if (TID.isPredicable()) { 70019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 701749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner if (TID.OpInfo[i].isPredicate()) 702f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng return i; 70319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 70419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 705f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng return -1; 70619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng} 707576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng 708d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson/// isRegTiedToUseOperand - Given the index of a register def operand, 709d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson/// check if the register def is tied to a source operand, due to either 710d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson/// two-address elimination or inline assembly constraints. Returns the 711d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson/// first tied use operand index by reference is UseOpIdx is not null. 712d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilsonbool MachineInstr::isRegTiedToUseOperand(unsigned DefOpIdx, unsigned *UseOpIdx){ 713fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (getOpcode() == TargetInstrInfo::INLINEASM) { 714d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson assert(DefOpIdx >= 2); 715d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson const MachineOperand &MO = getOperand(DefOpIdx); 716c30aa7b3de0ce8c37e9630e8e7a73cb83c808c62Chris Lattner if (!MO.isReg() || !MO.isDef() || MO.getReg() == 0) 717fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng return false; 718fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng // Determine the actual operand no corresponding to this index. 719fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng unsigned DefNo = 0; 720fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng for (unsigned i = 1, e = getNumOperands(); i < e; ) { 721fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng const MachineOperand &FMO = getOperand(i); 722fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng assert(FMO.isImm()); 723fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng // Skip over this def. 724fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng i += InlineAsm::getNumOperandRegisters(FMO.getImm()) + 1; 725d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson if (i > DefOpIdx) 726fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng break; 727fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng ++DefNo; 728fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng } 729fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 730fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng const MachineOperand &FMO = getOperand(i); 731fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (!FMO.isImm()) 732fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng continue; 733fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (i+1 >= e || !getOperand(i+1).isReg() || !getOperand(i+1).isUse()) 734fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng continue; 735fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng unsigned Idx; 736fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (InlineAsm::isUseOperandTiedToDef(FMO.getImm(), Idx) && 737d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson Idx == DefNo) { 738d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson if (UseOpIdx) 739d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson *UseOpIdx = (unsigned)i + 1; 740fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng return true; 741d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson } 742fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng } 743fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng } 744fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng 745d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson assert(getOperand(DefOpIdx).isDef() && "DefOpIdx is not a def!"); 746749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &TID = getDesc(); 747ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) { 748ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng const MachineOperand &MO = getOperand(i); 7492ce7f2068f13566f5a70ee779e3bb83a6cb8d942Dan Gohman if (MO.isReg() && MO.isUse() && 750d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefOpIdx) { 751d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson if (UseOpIdx) 752d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson *UseOpIdx = (unsigned)i; 753ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng return true; 754d9df5017040489303acb57bdd8697ef0f8bafc08Bob Wilson } 75532dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng } 75632dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng return false; 75732dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng} 75832dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng 759a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng/// isRegTiedToDefOperand - Return true if the operand of the specified index 760a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng/// is a register use and it is tied to an def operand. It also returns the def 761a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng/// operand index by reference. 762a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Chengbool MachineInstr::isRegTiedToDefOperand(unsigned UseOpIdx, unsigned *DefOpIdx){ 763fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (getOpcode() == TargetInstrInfo::INLINEASM) { 764fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng const MachineOperand &MO = getOperand(UseOpIdx); 7650c8382ce9a96e36325b17d242fd1af16564d8a85Chris Lattner if (!MO.isReg() || !MO.isUse() || MO.getReg() == 0) 766fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng return false; 767fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng assert(UseOpIdx > 0); 768fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng const MachineOperand &UFMO = getOperand(UseOpIdx-1); 769fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (!UFMO.isImm()) 770fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng return false; // Must be physreg uses. 771fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng unsigned DefNo; 772fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (InlineAsm::isUseOperandTiedToDef(UFMO.getImm(), DefNo)) { 773fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng if (!DefOpIdx) 774fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng return true; 775fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng 776fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng unsigned DefIdx = 1; 777fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng // Remember to adjust the index. First operand is asm string, then there 778fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng // is a flag for each. 779fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng while (DefNo) { 780fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng const MachineOperand &FMO = getOperand(DefIdx); 781fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng assert(FMO.isImm()); 782fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng // Skip over this def. 783fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng DefIdx += InlineAsm::getNumOperandRegisters(FMO.getImm()) + 1; 784fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng --DefNo; 785fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng } 786fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng *DefOpIdx = DefIdx+1; 787fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng return true; 788fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng } 789fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng return false; 790fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng } 791fb11288109329cb736d9f49769581a0d0c23fe19Evan Cheng 792a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng const TargetInstrDesc &TID = getDesc(); 793a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng if (UseOpIdx >= TID.getNumOperands()) 794a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng return false; 795a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng const MachineOperand &MO = getOperand(UseOpIdx); 796a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng if (!MO.isReg() || !MO.isUse()) 797a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng return false; 798a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng int DefIdx = TID.getOperandConstraint(UseOpIdx, TOI::TIED_TO); 799a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng if (DefIdx == -1) 800a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng return false; 801a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng if (DefOpIdx) 802a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng *DefOpIdx = (unsigned)DefIdx; 803a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng return true; 804a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng} 805a24752ff43dc1ad8c18c5d9e78549c45f62b980eEvan Cheng 806576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng/// copyKillDeadInfo - Copies kill / dead operand properties from MI. 807576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng/// 808576d123e130a8291669dd2384a3735cc4933fd00Evan Chengvoid MachineInstr::copyKillDeadInfo(const MachineInstr *MI) { 809576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 810576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng const MachineOperand &MO = MI->getOperand(i); 811d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (!MO.isReg() || (!MO.isKill() && !MO.isDead())) 812576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng continue; 813576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) { 814576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng MachineOperand &MOp = getOperand(j); 815576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng if (!MOp.isIdenticalTo(MO)) 816576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng continue; 817576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng if (MO.isKill()) 818576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng MOp.setIsKill(); 819576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng else 820576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng MOp.setIsDead(); 821576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng break; 822576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng } 823576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng } 824576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng} 825576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng 82619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// copyPredicates - Copies predicate operand(s) from MI. 82719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Chengvoid MachineInstr::copyPredicates(const MachineInstr *MI) { 828749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &TID = MI->getDesc(); 829b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (!TID.isPredicable()) 830b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return; 831b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 832b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (TID.OpInfo[i].isPredicate()) { 833b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // Predicated operands must be last operands. 834b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng addOperand(MI->getOperand(i)); 83519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 83619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 83719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng} 83819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 8399f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// isSafeToMove - Return true if it is safe to move this instruction. If 8409f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// SawStore is set to true, it means that there is a store (or call) between 8419f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// the instruction's location and its intended destination. 842b3b930a011554fc7566dd4311af3862b01e5fd8fDan Gohmanbool MachineInstr::isSafeToMove(const TargetInstrInfo *TII, 843b3b930a011554fc7566dd4311af3862b01e5fd8fDan Gohman bool &SawStore) const { 844b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // Ignore stuff that we obviously can't move. 845b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (TID->mayStore() || TID->isCall()) { 846b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng SawStore = true; 847b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return false; 848b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng } 849237dee125997dcaf16e391878465162cc680c0faDan Gohman if (TID->isTerminator() || TID->hasUnmodeledSideEffects()) 850b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return false; 851b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 852b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // See if this instruction does a load. If so, we have to guarantee that the 853b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // loaded value doesn't change between the load and the its intended 854b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // destination. The check for isInvariantLoad gives the targe the chance to 855b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // classify the load as always returning a constant, e.g. a constant pool 856b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // load. 8573e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman if (TID->mayLoad() && !TII->isInvariantLoad(this)) 858b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // Otherwise, this is a real load. If there is a store between the load and 8593e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman // end of block, or if the laod is volatile, we can't move it. 860d790a5ceee7138d8a5352432ccf862a42e3f5819Dan Gohman return !SawStore && !hasVolatileMemoryRef(); 8613e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 862b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return true; 863b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng} 864b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 865df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng/// isSafeToReMat - Return true if it's safe to rematerialize the specified 866df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng/// instruction which defined the specified register instead of copying it. 867b3b930a011554fc7566dd4311af3862b01e5fd8fDan Gohmanbool MachineInstr::isSafeToReMat(const TargetInstrInfo *TII, 868b3b930a011554fc7566dd4311af3862b01e5fd8fDan Gohman unsigned DstReg) const { 869df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng bool SawStore = false; 8703689ff450ae2d72aadf48c70f499e4368684d1e3Evan Cheng if (!getDesc().isRematerializable() || 8713689ff450ae2d72aadf48c70f499e4368684d1e3Evan Cheng !TII->isTriviallyReMaterializable(this) || 8723689ff450ae2d72aadf48c70f499e4368684d1e3Evan Cheng !isSafeToMove(TII, SawStore)) 873df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng return false; 874df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 875cbad42cfd1cc93a41ff26ea2e8895bfbc09f54f2Dan Gohman const MachineOperand &MO = getOperand(i); 876d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (!MO.isReg()) 877df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng continue; 878df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng // FIXME: For now, do not remat any instruction with register operands. 879df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng // Later on, we can loosen the restriction is the register operands have 880df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng // not been modified between the def and use. Note, this is different from 8818763c1c54413c9cd0b56e2860edb5856151a69fcEvan Cheng // MachineSink because the code is no longer in two-address form (at least 882df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng // partially). 883df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng if (MO.isUse()) 884df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng return false; 885df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng else if (!MO.isDead() && MO.getReg() != DstReg) 886df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng return false; 887df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng } 888df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng return true; 889df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng} 890df3b99381f1c211071cc1daf0cc297666877bbcbEvan Cheng 8913e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman/// hasVolatileMemoryRef - Return true if this instruction may have a 8923e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman/// volatile memory reference, or if the information describing the 8933e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman/// memory reference is not available. Return false if it is known to 8943e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman/// have no volatile memory references. 8953e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohmanbool MachineInstr::hasVolatileMemoryRef() const { 8963e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman // An instruction known never to access memory won't have a volatile access. 8973e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman if (!TID->mayStore() && 8983e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman !TID->mayLoad() && 8993e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman !TID->isCall() && 9003e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman !TID->hasUnmodeledSideEffects()) 9013e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman return false; 9023e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 9033e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman // Otherwise, if the instruction has no memory reference information, 9043e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman // conservatively assume it wasn't preserved. 9053e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman if (memoperands_empty()) 9063e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman return true; 9073e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 9083e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman // Check the memory reference information for volatile references. 9093e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman for (std::list<MachineMemOperand>::const_iterator I = memoperands_begin(), 9103e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman E = memoperands_end(); I != E; ++I) 9113e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman if (I->isVolatile()) 9123e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman return true; 9133e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 9143e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman return false; 9153e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman} 9163e4fb70c6af53a2d00e057a7e4a8f93eb2ff2112Dan Gohman 91721326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaekevoid MachineInstr::dump() const { 918e81561909d128c6e2d8033cb5465a49b2596b26aBill Wendling cerr << " " << *this; 91970bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve} 92070bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve 921b140762a45d21aaed054f15adaff0fc2274d939dTanya Lattnervoid MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { 9225ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang raw_os_ostream RawOS(OS); 9235ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang print(RawOS, TM); 9245ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang} 9255ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang 9265ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wangvoid MachineInstr::print(raw_ostream &OS, const TargetMachine *TM) const { 927e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattner // Specialize printing if op#0 is definition 9286a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner unsigned StartOp = 0; 929d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) { 930f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getOperand(0).print(OS, TM); 9316a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner OS << " = "; 9326a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner ++StartOp; // Don't print this operand again! 9336a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner } 934b140762a45d21aaed054f15adaff0fc2274d939dTanya Lattner 935749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner OS << getDesc().getName(); 936edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman 9376a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { 9386a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner if (i != StartOp) 9396a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner OS << ","; 9406a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner OS << " "; 941f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getOperand(i).print(OS, TM); 9421049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner } 943edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman 9448e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (!memoperands_empty()) { 9452bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << ", Mem:"; 946fed90b6d097d50881afb45e4d79f430db66dd741Dan Gohman for (std::list<MachineMemOperand>::const_iterator i = memoperands_begin(), 9478e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman e = memoperands_end(); i != e; ++i) { 9488e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman const MachineMemOperand &MRO = *i; 94969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman const Value *V = MRO.getValue(); 95069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 95169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman assert((MRO.isLoad() || MRO.isStore()) && 95269de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman "SV has to be a load, store or both."); 95369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 95469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman if (MRO.isVolatile()) 95569de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman OS << "Volatile "; 9562bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman 95769de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman if (MRO.isLoad()) 9582bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << "LD"; 95969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman if (MRO.isStore()) 9602bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << "ST"; 96169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 962bbd8322daaefa70ba1a282956df5f977e783524bEvan Cheng OS << "(" << MRO.getSize() << "," << MRO.getAlignment() << ") ["; 96369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 9642bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman if (!V) 9652bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << "<unknown>"; 9662bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman else if (!V->getName().empty()) 9672bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << V->getName(); 968edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner else if (const PseudoSourceValue *PSV = dyn_cast<PseudoSourceValue>(V)) { 9695ca6bd14a00ba5310ce1a632d3a0cc8f8af31433Mon P Wang PSV->print(OS); 970edfb72c6288118ab9c900a560ded89dfaa107296Chris Lattner } else 9712bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << V; 9722bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman 9732bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << " + " << MRO.getOffset() << "]"; 97469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman } 97569de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman } 97669de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 977b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling if (!debugLoc.isUnknown()) { 978b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling const MachineFunction *MF = getParent()->getParent(); 979b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling DebugLocTuple DLT = MF->getDebugLocTuple(debugLoc); 980b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling OS << " [dbg: " 981b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling << DLT.Src << "," 982b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling << DLT.Line << "," 983b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling << DLT.Col << "]"; 984b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling } 985b5ef27375731ece13a8ae0102b3f3233351036afBill Wendling 9861049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner OS << "\n"; 9871049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner} 9881049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner 989b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Andersonbool MachineInstr::addRegisterKilled(unsigned IncomingReg, 9906f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 991b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound) { 9929b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); 9932ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg); 9943f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman bool Found = false; 9959b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng SmallVector<unsigned,4> DeadOps; 9964a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 9974a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling MachineOperand &MO = getOperand(i); 998d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (!MO.isReg() || !MO.isUse()) 9999b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng continue; 10009b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned Reg = MO.getReg(); 10019b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (!Reg) 10029b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng continue; 10034a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling 10049b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (Reg == IncomingReg) { 10053f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman if (!Found) { 10063f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman if (MO.isKill()) 10073f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman // The register is already marked kill. 10083f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman return true; 10093f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman MO.setIsKill(); 10103f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman Found = true; 10113f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman } 10123f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman } else if (hasAliases && MO.isKill() && 10133f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman TargetRegisterInfo::isPhysicalRegister(Reg)) { 10149b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // A super-register kill already exists. 10159b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (RegInfo->isSuperRegister(IncomingReg, Reg)) 10162ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return true; 10172ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman if (RegInfo->isSubRegister(IncomingReg, Reg)) 10189b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.push_back(i); 1019b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 1020b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 1021b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 10229b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // Trim unneeded kill operands. 10239b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng while (!DeadOps.empty()) { 10249b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned OpIdx = DeadOps.back(); 10259b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (getOperand(OpIdx).isImplicit()) 10269b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng RemoveOperand(OpIdx); 10279b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng else 10289b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng getOperand(OpIdx).setIsKill(false); 10299b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.pop_back(); 10309b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng } 10319b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng 10324a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling // If not found, this means an alias of one of the operands is killed. Add a 1033b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson // new implicit operand if required. 10343f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman if (!Found && AddIfNotFound) { 10354a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling addOperand(MachineOperand::CreateReg(IncomingReg, 10364a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling false /*IsDef*/, 10374a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling true /*IsImp*/, 10384a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling true /*IsKill*/)); 1039b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson return true; 1040b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 10413f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman return Found; 1042b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson} 1043b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 1044b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Andersonbool MachineInstr::addRegisterDead(unsigned IncomingReg, 10456f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 1046b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound) { 10479b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); 104801b2e236b571e7c22ee8493b7ea19eda9830d75cEvan Cheng bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg); 10493f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman bool Found = false; 10509b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng SmallVector<unsigned,4> DeadOps; 1051b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 1052b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson MachineOperand &MO = getOperand(i); 1053d735b8019b0f297d7c14b55adcd887af24d8e602Dan Gohman if (!MO.isReg() || !MO.isDef()) 10549b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng continue; 10559b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned Reg = MO.getReg(); 10563f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman if (!Reg) 10573f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman continue; 10583f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman 10599b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (Reg == IncomingReg) { 10603f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman if (!Found) { 10613f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman if (MO.isDead()) 10623f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman // The register is already marked dead. 10633f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman return true; 10643f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman MO.setIsDead(); 10653f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman Found = true; 10663f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman } 10673f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman } else if (hasAliases && MO.isDead() && 10683f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman TargetRegisterInfo::isPhysicalRegister(Reg)) { 10699b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // There exists a super-register that's marked dead. 10709b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (RegInfo->isSuperRegister(IncomingReg, Reg)) 10712ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return true; 107222ae99908258dd5631fde7128a94c418ed08eae5Owen Anderson if (RegInfo->getSubRegisters(IncomingReg) && 107322ae99908258dd5631fde7128a94c418ed08eae5Owen Anderson RegInfo->getSuperRegisters(Reg) && 107422ae99908258dd5631fde7128a94c418ed08eae5Owen Anderson RegInfo->isSubRegister(IncomingReg, Reg)) 10759b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.push_back(i); 1076b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 1077b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 1078b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 10799b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // Trim unneeded dead operands. 10809b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng while (!DeadOps.empty()) { 10819b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned OpIdx = DeadOps.back(); 10829b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (getOperand(OpIdx).isImplicit()) 10839b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng RemoveOperand(OpIdx); 10849b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng else 10859b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng getOperand(OpIdx).setIsDead(false); 10869b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.pop_back(); 10879b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng } 10889b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng 10893f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman // If not found, this means an alias of one of the operands is dead. Add a 10903f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman // new implicit operand if required. 10913f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman if (!Found && AddIfNotFound) { 10923f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman addOperand(MachineOperand::CreateReg(IncomingReg, 10933f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman true /*IsDef*/, 10943f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman true /*IsImp*/, 10953f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman false /*IsKill*/, 10963f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman true /*IsDead*/)); 1097b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson return true; 1098b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 10993f62940561760fe5dcc8675853be57ee4ac8069aDan Gohman return Found; 1100b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson} 1101