MachineInstr.cpp revision ef0732d25a9882c947984ae3f2afbef5463ba00f
1e138b3dd1ff02d826233482831318708a166ed93Chris Lattner//===-- lib/CodeGen/MachineInstr.cpp --------------------------------------===// 2edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman// 3b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell// The LLVM Compiler Infrastructure 4b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell// 54ee451de366474b9c228b4e5fa573795a715216dChris Lattner// This file is distributed under the University of Illinois Open Source 64ee451de366474b9c228b4e5fa573795a715216dChris Lattner// License. See LICENSE.TXT for details. 7edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman// 8b576c94c15af9a440f69d9d03c2afead7971118cJohn Criswell//===----------------------------------------------------------------------===// 921326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke// 1021326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke// Methods common to all machine instructions. 1121326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke// 12035dfbe7f2d109008d2d62d9f2a67efb477a7ab6Chris Lattner//===----------------------------------------------------------------------===// 1370bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve 14e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman#include "llvm/Constants.h" 15822b4fb896846b87dd11a330ae13f2239329aeefChris Lattner#include "llvm/CodeGen/MachineInstr.h" 1684bc5427d6883f73cfeae3da640acd011d35c006Chris Lattner#include "llvm/Value.h" 178517e1f0beea9b5e47974f083396d53294c390adChris Lattner#include "llvm/CodeGen/MachineFunction.h" 1862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner#include "llvm/CodeGen/MachineRegisterInfo.h" 1969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman#include "llvm/CodeGen/PseudoSourceValue.h" 2069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman#include "llvm/CodeGen/SelectionDAGNodes.h" 211049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner#include "llvm/Target/TargetMachine.h" 22bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng#include "llvm/Target/TargetInstrInfo.h" 23f14cf85e334ff03bbdd23e473f14ffa4fb025e94Chris Lattner#include "llvm/Target/TargetInstrDesc.h" 246f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman#include "llvm/Target/TargetRegisterInfo.h" 25ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman#include "llvm/Support/MathExtras.h" 26a09362eb975730ac624c0bd210a95655ee105296Bill Wendling#include "llvm/Support/Streams.h" 27c21c5eeb4f56f160e79522df2d3aab5cfe73c05dJeff Cohen#include <ostream> 280742b59913a7760eb26f08121cd244a37e83e3b3Chris Lattnerusing namespace llvm; 29d0fde30ce850b78371fd1386338350591f9ff494Brian Gaeke 30f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 31f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner// MachineOperand Implementation 32f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 33f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 3462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// AddRegOperandToRegInfo - Add this register operand to the specified 3562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// MachineRegisterInfo. If it is null, then the next/prev fields should be 3662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// explicitly nulled out. 3762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::AddRegOperandToRegInfo(MachineRegisterInfo *RegInfo) { 3862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert(isReg() && "Can only add reg operand to use lists"); 3962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 4062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If the reginfo pointer is null, just explicitly null out or next/prev 4162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // pointers, to ensure they are not garbage. 4262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo == 0) { 4362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.Prev = 0; 4462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.Next = 0; 4562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 4662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 4762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 4862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, add this operand to the head of the registers use/def list. 4980fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner MachineOperand **Head = &RegInfo->getRegUseDefListHead(getReg()); 5062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 5180fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner // For SSA values, we prefer to keep the definition at the start of the list. 5280fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner // we do this by skipping over the definition if it is at the head of the 5380fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner // list. 5480fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner if (*Head && (*Head)->isDef()) 5580fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner Head = &(*Head)->Contents.Reg.Next; 5680fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner 5780fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner Contents.Reg.Next = *Head; 5862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Contents.Reg.Next) { 5962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert(getReg() == Contents.Reg.Next->getReg() && 6062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner "Different regs on the same list!"); 6162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.Next->Contents.Reg.Prev = &Contents.Reg.Next; 6262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 6362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 6480fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner Contents.Reg.Prev = Head; 6580fe5311b5e9e5c4642ff46ba2377173c17797f6Chris Lattner *Head = this; 6662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 6762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 6862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::setReg(unsigned Reg) { 6962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (getReg() == Reg) return; // No change. 7062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 7162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we have to change the register. If this operand is embedded 7262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // into a machine function, we need to update the old and new register's 7362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // use/def lists. 7462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineInstr *MI = getParent()) 7562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineBasicBlock *MBB = MI->getParent()) 7662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineFunction *MF = MBB->getParent()) { 7762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner RemoveRegOperandFromRegInfo(); 7862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.RegNo = Reg; 7962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner AddRegOperandToRegInfo(&MF->getRegInfo()); 8062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 8162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 8262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 8362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, just change the register, no problem. :) 8462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.RegNo = Reg; 8562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 8662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 8762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// ChangeToImmediate - Replace this operand with a new immediate operand of 8862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the specified value. If an operand is known to be an immediate already, 8962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the setImm method should be used. 9062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::ChangeToImmediate(int64_t ImmVal) { 9162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this operand is currently a register operand, and if this is in a 9262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // function, deregister the operand from the register's use/def list. 9362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (isReg() && getParent() && getParent()->getParent() && 9462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner getParent()->getParent()->getParent()) 9562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner RemoveRegOperandFromRegInfo(); 9662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 9762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner OpKind = MO_Immediate; 9862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.ImmVal = ImmVal; 9962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 10062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 10162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// ChangeToRegister - Replace this operand with a new register operand of 10262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the specified value. If an operand is known to be an register already, 10362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// the setReg method should be used. 10462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp, 10562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner bool isKill, bool isDead) { 10662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this operand is already a register operand, use setReg to update the 10762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // register's use/def lists. 10862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (isReg()) { 10962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner setReg(Reg); 11062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } else { 11162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, change this to a register and set the reg#. 11262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner OpKind = MO_Register; 11362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Contents.Reg.RegNo = Reg; 11462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 11562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this operand is embedded in a function, add the operand to the 11662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // register's use/def list. 11762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineInstr *MI = getParent()) 11862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineBasicBlock *MBB = MI->getParent()) 11962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineFunction *MF = MBB->getParent()) 12062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner AddRegOperandToRegInfo(&MF->getRegInfo()); 12162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 12262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 12362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsDef = isDef; 12462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsImp = isImp; 12562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsKill = isKill; 12662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner IsDead = isDead; 12762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner SubReg = 0; 12862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 12962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 130f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// isIdenticalTo - Return true if this operand is identical to the specified 131f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// operand. 132f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattnerbool MachineOperand::isIdenticalTo(const MachineOperand &Other) const { 133f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getType() != Other.getType()) return false; 134f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 135f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner switch (getType()) { 136f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner default: assert(0 && "Unrecognized operand type"); 137f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Register: 138f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getReg() == Other.getReg() && isDef() == Other.isDef() && 139f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getSubReg() == Other.getSubReg(); 140f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Immediate: 141f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getImm() == Other.getImm(); 142e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman case MachineOperand::MO_FPImmediate: 143e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman return getFPImm() == Other.getFPImm(); 144f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_MachineBasicBlock: 145f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getMBB() == Other.getMBB(); 146f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_FrameIndex: 1478aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner return getIndex() == Other.getIndex(); 148f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ConstantPoolIndex: 1498aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner return getIndex() == Other.getIndex() && getOffset() == Other.getOffset(); 150f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_JumpTableIndex: 1518aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner return getIndex() == Other.getIndex(); 152f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_GlobalAddress: 153f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset(); 154f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ExternalSymbol: 155f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner return !strcmp(getSymbolName(), Other.getSymbolName()) && 156f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getOffset() == Other.getOffset(); 157f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 158f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner} 159f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 160f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// print - Print the specified machine operand. 161f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner/// 162f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattnervoid MachineOperand::print(std::ostream &OS, const TargetMachine *TM) const { 163f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner switch (getType()) { 164f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Register: 1656f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman if (getReg() == 0 || TargetRegisterInfo::isVirtualRegister(getReg())) { 166f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "%reg" << getReg(); 167f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } else { 168f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner // If the instruction is embedded into a basic block, we can find the 16962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // target info for the instruction. 170f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (TM == 0) 171f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (const MachineInstr *MI = getParent()) 172f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (const MachineBasicBlock *MBB = MI->getParent()) 173f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (const MachineFunction *MF = MBB->getParent()) 174f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner TM = &MF->getTarget(); 175f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 176f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (TM) 177e6d088acc90e422451e098555d383d4d65b6ce6bBill Wendling OS << "%" << TM->getRegisterInfo()->get(getReg()).Name; 178f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner else 179f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "%mreg" << getReg(); 180f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 181f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 182f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (isDef() || isKill() || isDead() || isImplicit()) { 183f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "<"; 184f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner bool NeedComma = false; 185f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (isImplicit()) { 186f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << (isDef() ? "imp-def" : "imp-use"); 187f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner NeedComma = true; 188f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } else if (isDef()) { 189f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "def"; 190f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner NeedComma = true; 191f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 192f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (isKill() || isDead()) { 193181eb737b28628adc4376b973610a02039385026Bill Wendling if (NeedComma) OS << ","; 194181eb737b28628adc4376b973610a02039385026Bill Wendling if (isKill()) OS << "kill"; 195181eb737b28628adc4376b973610a02039385026Bill Wendling if (isDead()) OS << "dead"; 196f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 197f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 198f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 199f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 200f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_Immediate: 201f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << getImm(); 202f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 203e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman case MachineOperand::MO_FPImmediate: 204e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman if (getFPImm()->getType() == Type::FloatTy) { 205e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman OS << getFPImm()->getValueAPF().convertToFloat(); 206e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman } else { 207e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman OS << getFPImm()->getValueAPF().convertToDouble(); 208e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman } 209e8b7ccf0c9a06831266d690d0b10ead71e0a4ac5Nate Begeman break; 210f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_MachineBasicBlock: 211f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "mbb<" 2128aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner << ((Value*)getMBB()->getBasicBlock())->getName() 2138aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner << "," << (void*)getMBB() << ">"; 214f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 215f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_FrameIndex: 2168aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner OS << "<fi#" << getIndex() << ">"; 217f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 218f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ConstantPoolIndex: 2198aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner OS << "<cp#" << getIndex(); 220f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getOffset()) OS << "+" << getOffset(); 221f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 222f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 223f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_JumpTableIndex: 2248aa797aa51cd4ea1ec6f46f4891a6897944b75b2Chris Lattner OS << "<jt#" << getIndex() << ">"; 225f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 226f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_GlobalAddress: 227f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "<ga:" << ((Value*)getGlobal())->getName(); 228f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getOffset()) OS << "+" << getOffset(); 229f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 230f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 231f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner case MachineOperand::MO_ExternalSymbol: 232f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << "<es:" << getSymbolName(); 233f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner if (getOffset()) OS << "+" << getOffset(); 234f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner OS << ">"; 235f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner break; 236f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner default: 237f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner assert(0 && "Unrecognized operand type"); 238f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner } 239f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner} 240f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 241f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 242ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman// MachineMemOperand Implementation 243ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman//===----------------------------------------------------------------------===// 244ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman 245ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan GohmanMachineMemOperand::MachineMemOperand(const Value *v, unsigned int f, 246ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman int64_t o, uint64_t s, unsigned int a) 247ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman : Offset(o), Size(s), V(v), 248ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman Flags((f & 7) | ((Log2_32(a) + 1) << 3)) { 249f1bf29e648a25a440d3dcf5a445b30c4129c9bcaDan Gohman assert(isPowerOf2_32(a) && "Alignment is not a power of 2!"); 250ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman} 251ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman 252ce42e404a26454f4332c2c350c75ad27bbbb16f7Dan Gohman//===----------------------------------------------------------------------===// 253f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner// MachineInstr Implementation 254f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner//===----------------------------------------------------------------------===// 255f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner 256c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// MachineInstr ctor - This constructor creates a dummy MachineInstr with 25767f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng/// TID NULL and no operands. 258c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan ChengMachineInstr::MachineInstr() 259f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner : TID(0), NumImplicitOps(0), Parent(0) { 2607279122e668816bed0d4f38d3392bbab0140fad0Chris Lattner} 2617279122e668816bed0d4f38d3392bbab0140fad0Chris Lattner 26267f660cb080965ea93ed6d7265a67100f2fe38e4Evan Chengvoid MachineInstr::addImplicitDefUseOperands() { 26367f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitDefs) 264a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7dChris Lattner for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) 2658019f41c0b7fda031d494e3900eada7d4e494772Chris Lattner addOperand(MachineOperand::CreateReg(*ImpDefs, true, true)); 26667f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitUses) 267a4161ee99478e7f8f9e33481e1c0dc79f0b4bd7dChris Lattner for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) 2688019f41c0b7fda031d494e3900eada7d4e494772Chris Lattner addOperand(MachineOperand::CreateReg(*ImpUses, false, true)); 269d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng} 270d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 271d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng/// MachineInstr ctor - This constructor create a MachineInstr and add the 272c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// implicit operands. It reserves space for number of operands specified by 273749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner/// TargetInstrDesc or the numOperands if it is not zero. (for 274c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan Cheng/// instructions with variable number of operands). 275749c6f6b5ed301c84aac562e414486549d7b98ebChris LattnerMachineInstr::MachineInstr(const TargetInstrDesc &tid, bool NoImp) 276f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner : TID(&tid), NumImplicitOps(0), Parent(0) { 277349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner if (!NoImp && TID->getImplicitDefs()) 278349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs) 279d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 280349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner if (!NoImp && TID->getImplicitUses()) 281349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses) 282d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 283349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner Operands.reserve(NumImplicitOps + TID->getNumOperands()); 284fa9457276a2174aaf302240dd32d89900ad021aeEvan Cheng if (!NoImp) 285fa9457276a2174aaf302240dd32d89900ad021aeEvan Cheng addImplicitDefUseOperands(); 286d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng} 287d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng 288ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner/// MachineInstr ctor - Work exactly the same as the ctor above, except that the 289ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner/// MachineInstr is created and added to the end of the specified basic block. 290ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner/// 291c0f64ffab93d11fb27a3b8a0707b77400918a20eEvan ChengMachineInstr::MachineInstr(MachineBasicBlock *MBB, 292749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &tid) 293f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner : TID(&tid), NumImplicitOps(0), Parent(0) { 294ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner assert(MBB && "Cannot use inserting ctor with null basic block!"); 29567f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitDefs) 296349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpDefs = TID->getImplicitDefs(); *ImpDefs; ++ImpDefs) 297d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 29867f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng if (TID->ImplicitUses) 299349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner for (const unsigned *ImpUses = TID->getImplicitUses(); *ImpUses; ++ImpUses) 300d7de496b23fca8145f777a56281457bf64e8bbadEvan Cheng NumImplicitOps++; 301349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner Operands.reserve(NumImplicitOps + TID->getNumOperands()); 30267f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng addImplicitDefUseOperands(); 303ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner MBB->push_back(this); // Add instruction to end of basic block! 304ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner} 305ddd7fcb887be752ec8167276a697994ad9cb9c4eChris Lattner 306ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman/// MachineInstr ctor - Copies MachineInstr arg exactly 307ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman/// 3088e5f2c6f65841542e2a7092553fe42a00048e4c7Dan GohmanMachineInstr::MachineInstr(MachineFunction &MF, const MachineInstr &MI) { 309749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner TID = &MI.getDesc(); 3106b2c05f3d3c7b44183c629485ade10c18b86828dEvan Cheng NumImplicitOps = MI.NumImplicitOps; 311943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner Operands.reserve(MI.getNumOperands()); 312b5159ed0cb7943e5938782f7693beb18342165ceTanya Lattner 313ce22e76996d3ff0930716fa60c29df60a7e0481bMisha Brukman // Add operands 314e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner for (unsigned i = 0; i != MI.getNumOperands(); ++i) { 315943b5e117fe9a087f9aa529a2632c2d32cc22374Chris Lattner Operands.push_back(MI.getOperand(i)); 316e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner Operands.back().ParentMI = this; 317e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner } 3180c63e03e04d3982e1913479bba404c3debc9a27eTanya Lattner 3198e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // Add memory operands. 3208e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman for (alist<MachineMemOperand>::const_iterator i = MI.memoperands_begin(), 3218e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman j = MI.memoperands_end(); i != j; ++i) 3228e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman addMemOperand(MF, *i); 3238e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 3248e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman // Set parent to null. 325f20c1a497fe3922ac718429d65a5fe396890575eChris Lattner Parent = 0; 326466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner} 327466b534a570f574ed485d875bbca8454f68dcb52Tanya Lattner 328ce22e76996d3ff0930716fa60c29df60a7e0481bMisha BrukmanMachineInstr::~MachineInstr() { 3298e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman assert(MemOperands.empty() && 3308e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman "MachineInstr being deleted with live memoperands!"); 331e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner#ifndef NDEBUG 33262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 333e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner assert(Operands[i].ParentMI == this && "ParentMI mismatch!"); 33462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert((!Operands[i].isReg() || !Operands[i].isOnRegUseList()) && 33562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner "Reg operand def/use list corrupted"); 33662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 337e12d6abfdfc5141b2001f0c369a0e1525315b9c0Chris Lattner#endif 338aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos} 339aad5c0505183a5b7913f1a443a1f0650122551ccAlkis Evlogimenos 34067f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng/// getOpcode - Returns the opcode of this MachineInstr. 34167f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng/// 342cb648f90a26eb05ae8d508d500ca12881df50824Dan Gohmanint MachineInstr::getOpcode() const { 34367f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng return TID->Opcode; 34467f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng} 34567f660cb080965ea93ed6d7265a67100f2fe38e4Evan Cheng 34662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// getRegInfo - If this instruction is embedded into a MachineFunction, 34762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// return the MachineRegisterInfo object for the current function, otherwise 34862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// return null. 34962ed6b9ade63bf01717ce5274fa11e93e873d245Chris LattnerMachineRegisterInfo *MachineInstr::getRegInfo() { 35062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (MachineBasicBlock *MBB = getParent()) 3514e526b9a5b36d9bac170c03df0a5d6fb76740ae2Dan Gohman return &MBB->getParent()->getRegInfo(); 35262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return 0; 35362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 35462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 35562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// RemoveRegOperandsFromUseLists - Unlink all of the register operands in 35662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// this instruction from their respective use lists. This requires that the 35762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// operands already be on their use lists. 35862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::RemoveRegOperandsFromUseLists() { 35962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 36062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands[i].isReg()) 36162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].RemoveRegOperandFromRegInfo(); 36262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 36362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 36462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 36562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// AddRegOperandsToUseLists - Add all of the register operands in 36662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// this instruction from their respective use lists. This requires that the 36762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// operands not be on their use lists yet. 36862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::AddRegOperandsToUseLists(MachineRegisterInfo &RegInfo) { 36962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = 0, e = Operands.size(); i != e; ++i) { 37062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands[i].isReg()) 37162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].AddRegOperandToRegInfo(&RegInfo); 37262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 37362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 37462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 37562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 37662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// addOperand - Add the specified operand to the instruction. If it is an 37762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// implicit operand, it is added to the end of the operand list. If it is 37862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// an explicit operand it is added at the end of the explicit operand list 37962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// (before the first implicit operand). 38062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::addOperand(const MachineOperand &Op) { 38162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner bool isImpReg = Op.isReg() && Op.isImplicit(); 38262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert((isImpReg || !OperandsComplete()) && 38362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner "Trying to add an operand to a machine instr that is already done!"); 38462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 38562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If we are adding the operand to the end of the list, our job is simpler. 38662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // This is true most of the time, so this is a reasonable optimization. 38762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (isImpReg || NumImplicitOps == 0) { 38862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // We can only do this optimization if we know that the operand list won't 38962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // reallocate. 39062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands.empty() || Operands.size()+1 <= Operands.capacity()) { 39162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.push_back(Op); 39262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 39362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Set the parent of the operand. 39462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.back().ParentMI = this; 39562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 39662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If the operand is a register, update the operand's use list. 39762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Op.isReg()) 39862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.back().AddRegOperandToRegInfo(getRegInfo()); 39962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 40062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 40162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 40262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 40362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we have to insert a real operand before any implicit ones. 40462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner unsigned OpNo = Operands.size()-NumImplicitOps; 40562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 40662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner MachineRegisterInfo *RegInfo = getRegInfo(); 40762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 40862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If this instruction isn't embedded into a function, then we don't need to 40962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // update any operand lists. 41062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo == 0) { 41162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Simple insertion, no reginfo update needed for other register operands. 41262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.insert(Operands.begin()+OpNo, Op); 41362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].ParentMI = this; 41462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 41562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Do explicitly set the reginfo for this operand though, to ensure the 41662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // next/prev fields are properly nulled out. 41762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands[OpNo].isReg()) 41862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].AddRegOperandToRegInfo(0); 41962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 42062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } else if (Operands.size()+1 <= Operands.capacity()) { 42162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we have to remove register operands from their register use 42262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // list, add the operand, then add the register operands back to their use 42362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // list. This also must handle the case when the operand list reallocates 42462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // to somewhere else. 42562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 42662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If insertion of this operand won't cause reallocation of the operand 42762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // list, just remove the implicit operands, add the operand, then re-add all 42862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // the rest of the operands. 42962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 43062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert(Operands[i].isReg() && "Should only be an implicit reg!"); 43162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].RemoveRegOperandFromRegInfo(); 43262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 43362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 43462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Add the operand. If it is a register, add it to the reg list. 43562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.insert(Operands.begin()+OpNo, Op); 43662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].ParentMI = this; 43762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 43862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands[OpNo].isReg()) 43962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].AddRegOperandToRegInfo(RegInfo); 44062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 44162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Re-add all the implicit ops. 44262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo+1, e = Operands.size(); i != e; ++i) { 44362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert(Operands[i].isReg() && "Should only be an implicit reg!"); 44462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].AddRegOperandToRegInfo(RegInfo); 44562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 44662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } else { 44762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we will be reallocating the operand list. Remove all reg 44862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // operands from their list, then readd them after the operand list is 44962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // reallocated. 45062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner RemoveRegOperandsFromUseLists(); 45162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 45262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.insert(Operands.begin()+OpNo, Op); 45362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[OpNo].ParentMI = this; 45462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 45562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Re-add all the operands. 45662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner AddRegOperandsToUseLists(*RegInfo); 45762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 45862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 45962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 46062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// RemoveOperand - Erase an operand from an instruction, leaving it with one 46162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// fewer operand than it started with. 46262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner/// 46362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattnervoid MachineInstr::RemoveOperand(unsigned OpNo) { 46462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner assert(OpNo < Operands.size() && "Invalid operand number"); 46562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 46662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Special case removing the last one. 46762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (OpNo == Operands.size()-1) { 46862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // If needed, remove from the reg def/use list. 46962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands.back().isReg() && Operands.back().isOnRegUseList()) 47062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.back().RemoveRegOperandFromRegInfo(); 47162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 47262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.pop_back(); 47362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner return; 47462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 47562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 47662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // Otherwise, we are removing an interior operand. If we have reginfo to 47762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // update, remove all operands that will be shifted down from their reg lists, 47862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner // move everything down, then re-add them. 47962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner MachineRegisterInfo *RegInfo = getRegInfo(); 48062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo) { 48162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 48262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands[i].isReg()) 48362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].RemoveRegOperandFromRegInfo(); 48462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 48562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 48662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 48762ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands.erase(Operands.begin()+OpNo); 48862ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 48962ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (RegInfo) { 49062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner for (unsigned i = OpNo, e = Operands.size(); i != e; ++i) { 49162ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner if (Operands[i].isReg()) 49262ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner Operands[i].AddRegOperandToRegInfo(RegInfo); 49362ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 49462ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner } 49562ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner} 49662ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 4978e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// addMemOperand - Add a MachineMemOperand to the machine instruction, 4988e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// referencing arbitrary storage. 4998e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::addMemOperand(MachineFunction &MF, 5008e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman const MachineMemOperand &MO) { 5018e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MemOperands.push_back(MF.CreateMachineMemOperand(MO)); 5028e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman} 5038e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 5048e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// clearMemOperands - Erase all of this MachineInstr's MachineMemOperands. 5058e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::clearMemOperands(MachineFunction &MF) { 5068e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman while (!MemOperands.empty()) 5078e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman MF.DeleteMachineMemOperand(MemOperands.remove(MemOperands.begin())); 5088e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman} 5098e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 51062ed6b9ade63bf01717ce5274fa11e93e873d245Chris Lattner 51148d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner/// removeFromParent - This method unlinks 'this' from the containing basic 51248d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner/// block, and returns it, but does not delete it. 51348d7c069c76882475c23de153bda9483cd3c9bb4Chris LattnerMachineInstr *MachineInstr::removeFromParent() { 51448d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner assert(getParent() && "Not embedded in a basic block!"); 51548d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner getParent()->remove(this); 51648d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner return this; 51748d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner} 51848d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner 51948d7c069c76882475c23de153bda9483cd3c9bb4Chris Lattner 5208e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// eraseFromParent - This method unlinks 'this' from the containing basic 5218e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman/// block, and deletes it. 5228e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohmanvoid MachineInstr::eraseFromParent() { 5238e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman assert(getParent() && "Not embedded in a basic block!"); 5248e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman getParent()->erase(this); 5258e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman} 5268e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 5278e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman 52821326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke/// OperandComplete - Return true if it's illegal to add a new operand 52921326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaeke/// 5302a90ba60175f93e7438165d8423100aa573c16c5Chris Lattnerbool MachineInstr::OperandsComplete() const { 531349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner unsigned short NumOperands = TID->getNumOperands(); 5328f707e15fbd09ca948b86419bcb0c92470827ac9Chris Lattner if (!TID->isVariadic() && getNumOperands()-NumImplicitOps >= NumOperands) 5333497782f3843007de3be0c43e3ff206a01e2ccacVikram S. Adve return true; // Broken: we have all the operands of this instruction! 534413746e9833d97a8b463ef6a788aa326cf3829a2Chris Lattner return false; 53570bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve} 53670bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve 53719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// getNumExplicitOperands - Returns the number of non-implicit operands. 53819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// 53919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Chengunsigned MachineInstr::getNumExplicitOperands() const { 540349c4952009525b27383e2120a6b3c998f39bd09Chris Lattner unsigned NumOperands = TID->getNumOperands(); 5418f707e15fbd09ca948b86419bcb0c92470827ac9Chris Lattner if (!TID->isVariadic()) 54219e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng return NumOperands; 54319e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 54419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) { 54519e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng const MachineOperand &MO = getOperand(NumOperands); 54619e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng if (!MO.isRegister() || !MO.isImplicit()) 54719e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng NumOperands++; 54819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 54919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng return NumOperands; 55019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng} 55119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 5528ace2cd034be10c09be51daf08c3dda327f54262Chris Lattner 5534406604047423576e36657c7ede266ca42e79642Dan Gohman/// isLabel - Returns true if the MachineInstr represents a label. 5544406604047423576e36657c7ede266ca42e79642Dan Gohman/// 5554406604047423576e36657c7ede266ca42e79642Dan Gohmanbool MachineInstr::isLabel() const { 5564406604047423576e36657c7ede266ca42e79642Dan Gohman return getOpcode() == TargetInstrInfo::DBG_LABEL || 5574406604047423576e36657c7ede266ca42e79642Dan Gohman getOpcode() == TargetInstrInfo::EH_LABEL || 5584406604047423576e36657c7ede266ca42e79642Dan Gohman getOpcode() == TargetInstrInfo::GC_LABEL; 5594406604047423576e36657c7ede266ca42e79642Dan Gohman} 5604406604047423576e36657c7ede266ca42e79642Dan Gohman 561bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng/// isDebugLabel - Returns true if the MachineInstr represents a debug label. 562bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng/// 563bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Chengbool MachineInstr::isDebugLabel() const { 5644406604047423576e36657c7ede266ca42e79642Dan Gohman return getOpcode() == TargetInstrInfo::DBG_LABEL; 565bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng} 566bb81d97feb396a8bb21d074db1c57e9f66525f40Evan Cheng 567faa510726f4b40aa4495e60e4d341c6467e3fb01Evan Cheng/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of 56832eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng/// the specific register or -1 if it is not found. It further tightening 56976d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng/// the search criteria to a use that kills the register if isKill is true. 5706130f66eaae89f8878590796977678afa8448926Evan Chengint MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill, 5716130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI) const { 572576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 573f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng const MachineOperand &MO = getOperand(i); 5746130f66eaae89f8878590796977678afa8448926Evan Cheng if (!MO.isRegister() || !MO.isUse()) 5756130f66eaae89f8878590796977678afa8448926Evan Cheng continue; 5766130f66eaae89f8878590796977678afa8448926Evan Cheng unsigned MOReg = MO.getReg(); 5776130f66eaae89f8878590796977678afa8448926Evan Cheng if (!MOReg) 5786130f66eaae89f8878590796977678afa8448926Evan Cheng continue; 5796130f66eaae89f8878590796977678afa8448926Evan Cheng if (MOReg == Reg || 5806130f66eaae89f8878590796977678afa8448926Evan Cheng (TRI && 5816130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(MOReg) && 5826130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(Reg) && 5836130f66eaae89f8878590796977678afa8448926Evan Cheng TRI->isSubRegister(MOReg, Reg))) 58476d7e76c15c258ec4a71fd75a2a32bca3a5e5e27Evan Cheng if (!isKill || MO.isKill()) 58532eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng return i; 586b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng } 58732eb1f1ca4220d2f24916e587ad7e8574d7d82a1Evan Cheng return -1; 588b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng} 589b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng 5906130f66eaae89f8878590796977678afa8448926Evan Cheng/// findRegisterDefOperandIdx() - Returns the operand index that is a def of 591703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// the specified register or -1 if it is not found. If isDead is true, defs 592703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// that are not dead are skipped. If TargetRegisterInfo is non-null, then it 593703bfe69092e8da79fbef2fc5ca07b805ad9f753Dan Gohman/// also checks if there is a def of a super-register. 5946130f66eaae89f8878590796977678afa8448926Evan Chengint MachineInstr::findRegisterDefOperandIdx(unsigned Reg, bool isDead, 5956130f66eaae89f8878590796977678afa8448926Evan Cheng const TargetRegisterInfo *TRI) const { 596b371f457b0ea4a652a9f526ba4375c80ae542252Evan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 5976130f66eaae89f8878590796977678afa8448926Evan Cheng const MachineOperand &MO = getOperand(i); 5986130f66eaae89f8878590796977678afa8448926Evan Cheng if (!MO.isRegister() || !MO.isDef()) 5996130f66eaae89f8878590796977678afa8448926Evan Cheng continue; 6006130f66eaae89f8878590796977678afa8448926Evan Cheng unsigned MOReg = MO.getReg(); 6016130f66eaae89f8878590796977678afa8448926Evan Cheng if (MOReg == Reg || 6026130f66eaae89f8878590796977678afa8448926Evan Cheng (TRI && 6036130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(MOReg) && 6046130f66eaae89f8878590796977678afa8448926Evan Cheng TargetRegisterInfo::isPhysicalRegister(Reg) && 6056130f66eaae89f8878590796977678afa8448926Evan Cheng TRI->isSubRegister(MOReg, Reg))) 6066130f66eaae89f8878590796977678afa8448926Evan Cheng if (!isDead || MO.isDead()) 6076130f66eaae89f8878590796977678afa8448926Evan Cheng return i; 608576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng } 6096130f66eaae89f8878590796977678afa8448926Evan Cheng return -1; 610576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng} 61119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 612f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// findFirstPredOperandIdx() - Find the index of the first operand in the 613f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// operand list that is used to represent the predicate. It returns -1 if 614f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng/// none is found. 615f277ee4be7edabb759a7f78138b693d72d0c263fEvan Chengint MachineInstr::findFirstPredOperandIdx() const { 616749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &TID = getDesc(); 617749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner if (TID.isPredicable()) { 61819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng for (unsigned i = 0, e = getNumOperands(); i != e; ++i) 619749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner if (TID.OpInfo[i].isPredicate()) 620f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng return i; 62119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 62219e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 623f277ee4be7edabb759a7f78138b693d72d0c263fEvan Cheng return -1; 62419e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng} 625576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng 626ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng/// isRegReDefinedByTwoAddr - Given the defined register and the operand index, 627ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng/// check if the register def is a re-definition due to two addr elimination. 628ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Chengbool MachineInstr::isRegReDefinedByTwoAddr(unsigned Reg, unsigned DefIdx) const{ 629749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &TID = getDesc(); 630ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng for (unsigned i = 0, e = TID.getNumOperands(); i != e; ++i) { 631ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng const MachineOperand &MO = getOperand(i); 632ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng if (MO.isRegister() && MO.isUse() && MO.getReg() == Reg && 633ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng TID.getOperandConstraint(i, TOI::TIED_TO) == (int)DefIdx) 634ef0732d25a9882c947984ae3f2afbef5463ba00fEvan Cheng return true; 63532dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng } 63632dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng return false; 63732dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng} 63832dfbeada7292167bb488f36a71a5a6a519ddaffEvan Cheng 639576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng/// copyKillDeadInfo - Copies kill / dead operand properties from MI. 640576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng/// 641576d123e130a8291669dd2384a3735cc4933fd00Evan Chengvoid MachineInstr::copyKillDeadInfo(const MachineInstr *MI) { 642576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 643576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng const MachineOperand &MO = MI->getOperand(i); 64492dfe2001e96f6e2b6d327e8816f38033f88b295Dan Gohman if (!MO.isRegister() || (!MO.isKill() && !MO.isDead())) 645576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng continue; 646576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) { 647576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng MachineOperand &MOp = getOperand(j); 648576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng if (!MOp.isIdenticalTo(MO)) 649576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng continue; 650576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng if (MO.isKill()) 651576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng MOp.setIsKill(); 652576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng else 653576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng MOp.setIsDead(); 654576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng break; 655576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng } 656576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng } 657576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng} 658576d123e130a8291669dd2384a3735cc4933fd00Evan Cheng 65919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng/// copyPredicates - Copies predicate operand(s) from MI. 66019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Chengvoid MachineInstr::copyPredicates(const MachineInstr *MI) { 661749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner const TargetInstrDesc &TID = MI->getDesc(); 662b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (!TID.isPredicable()) 663b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return; 664b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 665b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (TID.OpInfo[i].isPredicate()) { 666b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // Predicated operands must be last operands. 667b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng addOperand(MI->getOperand(i)); 66819e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 66919e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng } 67019e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng} 67119e3f31f6acd9f5ce3cdd8372d4cb598ed921f95Evan Cheng 6729f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// isSafeToMove - Return true if it is safe to move this instruction. If 6739f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// SawStore is set to true, it means that there is a store (or call) between 6749f1c8317a4676945b4961ddb9827ef2412551620Evan Cheng/// the instruction's location and its intended destination. 675b27087f5aa574f875598f4a309b7dd687c64a455Evan Chengbool MachineInstr::isSafeToMove(const TargetInstrInfo *TII, bool &SawStore) { 676b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // Ignore stuff that we obviously can't move. 677b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (TID->mayStore() || TID->isCall()) { 678b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng SawStore = true; 679b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return false; 680b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng } 681b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (TID->isReturn() || TID->isBranch() || TID->hasUnmodeledSideEffects()) 682b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return false; 683b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 684b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // See if this instruction does a load. If so, we have to guarantee that the 685b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // loaded value doesn't change between the load and the its intended 686b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // destination. The check for isInvariantLoad gives the targe the chance to 687b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // classify the load as always returning a constant, e.g. a constant pool 688b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // load. 689b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng if (TID->mayLoad() && !TII->isInvariantLoad(this)) { 690b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // Otherwise, this is a real load. If there is a store between the load and 691b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // end of block, we can't sink the load. 692b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // 693b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // FIXME: we can't do this transformation until we know that the load is 694b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // not volatile, and machineinstrs don't keep this info. :( 695b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng // 696b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng //if (SawStore) 697b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return false; 698b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng } 699b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng return true; 700b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng} 701b27087f5aa574f875598f4a309b7dd687c64a455Evan Cheng 70221326fc2ad47ee7e73a8c0b03a4a0cc0b0a0c4e8Brian Gaekevoid MachineInstr::dump() const { 703e81561909d128c6e2d8033cb5465a49b2596b26aBill Wendling cerr << " " << *this; 70470bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve} 70570bc4b5d1a3795a8f41be96723cfcbccac8e1671Vikram S. Adve 706b140762a45d21aaed054f15adaff0fc2274d939dTanya Lattnervoid MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const { 707e3087890ac7f2fcf4697f8e09091e9a384311b9cChris Lattner // Specialize printing if op#0 is definition 7086a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner unsigned StartOp = 0; 70992dfe2001e96f6e2b6d327e8816f38033f88b295Dan Gohman if (getNumOperands() && getOperand(0).isRegister() && getOperand(0).isDef()) { 710f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getOperand(0).print(OS, TM); 7116a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner OS << " = "; 7126a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner ++StartOp; // Don't print this operand again! 7136a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner } 714b140762a45d21aaed054f15adaff0fc2274d939dTanya Lattner 715749c6f6b5ed301c84aac562e414486549d7b98ebChris Lattner OS << getDesc().getName(); 716edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman 7176a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) { 7186a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner if (i != StartOp) 7196a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner OS << ","; 7206a592271fb2946a0704b06fd66199987cdd40b3cChris Lattner OS << " "; 721f73823000e2d5d6e1cf65bdf5a107297e18d35fbChris Lattner getOperand(i).print(OS, TM); 7221049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner } 723edf128a7fa90f2b0b7ee24741a04a7ae1ecd6f7eMisha Brukman 7248e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman if (!memoperands_empty()) { 7252bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << ", Mem:"; 7268e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman for (alist<MachineMemOperand>::const_iterator i = memoperands_begin(), 7278e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman e = memoperands_end(); i != e; ++i) { 7288e5f2c6f65841542e2a7092553fe42a00048e4c7Dan Gohman const MachineMemOperand &MRO = *i; 72969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman const Value *V = MRO.getValue(); 73069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 73169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman assert((MRO.isLoad() || MRO.isStore()) && 73269de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman "SV has to be a load, store or both."); 73369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 73469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman if (MRO.isVolatile()) 73569de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman OS << "Volatile "; 7362bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman 73769de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman if (MRO.isLoad()) 7382bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << "LD"; 73969de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman if (MRO.isStore()) 7402bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << "ST"; 74169de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 742bbd8322daaefa70ba1a282956df5f977e783524bEvan Cheng OS << "(" << MRO.getSize() << "," << MRO.getAlignment() << ") ["; 74369de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 7442bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman if (!V) 7452bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << "<unknown>"; 7462bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman else if (!V->getName().empty()) 7472bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << V->getName(); 74869de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman else if (isa<PseudoSourceValue>(V)) 7492bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << *V; 75069de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman else 7512bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << V; 7522bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman 7532bfe6ff605f07e8f50874b1326227efc8bb8ed3dDan Gohman OS << " + " << MRO.getOffset() << "]"; 75469de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman } 75569de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman } 75669de1932b350d7cdfc0ed1f4198d6f78c7822a02Dan Gohman 7571049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner OS << "\n"; 7581049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner} 7591049164aa6b06d91d9b3b557a9a213eaf3f6319aChris Lattner 760b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Andersonbool MachineInstr::addRegisterKilled(unsigned IncomingReg, 7616f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 762b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound) { 7639b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); 7642ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg); 7659b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng SmallVector<unsigned,4> DeadOps; 7664a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 7674a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling MachineOperand &MO = getOperand(i); 7689b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (!MO.isRegister() || !MO.isUse()) 7699b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng continue; 7709b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned Reg = MO.getReg(); 7719b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (!Reg) 7729b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng continue; 7734a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling 7749b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (Reg == IncomingReg) { 7752ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman MO.setIsKill(); 7762ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return true; 7772ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman } 7782ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman if (hasAliases && MO.isKill() && 7792ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman TargetRegisterInfo::isPhysicalRegister(Reg)) { 7809b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // A super-register kill already exists. 7819b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (RegInfo->isSuperRegister(IncomingReg, Reg)) 7822ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return true; 7832ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman if (RegInfo->isSubRegister(IncomingReg, Reg)) 7849b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.push_back(i); 785b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 786b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 787b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 7889b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // Trim unneeded kill operands. 7899b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng while (!DeadOps.empty()) { 7909b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned OpIdx = DeadOps.back(); 7919b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (getOperand(OpIdx).isImplicit()) 7929b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng RemoveOperand(OpIdx); 7939b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng else 7949b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng getOperand(OpIdx).setIsKill(false); 7959b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.pop_back(); 7969b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng } 7979b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng 7984a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling // If not found, this means an alias of one of the operands is killed. Add a 799b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson // new implicit operand if required. 8002ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman if (AddIfNotFound) { 8014a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling addOperand(MachineOperand::CreateReg(IncomingReg, 8024a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling false /*IsDef*/, 8034a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling true /*IsImp*/, 8044a23d72ec21d1bdfda69fd16c9fc10cec39f1fedBill Wendling true /*IsKill*/)); 805b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson return true; 806b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 8072ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return false; 808b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson} 809b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 810b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Andersonbool MachineInstr::addRegisterDead(unsigned IncomingReg, 8116f0d024a534af18d9e60b3ea757376cd8a3a980eDan Gohman const TargetRegisterInfo *RegInfo, 812b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson bool AddIfNotFound) { 8139b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng bool isPhysReg = TargetRegisterInfo::isPhysicalRegister(IncomingReg); 81401b2e236b571e7c22ee8493b7ea19eda9830d75cEvan Cheng bool hasAliases = isPhysReg && RegInfo->getAliasSet(IncomingReg); 8159b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng SmallVector<unsigned,4> DeadOps; 816b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson for (unsigned i = 0, e = getNumOperands(); i != e; ++i) { 817b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson MachineOperand &MO = getOperand(i); 8189b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (!MO.isRegister() || !MO.isDef()) 8199b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng continue; 8209b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned Reg = MO.getReg(); 8219b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (Reg == IncomingReg) { 8229b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng MO.setIsDead(); 8232ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return true; 8242ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman } 8252ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman if (hasAliases && MO.isDead() && 8262ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman TargetRegisterInfo::isPhysicalRegister(Reg)) { 8279b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // There exists a super-register that's marked dead. 8289b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (RegInfo->isSuperRegister(IncomingReg, Reg)) 8292ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return true; 8302ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman if (RegInfo->isSubRegister(IncomingReg, Reg)) 8319b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.push_back(i); 832b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 833b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 834b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson 8359b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng // Trim unneeded dead operands. 8369b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng while (!DeadOps.empty()) { 8379b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng unsigned OpIdx = DeadOps.back(); 8389b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng if (getOperand(OpIdx).isImplicit()) 8399b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng RemoveOperand(OpIdx); 8409b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng else 8419b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng getOperand(OpIdx).setIsDead(false); 8429b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng DeadOps.pop_back(); 8439b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng } 8449b6d7b9fb36b5cf87d291881dfcea399796f7826Evan Cheng 845b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson // If not found, this means an alias of one of the operand is dead. Add a 846b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson // new implicit operand. 8472ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman if (AddIfNotFound) { 848b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson addOperand(MachineOperand::CreateReg(IncomingReg, true/*IsDef*/, 849b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson true/*IsImp*/,false/*IsKill*/, 850b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson true/*IsDead*/)); 851b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson return true; 852b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson } 8532ebc11ac6d19ec806da97bd4f2d49a27932d09fbDan Gohman return false; 854b487e7215c4f70f3d98f8fbc0a11eb119afc1f37Owen Anderson} 855