MachineInstr.cpp revision 5f222be33b97130f9a858851ced893df2ee11586 
1//===-- MachineInstr.cpp --------------------------------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// Methods common to all machine instructions.
11//
12//===----------------------------------------------------------------------===//
13
14#include "llvm/CodeGen/MachineInstr.h"
15#include "llvm/CodeGen/MachineFunction.h"
16#include "llvm/Target/TargetMachine.h"
17#include "llvm/Target/TargetInstrInfo.h"
18#include "llvm/Target/MRegisterInfo.h"
19#include "llvm/Support/LeakDetector.h"
20#include "llvm/Support/Streams.h"
21#include <ostream>
22using namespace llvm;
23
24/// MachineInstr ctor - This constructor creates a dummy MachineInstr with
25/// TID NULL and no operands.
26MachineInstr::MachineInstr()
27  : TID(0), NumImplicitOps(0), parent(0) {
28  // Make sure that we get added to a machine basicblock
29  LeakDetector::addGarbageObject(this);
30}
31
32void MachineInstr::addImplicitDefUseOperands() {
33  if (TID->ImplicitDefs)
34    for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs) {
35      MachineOperand Op;
36      Op.opType = MachineOperand::MO_Register;
37      Op.IsDef = true;
38      Op.IsImp = true;
39      Op.IsKill = false;
40      Op.IsDead = false;
41      Op.contents.RegNo = *ImpDefs;
42      Operands.push_back(Op);
43    }
44  if (TID->ImplicitUses)
45    for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses) {
46      MachineOperand Op;
47      Op.opType = MachineOperand::MO_Register;
48      Op.IsDef = false;
49      Op.IsImp = true;
50      Op.IsKill = false;
51      Op.IsDead = false;
52      Op.contents.RegNo = *ImpUses;
53      Operands.push_back(Op);
54    }
55}
56
57/// MachineInstr ctor - This constructor create a MachineInstr and add the
58/// implicit operands. It reserves space for number of operands specified by
59/// TargetInstrDescriptor or the numOperands if it is not zero. (for
60/// instructions with variable number of operands).
61MachineInstr::MachineInstr(const TargetInstrDescriptor &tid)
62  : TID(&tid), NumImplicitOps(0), parent(0) {
63  if (TID->ImplicitDefs)
64    for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
65      NumImplicitOps++;
66  if (TID->ImplicitUses)
67    for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
68      NumImplicitOps++;
69  Operands.reserve(NumImplicitOps + TID->numOperands);
70  addImplicitDefUseOperands();
71  // Make sure that we get added to a machine basicblock
72  LeakDetector::addGarbageObject(this);
73}
74
75/// MachineInstr ctor - Work exactly the same as the ctor above, except that the
76/// MachineInstr is created and added to the end of the specified basic block.
77///
78MachineInstr::MachineInstr(MachineBasicBlock *MBB,
79                           const TargetInstrDescriptor &tid)
80  : TID(&tid), NumImplicitOps(0), parent(0) {
81  assert(MBB && "Cannot use inserting ctor with null basic block!");
82  if (TID->ImplicitDefs)
83    for (const unsigned *ImpDefs = TID->ImplicitDefs; *ImpDefs; ++ImpDefs)
84      NumImplicitOps++;
85  if (TID->ImplicitUses)
86    for (const unsigned *ImpUses = TID->ImplicitUses; *ImpUses; ++ImpUses)
87      NumImplicitOps++;
88  Operands.reserve(NumImplicitOps + TID->numOperands);
89  addImplicitDefUseOperands();
90  // Make sure that we get added to a machine basicblock
91  LeakDetector::addGarbageObject(this);
92  MBB->push_back(this);  // Add instruction to end of basic block!
93}
94
95/// MachineInstr ctor - Copies MachineInstr arg exactly
96///
97MachineInstr::MachineInstr(const MachineInstr &MI) {
98  TID = MI.getInstrDescriptor();
99  NumImplicitOps = MI.NumImplicitOps;
100  Operands.reserve(MI.getNumOperands());
101
102  // Add operands
103  for (unsigned i = 0; i != MI.getNumOperands(); ++i)
104    Operands.push_back(MI.getOperand(i));
105
106  // Set parent, next, and prev to null
107  parent = 0;
108  prev = 0;
109  next = 0;
110}
111
112
113MachineInstr::~MachineInstr() {
114  LeakDetector::removeGarbageObject(this);
115}
116
117/// getOpcode - Returns the opcode of this MachineInstr.
118///
119int MachineInstr::getOpcode() const {
120  return TID->Opcode;
121}
122
123/// removeFromParent - This method unlinks 'this' from the containing basic
124/// block, and returns it, but does not delete it.
125MachineInstr *MachineInstr::removeFromParent() {
126  assert(getParent() && "Not embedded in a basic block!");
127  getParent()->remove(this);
128  return this;
129}
130
131
132/// OperandComplete - Return true if it's illegal to add a new operand
133///
134bool MachineInstr::OperandsComplete() const {
135  unsigned short NumOperands = TID->numOperands;
136  if ((TID->Flags & M_VARIABLE_OPS) == 0 &&
137      getNumOperands()-NumImplicitOps >= NumOperands)
138    return true;  // Broken: we have all the operands of this instruction!
139  return false;
140}
141
142/// getNumExplicitOperands - Returns the number of non-implicit operands.
143///
144unsigned MachineInstr::getNumExplicitOperands() const {
145  unsigned NumOperands = TID->numOperands;
146  if ((TID->Flags & M_VARIABLE_OPS) == 0)
147    return NumOperands;
148
149  for (unsigned e = getNumOperands(); NumOperands != e; ++NumOperands) {
150    const MachineOperand &MO = getOperand(NumOperands);
151    if (!MO.isRegister() || !MO.isImplicit())
152      NumOperands++;
153  }
154  return NumOperands;
155}
156
157/// isIdenticalTo - Return true if this operand is identical to the specified
158/// operand.
159bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
160  if (getType() != Other.getType()) return false;
161
162  switch (getType()) {
163  default: assert(0 && "Unrecognized operand type");
164  case MachineOperand::MO_Register:
165    return getReg() == Other.getReg() && isDef() == Other.isDef();
166  case MachineOperand::MO_Immediate:
167    return getImm() == Other.getImm();
168  case MachineOperand::MO_MachineBasicBlock:
169    return getMBB() == Other.getMBB();
170  case MachineOperand::MO_FrameIndex:
171    return getFrameIndex() == Other.getFrameIndex();
172  case MachineOperand::MO_ConstantPoolIndex:
173    return getConstantPoolIndex() == Other.getConstantPoolIndex() &&
174           getOffset() == Other.getOffset();
175  case MachineOperand::MO_JumpTableIndex:
176    return getJumpTableIndex() == Other.getJumpTableIndex();
177  case MachineOperand::MO_GlobalAddress:
178    return getGlobal() == Other.getGlobal() && getOffset() == Other.getOffset();
179  case MachineOperand::MO_ExternalSymbol:
180    return !strcmp(getSymbolName(), Other.getSymbolName()) &&
181           getOffset() == Other.getOffset();
182  }
183}
184
185/// findRegisterUseOperandIdx() - Returns the MachineOperand that is a use of
186/// the specific register or -1 if it is not found. It further tightening
187/// the search criteria to a use that kills the register if isKill is true.
188int MachineInstr::findRegisterUseOperandIdx(unsigned Reg, bool isKill) const {
189  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
190    const MachineOperand &MO = getOperand(i);
191    if (MO.isReg() && MO.isUse() && MO.getReg() == Reg)
192      if (!isKill || MO.isKill())
193        return i;
194  }
195  return -1;
196}
197
198/// findRegisterDefOperand() - Returns the MachineOperand that is a def of
199/// the specific register or NULL if it is not found.
200MachineOperand *MachineInstr::findRegisterDefOperand(unsigned Reg) {
201  for (unsigned i = 0, e = getNumOperands(); i != e; ++i) {
202    MachineOperand &MO = getOperand(i);
203    if (MO.isReg() && MO.isDef() && MO.getReg() == Reg)
204      return &MO;
205  }
206  return NULL;
207}
208
209/// findFirstPredOperandIdx() - Find the index of the first operand in the
210/// operand list that is used to represent the predicate. It returns -1 if
211/// none is found.
212int MachineInstr::findFirstPredOperandIdx() const {
213  const TargetInstrDescriptor *TID = getInstrDescriptor();
214  if (TID->Flags & M_PREDICABLE) {
215    for (unsigned i = 0, e = getNumOperands(); i != e; ++i)
216      if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND))
217        return i;
218  }
219
220  return -1;
221}
222
223/// copyKillDeadInfo - Copies kill / dead operand properties from MI.
224///
225void MachineInstr::copyKillDeadInfo(const MachineInstr *MI) {
226  for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
227    const MachineOperand &MO = MI->getOperand(i);
228    if (!MO.isReg() || (!MO.isKill() && !MO.isDead()))
229      continue;
230    for (unsigned j = 0, ee = getNumOperands(); j != ee; ++j) {
231      MachineOperand &MOp = getOperand(j);
232      if (!MOp.isIdenticalTo(MO))
233        continue;
234      if (MO.isKill())
235        MOp.setIsKill();
236      else
237        MOp.setIsDead();
238      break;
239    }
240  }
241}
242
243/// copyPredicates - Copies predicate operand(s) from MI.
244void MachineInstr::copyPredicates(const MachineInstr *MI) {
245  const TargetInstrDescriptor *TID = MI->getInstrDescriptor();
246  if (TID->Flags & M_PREDICABLE) {
247    for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
248      if ((TID->OpInfo[i].Flags & M_PREDICATE_OPERAND)) {
249        const MachineOperand &MO = MI->getOperand(i);
250        // Predicated operands must be last operands.
251        if (MO.isReg())
252          addRegOperand(MO.getReg(), false);
253        else {
254          addImmOperand(MO.getImm());
255        }
256      }
257    }
258  }
259}
260
261void MachineInstr::dump() const {
262  cerr << "  " << *this;
263}
264
265static inline void OutputReg(std::ostream &os, unsigned RegNo,
266                             const MRegisterInfo *MRI = 0) {
267  if (!RegNo || MRegisterInfo::isPhysicalRegister(RegNo)) {
268    if (MRI)
269      os << "%" << MRI->get(RegNo).Name;
270    else
271      os << "%mreg(" << RegNo << ")";
272  } else
273    os << "%reg" << RegNo;
274}
275
276static void print(const MachineOperand &MO, std::ostream &OS,
277                  const TargetMachine *TM) {
278  const MRegisterInfo *MRI = 0;
279
280  if (TM) MRI = TM->getRegisterInfo();
281
282  switch (MO.getType()) {
283  case MachineOperand::MO_Register:
284    OutputReg(OS, MO.getReg(), MRI);
285    break;
286  case MachineOperand::MO_Immediate:
287    OS << MO.getImmedValue();
288    break;
289  case MachineOperand::MO_MachineBasicBlock:
290    OS << "mbb<"
291       << ((Value*)MO.getMachineBasicBlock()->getBasicBlock())->getName()
292       << "," << (void*)MO.getMachineBasicBlock() << ">";
293    break;
294  case MachineOperand::MO_FrameIndex:
295    OS << "<fi#" << MO.getFrameIndex() << ">";
296    break;
297  case MachineOperand::MO_ConstantPoolIndex:
298    OS << "<cp#" << MO.getConstantPoolIndex() << ">";
299    break;
300  case MachineOperand::MO_JumpTableIndex:
301    OS << "<jt#" << MO.getJumpTableIndex() << ">";
302    break;
303  case MachineOperand::MO_GlobalAddress:
304    OS << "<ga:" << ((Value*)MO.getGlobal())->getName();
305    if (MO.getOffset()) OS << "+" << MO.getOffset();
306    OS << ">";
307    break;
308  case MachineOperand::MO_ExternalSymbol:
309    OS << "<es:" << MO.getSymbolName();
310    if (MO.getOffset()) OS << "+" << MO.getOffset();
311    OS << ">";
312    break;
313  default:
314    assert(0 && "Unrecognized operand type");
315  }
316}
317
318void MachineInstr::print(std::ostream &OS, const TargetMachine *TM) const {
319  unsigned StartOp = 0;
320
321   // Specialize printing if op#0 is definition
322  if (getNumOperands() && getOperand(0).isReg() && getOperand(0).isDef()) {
323    ::print(getOperand(0), OS, TM);
324    if (getOperand(0).isDead())
325      OS << "<dead>";
326    OS << " = ";
327    ++StartOp;   // Don't print this operand again!
328  }
329
330  if (TID)
331    OS << TID->Name;
332
333  for (unsigned i = StartOp, e = getNumOperands(); i != e; ++i) {
334    const MachineOperand& mop = getOperand(i);
335    if (i != StartOp)
336      OS << ",";
337    OS << " ";
338    ::print(mop, OS, TM);
339
340    if (mop.isReg()) {
341      if (mop.isDef() || mop.isKill() || mop.isDead() || mop.isImplicit()) {
342        OS << "<";
343        bool NeedComma = false;
344        if (mop.isImplicit()) {
345          OS << (mop.isDef() ? "imp-def" : "imp-use");
346          NeedComma = true;
347        } else if (mop.isDef()) {
348          OS << "def";
349          NeedComma = true;
350        }
351        if (mop.isKill() || mop.isDead()) {
352          if (NeedComma)
353            OS << ",";
354          if (mop.isKill())
355            OS << "kill";
356          if (mop.isDead())
357            OS << "dead";
358        }
359        OS << ">";
360      }
361    }
362  }
363
364  OS << "\n";
365}
366
367void MachineInstr::print(std::ostream &os) const {
368  // If the instruction is embedded into a basic block, we can find the target
369  // info for the instruction.
370  if (const MachineBasicBlock *MBB = getParent()) {
371    const MachineFunction *MF = MBB->getParent();
372    if (MF)
373      print(os, &MF->getTarget());
374    else
375      print(os, 0);
376  }
377
378  // Otherwise, print it out in the "raw" format without symbolic register names
379  // and such.
380  os << getInstrDescriptor()->Name;
381
382  for (unsigned i = 0, N = getNumOperands(); i < N; i++) {
383    os << "\t" << getOperand(i);
384    if (getOperand(i).isReg() && getOperand(i).isDef())
385      os << "<d>";
386  }
387
388  os << "\n";
389}
390
391void MachineOperand::print(std::ostream &OS) const {
392  switch (getType()) {
393  case MO_Register:
394    OutputReg(OS, getReg());
395    break;
396  case MO_Immediate:
397    OS << (long)getImmedValue();
398    break;
399  case MO_MachineBasicBlock:
400    OS << "<mbb:"
401       << ((Value*)getMachineBasicBlock()->getBasicBlock())->getName()
402       << "@" << (void*)getMachineBasicBlock() << ">";
403    break;
404  case MO_FrameIndex:
405    OS << "<fi#" << getFrameIndex() << ">";
406    break;
407  case MO_ConstantPoolIndex:
408    OS << "<cp#" << getConstantPoolIndex() << ">";
409    break;
410  case MO_JumpTableIndex:
411    OS << "<jt#" << getJumpTableIndex() << ">";
412    break;
413  case MO_GlobalAddress:
414    OS << "<ga:" << ((Value*)getGlobal())->getName() << ">";
415    break;
416  case MO_ExternalSymbol:
417    OS << "<es:" << getSymbolName() << ">";
418    break;
419  default:
420    assert(0 && "Unrecognized operand type");
421    break;
422  }
423}
424
425