MachineLICM.cpp revision 14ba7ae05473dc47aa9092fcfc897f8d357e325b
1//===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file was developed by Bill Wendling and is distributed under the 6// University of Illinois Open Source License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass performs loop invariant code motion on machine instructions. We 11// attempt to remove as much code from the body of a loop as possible. 12// 13//===----------------------------------------------------------------------===// 14 15#define DEBUG_TYPE "machine-licm" 16#include "llvm/ADT/IndexedMap.h" 17#include "llvm/ADT/SmallVector.h" 18#include "llvm/ADT/Statistic.h" 19#include "llvm/CodeGen/MachineBasicBlock.h" 20#include "llvm/CodeGen/MachineDominators.h" 21#include "llvm/CodeGen/MachineInstr.h" 22#include "llvm/CodeGen/MachineLoopInfo.h" 23#include "llvm/CodeGen/Passes.h" 24#include "llvm/Target/TargetInstrInfo.h" 25#include "llvm/Support/CFG.h" 26#include "llvm/Support/CommandLine.h" 27#include "llvm/Support/Compiler.h" 28#include "llvm/Support/Debug.h" 29#include "llvm/Target/MRegisterInfo.h" 30#include "llvm/Target/TargetMachine.h" 31 32using namespace llvm; 33 34namespace { 35 // Hidden options to help debugging 36 cl::opt<bool> 37 PerformLICM("machine-licm", 38 cl::init(false), cl::Hidden, 39 cl::desc("Perform loop-invariant code motion on machine code")); 40} 41 42STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops"); 43 44namespace { 45 class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass { 46 MachineFunction *CurMF;// Current MachineFunction 47 48 // Various analyses that we use... 49 MachineLoopInfo *LI; // Current MachineLoopInfo 50 MachineDominatorTree *DT; // Machine dominator tree for the current Loop 51 52 const TargetInstrInfo *TII; 53 54 // State that is updated as we process loops 55 bool Changed; // True if a loop is changed. 56 MachineLoop *CurLoop; // The current loop we are working on. 57 58 // Map the def of a virtual register to the machine instruction. 59 IndexedMap<const MachineInstr*, VirtReg2IndexFunctor> VRegDefs; 60 public: 61 static char ID; // Pass identification, replacement for typeid 62 MachineLICM() : MachineFunctionPass((intptr_t)&ID) {} 63 64 virtual bool runOnMachineFunction(MachineFunction &MF); 65 66 /// FIXME: Loop preheaders? 67 /// 68 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 69 AU.setPreservesCFG(); 70 AU.addRequired<MachineLoopInfo>(); 71 AU.addRequired<MachineDominatorTree>(); 72 } 73 private: 74 /// VisitAllLoops - Visit all of the loops in depth first order and try to 75 /// hoist invariant instructions from them. 76 /// 77 void VisitAllLoops(MachineLoop *L) { 78 const std::vector<MachineLoop*> &SubLoops = L->getSubLoops(); 79 80 for (MachineLoop::iterator 81 I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I) { 82 MachineLoop *ML = *I; 83 84 // Traverse the body of the loop in depth first order on the dominator 85 // tree so that we are guaranteed to see definitions before we see uses. 86 VisitAllLoops(ML); 87 HoistRegion(DT->getNode(ML->getHeader())); 88 } 89 90 HoistRegion(DT->getNode(L->getHeader())); 91 } 92 93 /// MapVirtualRegisterDefs - Create a map of which machine instruction 94 /// defines a virtual register. 95 /// 96 void MapVirtualRegisterDefs(); 97 98 /// IsInSubLoop - A little predicate that returns true if the specified 99 /// basic block is in a subloop of the current one, not the current one 100 /// itself. 101 /// 102 bool IsInSubLoop(MachineBasicBlock *BB) { 103 assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop"); 104 return LI->getLoopFor(BB) != CurLoop; 105 } 106 107 /// CanHoistInst - Checks that this instructions is one that can be hoisted 108 /// out of the loop. I.e., it has no side effects, isn't a control flow 109 /// instr, etc. 110 /// 111 bool CanHoistInst(MachineInstr &I) const { 112 const TargetInstrDescriptor *TID = I.getInstrDescriptor(); 113 114 // Don't hoist if this instruction implicitly reads physical registers. 115 if (TID->ImplicitUses) return false; 116 117 MachineOpCode Opcode = TID->Opcode; 118 return TII->isTriviallyReMaterializable(&I) && 119 // FIXME: Below necessary? 120 !(TII->isReturn(Opcode) || 121 TII->isTerminatorInstr(Opcode) || 122 TII->isBranch(Opcode) || 123 TII->isIndirectBranch(Opcode) || 124 TII->isBarrier(Opcode) || 125 TII->isCall(Opcode) || 126 TII->isLoad(Opcode) || // TODO: Do loads and stores. 127 TII->isStore(Opcode)); 128 } 129 130 /// IsLoopInvariantInst - Returns true if the instruction is loop 131 /// invariant. I.e., all virtual register operands are defined outside of 132 /// the loop, physical registers aren't accessed (explicitly or implicitly), 133 /// and the instruction is hoistable. 134 /// 135 bool IsLoopInvariantInst(MachineInstr &I); 136 137 /// FindPredecessors - Get all of the predecessors of the loop that are not 138 /// back-edges. 139 /// 140 void FindPredecessors(std::vector<MachineBasicBlock*> &Preds) { 141 const MachineBasicBlock *Header = CurLoop->getHeader(); 142 143 for (MachineBasicBlock::const_pred_iterator 144 I = Header->pred_begin(), E = Header->pred_end(); I != E; ++I) 145 if (!CurLoop->contains(*I)) 146 Preds.push_back(*I); 147 } 148 149 /// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of 150 /// the predecessor basic block (but before the terminator instructions). 151 /// 152 void MoveInstToEndOfBlock(MachineBasicBlock *MBB, MachineInstr *MI) { 153 MachineBasicBlock::iterator Iter = MBB->getFirstTerminator(); 154 MBB->insert(Iter, MI); 155 ++NumHoisted; 156 } 157 158 /// HoistRegion - Walk the specified region of the CFG (defined by all 159 /// blocks dominated by the specified block, and that are in the current 160 /// loop) in depth first order w.r.t the DominatorTree. This allows us to 161 /// visit definitions before uses, allowing us to hoist a loop body in one 162 /// pass without iteration. 163 /// 164 void HoistRegion(MachineDomTreeNode *N); 165 166 /// Hoist - When an instruction is found to only use loop invariant operands 167 /// that is safe to hoist, this instruction is called to do the dirty work. 168 /// 169 void Hoist(MachineInstr &MI); 170 }; 171 172 char MachineLICM::ID = 0; 173 RegisterPass<MachineLICM> X("machine-licm", 174 "Machine Loop Invariant Code Motion"); 175} // end anonymous namespace 176 177FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); } 178 179/// Hoist expressions out of the specified loop. Note, alias info for inner loop 180/// is not preserved so it is not a good idea to run LICM multiple times on one 181/// loop. 182/// 183bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { 184 if (!PerformLICM) return false; // For debugging. 185 186 DOUT << "******** Machine LICM ********\n"; 187 188 Changed = false; 189 CurMF = &MF; 190 TII = CurMF->getTarget().getInstrInfo(); 191 192 // Get our Loop information... 193 LI = &getAnalysis<MachineLoopInfo>(); 194 DT = &getAnalysis<MachineDominatorTree>(); 195 196 MapVirtualRegisterDefs(); 197 198 for (MachineLoopInfo::iterator 199 I = LI->begin(), E = LI->end(); I != E; ++I) { 200 CurLoop = *I; 201 202 // Visit all of the instructions of the loop. We want to visit the subloops 203 // first, though, so that we can hoist their invariants first into their 204 // containing loop before we process that loop. 205 VisitAllLoops(CurLoop); 206 } 207 208 return Changed; 209} 210 211/// MapVirtualRegisterDefs - Create a map of which machine instruction defines a 212/// virtual register. 213/// 214void MachineLICM::MapVirtualRegisterDefs() { 215 for (MachineFunction::const_iterator 216 I = CurMF->begin(), E = CurMF->end(); I != E; ++I) { 217 const MachineBasicBlock &MBB = *I; 218 219 for (MachineBasicBlock::const_iterator 220 II = MBB.begin(), IE = MBB.end(); II != IE; ++II) { 221 const MachineInstr &MI = *II; 222 223 for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { 224 const MachineOperand &MO = MI.getOperand(i); 225 226 if (MO.isRegister() && MO.isDef() && 227 MRegisterInfo::isVirtualRegister(MO.getReg())) 228 VRegDefs[MO.getReg()] = &MI; 229 } 230 } 231 } 232} 233 234/// HoistRegion - Walk the specified region of the CFG (defined by all blocks 235/// dominated by the specified block, and that are in the current loop) in depth 236/// first order w.r.t the DominatorTree. This allows us to visit definitions 237/// before uses, allowing us to hoist a loop body in one pass without iteration. 238/// 239void MachineLICM::HoistRegion(MachineDomTreeNode *N) { 240 assert(N != 0 && "Null dominator tree node?"); 241 MachineBasicBlock *BB = N->getBlock(); 242 243 // If this subregion is not in the top level loop at all, exit. 244 if (!CurLoop->contains(BB)) return; 245 246 // Only need to process the contents of this block if it is not part of a 247 // subloop (which would already have been processed). 248 if (!IsInSubLoop(BB)) 249 for (MachineBasicBlock::iterator 250 I = BB->begin(), E = BB->end(); I != E; ) { 251 MachineInstr &MI = *I++; 252 253 // Try hoisting the instruction out of the loop. We can only do this if 254 // all of the operands of the instruction are loop invariant and if it is 255 // safe to hoist the instruction. 256 Hoist(MI); 257 } 258 259 const std::vector<MachineDomTreeNode*> &Children = N->getChildren(); 260 261 for (unsigned I = 0, E = Children.size(); I != E; ++I) 262 HoistRegion(Children[I]); 263} 264 265/// IsLoopInvariantInst - Returns true if the instruction is loop 266/// invariant. I.e., all virtual register operands are defined outside of the 267/// loop, physical registers aren't accessed (explicitly or implicitly), and the 268/// instruction is hoistable. 269/// 270bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { 271 if (!CanHoistInst(I)) return false; 272 273 // The instruction is loop invariant if all of its operands are loop-invariant 274 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { 275 const MachineOperand &MO = I.getOperand(i); 276 277 if (!MO.isRegister() || !MO.isUse()) 278 continue; 279 280 unsigned Reg = MO.getReg(); 281 282 // Don't hoist instructions that access physical registers. 283 if (!MRegisterInfo::isVirtualRegister(Reg)) 284 return false; 285 286 assert(VRegDefs[Reg] && "Machine instr not mapped for this vreg?"); 287 288 // If the loop contains the definition of an operand, then the instruction 289 // isn't loop invariant. 290 if (CurLoop->contains(VRegDefs[Reg]->getParent())) 291 return false; 292 } 293 294 // If we got this far, the instruction is loop invariant! 295 return true; 296} 297 298/// Hoist - When an instruction is found to only use loop invariant operands 299/// that is safe to hoist, this instruction is called to do the dirty work. 300/// 301void MachineLICM::Hoist(MachineInstr &MI) { 302 if (!IsLoopInvariantInst(MI)) return; 303 304 std::vector<MachineBasicBlock*> Preds; 305 306 // Non-back-edge predecessors. 307 FindPredecessors(Preds); 308 309 // Either we don't have any predecessors(?!) or we have more than one, which 310 // is forbidden. 311 if (Preds.empty() || Preds.size() != 1) return; 312 313 // Check that the predecessor is qualified to take the hoisted 314 // instruction. I.e., there is only one edge from the predecessor, and it's to 315 // the loop header. 316 MachineBasicBlock *MBB = Preds.front(); 317 318 // FIXME: We are assuming at first that the basic block coming into this loop 319 // has only one successor. This isn't the case in general because we haven't 320 // broken critical edges or added preheaders. 321 if (MBB->succ_size() != 1) return; 322 assert(*MBB->succ_begin() == CurLoop->getHeader() && 323 "The predecessor doesn't feed directly into the loop header!"); 324 325 // Now move the instructions to the predecessor. 326 MachineInstr *NewMI = MI.clone(); 327 MoveInstToEndOfBlock(MBB, NewMI); 328 329 // Update VRegDefs. 330 for (unsigned i = 0, e = NewMI->getNumOperands(); i != e; ++i) { 331 const MachineOperand &MO = NewMI->getOperand(i); 332 333 if (MO.isRegister() && MO.isDef() && 334 MRegisterInfo::isVirtualRegister(MO.getReg())) 335 VRegDefs[MO.getReg()] = NewMI; 336 } 337 338 // Hoisting was successful! Remove bothersome instruction now. 339 MI.getParent()->remove(&MI); 340 Changed = true; 341} 342