MachineLICM.cpp revision c24a3f87f866e96b2a9ad691c78113651eaa77d1
1//===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass performs loop invariant code motion on machine instructions. We 11// attempt to remove as much code from the body of a loop as possible. 12// 13//===----------------------------------------------------------------------===// 14 15#define DEBUG_TYPE "machine-licm" 16#include "llvm/CodeGen/Passes.h" 17#include "llvm/CodeGen/MachineDominators.h" 18#include "llvm/CodeGen/MachineLoopInfo.h" 19#include "llvm/CodeGen/MachineRegisterInfo.h" 20#include "llvm/Target/TargetRegisterInfo.h" 21#include "llvm/Target/TargetInstrInfo.h" 22#include "llvm/Target/TargetMachine.h" 23#include "llvm/ADT/Statistic.h" 24#include "llvm/Support/CommandLine.h" 25#include "llvm/Support/Compiler.h" 26#include "llvm/Support/Debug.h" 27 28using namespace llvm; 29 30STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops"); 31 32namespace { 33 class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass { 34 const TargetMachine *TM; 35 const TargetInstrInfo *TII; 36 37 // Various analyses that we use... 38 MachineLoopInfo *LI; // Current MachineLoopInfo 39 MachineDominatorTree *DT; // Machine dominator tree for the cur loop 40 MachineRegisterInfo *RegInfo; // Machine register information 41 42 // State that is updated as we process loops 43 bool Changed; // True if a loop is changed. 44 MachineLoop *CurLoop; // The current loop we are working on. 45 public: 46 static char ID; // Pass identification, replacement for typeid 47 MachineLICM() : MachineFunctionPass(&ID) {} 48 49 virtual bool runOnMachineFunction(MachineFunction &MF); 50 51 const char *getPassName() const { return "Machine Instruction LICM"; } 52 53 // FIXME: Loop preheaders? 54 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 55 AU.setPreservesCFG(); 56 AU.addRequired<MachineLoopInfo>(); 57 AU.addRequired<MachineDominatorTree>(); 58 AU.addPreserved<MachineLoopInfo>(); 59 AU.addPreserved<MachineDominatorTree>(); 60 MachineFunctionPass::getAnalysisUsage(AU); 61 } 62 private: 63 /// VisitAllLoops - Visit all of the loops in depth first order and try to 64 /// hoist invariant instructions from them. 65 /// 66 void VisitAllLoops(MachineLoop *L) { 67 const std::vector<MachineLoop*> &SubLoops = L->getSubLoops(); 68 69 for (MachineLoop::iterator 70 I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I) { 71 MachineLoop *ML = *I; 72 73 // Traverse the body of the loop in depth first order on the dominator 74 // tree so that we are guaranteed to see definitions before we see uses. 75 VisitAllLoops(ML); 76 HoistRegion(DT->getNode(ML->getHeader())); 77 } 78 79 HoistRegion(DT->getNode(L->getHeader())); 80 } 81 82 /// IsInSubLoop - A little predicate that returns true if the specified 83 /// basic block is in a subloop of the current one, not the current one 84 /// itself. 85 /// 86 bool IsInSubLoop(MachineBasicBlock *BB) { 87 assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop"); 88 return LI->getLoopFor(BB) != CurLoop; 89 } 90 91 /// IsLoopInvariantInst - Returns true if the instruction is loop 92 /// invariant. I.e., all virtual register operands are defined outside of 93 /// the loop, physical registers aren't accessed (explicitly or implicitly), 94 /// and the instruction is hoistable. 95 /// 96 bool IsLoopInvariantInst(MachineInstr &I); 97 98 /// FindPredecessors - Get all of the predecessors of the loop that are not 99 /// back-edges. 100 /// 101 void FindPredecessors(std::vector<MachineBasicBlock*> &Preds) { 102 const MachineBasicBlock *Header = CurLoop->getHeader(); 103 104 for (MachineBasicBlock::const_pred_iterator 105 I = Header->pred_begin(), E = Header->pred_end(); I != E; ++I) 106 if (!CurLoop->contains(*I)) 107 Preds.push_back(*I); 108 } 109 110 /// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of 111 /// the predecessor basic block (but before the terminator instructions). 112 /// 113 void MoveInstToEndOfBlock(MachineBasicBlock *ToMBB, 114 MachineBasicBlock *FromMBB, 115 MachineInstr *MI); 116 117 /// HoistRegion - Walk the specified region of the CFG (defined by all 118 /// blocks dominated by the specified block, and that are in the current 119 /// loop) in depth first order w.r.t the DominatorTree. This allows us to 120 /// visit definitions before uses, allowing us to hoist a loop body in one 121 /// pass without iteration. 122 /// 123 void HoistRegion(MachineDomTreeNode *N); 124 125 /// Hoist - When an instruction is found to only use loop invariant operands 126 /// that is safe to hoist, this instruction is called to do the dirty work. 127 /// 128 void Hoist(MachineInstr &MI); 129 }; 130} // end anonymous namespace 131 132char MachineLICM::ID = 0; 133static RegisterPass<MachineLICM> 134X("machinelicm", "Machine Loop Invariant Code Motion"); 135 136FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); } 137 138/// Hoist expressions out of the specified loop. Note, alias info for inner loop 139/// is not preserved so it is not a good idea to run LICM multiple times on one 140/// loop. 141/// 142bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { 143 DOUT << "******** Machine LICM ********\n"; 144 145 Changed = false; 146 TM = &MF.getTarget(); 147 TII = TM->getInstrInfo(); 148 RegInfo = &MF.getRegInfo(); 149 150 // Get our Loop information... 151 LI = &getAnalysis<MachineLoopInfo>(); 152 DT = &getAnalysis<MachineDominatorTree>(); 153 154 for (MachineLoopInfo::iterator 155 I = LI->begin(), E = LI->end(); I != E; ++I) { 156 CurLoop = *I; 157 158 // Visit all of the instructions of the loop. We want to visit the subloops 159 // first, though, so that we can hoist their invariants first into their 160 // containing loop before we process that loop. 161 VisitAllLoops(CurLoop); 162 } 163 164 return Changed; 165} 166 167/// HoistRegion - Walk the specified region of the CFG (defined by all blocks 168/// dominated by the specified block, and that are in the current loop) in depth 169/// first order w.r.t the DominatorTree. This allows us to visit definitions 170/// before uses, allowing us to hoist a loop body in one pass without iteration. 171/// 172void MachineLICM::HoistRegion(MachineDomTreeNode *N) { 173 assert(N != 0 && "Null dominator tree node?"); 174 MachineBasicBlock *BB = N->getBlock(); 175 176 // If this subregion is not in the top level loop at all, exit. 177 if (!CurLoop->contains(BB)) return; 178 179 // Only need to process the contents of this block if it is not part of a 180 // subloop (which would already have been processed). 181 if (!IsInSubLoop(BB)) 182 for (MachineBasicBlock::iterator 183 I = BB->begin(), E = BB->end(); I != E; ) { 184 MachineInstr &MI = *I++; 185 186 // Try hoisting the instruction out of the loop. We can only do this if 187 // all of the operands of the instruction are loop invariant and if it is 188 // safe to hoist the instruction. 189 Hoist(MI); 190 } 191 192 const std::vector<MachineDomTreeNode*> &Children = N->getChildren(); 193 194 for (unsigned I = 0, E = Children.size(); I != E; ++I) 195 HoistRegion(Children[I]); 196} 197 198/// IsLoopInvariantInst - Returns true if the instruction is loop 199/// invariant. I.e., all virtual register operands are defined outside of the 200/// loop, physical registers aren't accessed explicitly, and there are no side 201/// effects that aren't captured by the operands or other flags. 202/// 203bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { 204 const TargetInstrDesc &TID = I.getDesc(); 205 206 // Ignore stuff that we obviously can't hoist. 207 if (TID.mayStore() || TID.isCall() || TID.isTerminator() || 208 TID.hasUnmodeledSideEffects()) 209 return false; 210 211 if (TID.mayLoad()) { 212 // Okay, this instruction does a load. As a refinement, we allow the target 213 // to decide whether the loaded value is actually a constant. If so, we can 214 // actually use it as a load. 215 if (!TII->isInvariantLoad(&I)) 216 // FIXME: we should be able to sink loads with no other side effects if 217 // there is nothing that can change memory from here until the end of 218 // block. This is a trivial form of alias analysis. 219 return false; 220 } 221 222 DEBUG({ 223 DOUT << "--- Checking if we can hoist " << I; 224 if (I.getDesc().getImplicitUses()) { 225 DOUT << " * Instruction has implicit uses:\n"; 226 227 const TargetRegisterInfo *TRI = TM->getRegisterInfo(); 228 for (const unsigned *ImpUses = I.getDesc().getImplicitUses(); 229 *ImpUses; ++ImpUses) 230 DOUT << " -> " << TRI->getName(*ImpUses) << "\n"; 231 } 232 233 if (I.getDesc().getImplicitDefs()) { 234 DOUT << " * Instruction has implicit defines:\n"; 235 236 const TargetRegisterInfo *TRI = TM->getRegisterInfo(); 237 for (const unsigned *ImpDefs = I.getDesc().getImplicitDefs(); 238 *ImpDefs; ++ImpDefs) 239 DOUT << " -> " << TRI->getName(*ImpDefs) << "\n"; 240 } 241 }); 242 243 if (I.getDesc().getImplicitDefs() || I.getDesc().getImplicitUses()) { 244 DOUT << "Cannot hoist with implicit defines or uses\n"; 245 return false; 246 } 247 248 // The instruction is loop invariant if all of its operands are. 249 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { 250 const MachineOperand &MO = I.getOperand(i); 251 252 if (!MO.isReg()) 253 continue; 254 255 if (MO.isDef() && TargetRegisterInfo::isPhysicalRegister(MO.getReg())) 256 // Don't hoist an instruction that defines a physical register. 257 return false; 258 259 if (!MO.isUse()) 260 continue; 261 262 unsigned Reg = MO.getReg(); 263 if (Reg == 0) continue; 264 265 // Don't hoist instructions that access physical registers. 266 if (TargetRegisterInfo::isPhysicalRegister(Reg)) 267 return false; 268 269 assert(RegInfo->getVRegDef(Reg) && 270 "Machine instr not mapped for this vreg?!"); 271 272 // If the loop contains the definition of an operand, then the instruction 273 // isn't loop invariant. 274 if (CurLoop->contains(RegInfo->getVRegDef(Reg)->getParent())) 275 return false; 276 } 277 278 // If we got this far, the instruction is loop invariant! 279 return true; 280} 281 282/// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of the 283/// predecessor basic block (but before the terminator instructions). 284/// 285void MachineLICM::MoveInstToEndOfBlock(MachineBasicBlock *ToMBB, 286 MachineBasicBlock *FromMBB, 287 MachineInstr *MI) { 288 DEBUG({ 289 DOUT << "Hoisting " << *MI; 290 if (ToMBB->getBasicBlock()) 291 DOUT << " to MachineBasicBlock " 292 << ToMBB->getBasicBlock()->getName(); 293 if (FromMBB->getBasicBlock()) 294 DOUT << " from MachineBasicBlock " 295 << FromMBB->getBasicBlock()->getName(); 296 DOUT << "\n"; 297 }); 298 299 MachineBasicBlock::iterator WhereIter = ToMBB->getFirstTerminator(); 300 MachineBasicBlock::iterator To, From = FromMBB->begin(); 301 302 while (&*From != MI) 303 ++From; 304 305 assert(From != FromMBB->end() && "Didn't find instr in BB!"); 306 307 To = From; 308 ToMBB->splice(WhereIter, FromMBB, From, ++To); 309 ++NumHoisted; 310} 311 312/// Hoist - When an instruction is found to use only loop invariant operands 313/// that are safe to hoist, this instruction is called to do the dirty work. 314/// 315void MachineLICM::Hoist(MachineInstr &MI) { 316 if (!IsLoopInvariantInst(MI)) return; 317 318 std::vector<MachineBasicBlock*> Preds; 319 320 // Non-back-edge predecessors. 321 FindPredecessors(Preds); 322 323 // Either we don't have any predecessors(?!) or we have more than one, which 324 // is forbidden. 325 if (Preds.empty() || Preds.size() != 1) return; 326 327 // Check that the predecessor is qualified to take the hoisted instruction. 328 // I.e., there is only one edge from the predecessor, and it's to the loop 329 // header. 330 MachineBasicBlock *MBB = Preds.front(); 331 332 // FIXME: We are assuming at first that the basic block coming into this loop 333 // has only one successor. This isn't the case in general because we haven't 334 // broken critical edges or added preheaders. 335 if (MBB->succ_size() != 1) return; 336 assert(*MBB->succ_begin() == CurLoop->getHeader() && 337 "The predecessor doesn't feed directly into the loop header!"); 338 339 // Now move the instructions to the predecessor. 340 MoveInstToEndOfBlock(MBB, MI.getParent(), &MI); 341 Changed = true; 342} 343