MachineLICM.cpp revision e6d088acc90e422451e098555d383d4d65b6ce6b
1//===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass performs loop invariant code motion on machine instructions. We 11// attempt to remove as much code from the body of a loop as possible. 12// 13//===----------------------------------------------------------------------===// 14 15#define DEBUG_TYPE "machine-licm" 16#include "llvm/CodeGen/Passes.h" 17#include "llvm/CodeGen/MachineDominators.h" 18#include "llvm/CodeGen/MachineLoopInfo.h" 19#include "llvm/CodeGen/MachineRegisterInfo.h" 20#include "llvm/Target/TargetRegisterInfo.h" 21#include "llvm/Target/TargetInstrInfo.h" 22#include "llvm/Target/TargetMachine.h" 23#include "llvm/ADT/SmallVector.h" 24#include "llvm/ADT/Statistic.h" 25#include "llvm/Support/CommandLine.h" 26#include "llvm/Support/Compiler.h" 27#include "llvm/Support/Debug.h" 28 29using namespace llvm; 30 31STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops"); 32 33namespace { 34 class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass { 35 const TargetMachine *TM; 36 const TargetInstrInfo *TII; 37 MachineFunction *CurMF; // Current MachineFunction 38 39 // Various analyses that we use... 40 MachineLoopInfo *LI; // Current MachineLoopInfo 41 MachineDominatorTree *DT; // Machine dominator tree for the current Loop 42 MachineRegisterInfo *RegInfo; // Machine register information 43 44 // State that is updated as we process loops 45 bool Changed; // True if a loop is changed. 46 MachineLoop *CurLoop; // The current loop we are working on. 47 public: 48 static char ID; // Pass identification, replacement for typeid 49 MachineLICM() : MachineFunctionPass((intptr_t)&ID) {} 50 51 virtual bool runOnMachineFunction(MachineFunction &MF); 52 53 /// FIXME: Loop preheaders? 54 /// 55 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 56 AU.setPreservesCFG(); 57 AU.addRequired<MachineLoopInfo>(); 58 AU.addRequired<MachineDominatorTree>(); 59 AU.addPreserved<MachineLoopInfo>(); 60 AU.addPreserved<MachineDominatorTree>(); 61 MachineFunctionPass::getAnalysisUsage(AU); 62 } 63 private: 64 /// VisitAllLoops - Visit all of the loops in depth first order and try to 65 /// hoist invariant instructions from them. 66 /// 67 void VisitAllLoops(MachineLoop *L) { 68 const std::vector<MachineLoop*> &SubLoops = L->getSubLoops(); 69 70 for (MachineLoop::iterator 71 I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I) { 72 MachineLoop *ML = *I; 73 74 // Traverse the body of the loop in depth first order on the dominator 75 // tree so that we are guaranteed to see definitions before we see uses. 76 VisitAllLoops(ML); 77 HoistRegion(DT->getNode(ML->getHeader())); 78 } 79 80 HoistRegion(DT->getNode(L->getHeader())); 81 } 82 83 /// IsInSubLoop - A little predicate that returns true if the specified 84 /// basic block is in a subloop of the current one, not the current one 85 /// itself. 86 /// 87 bool IsInSubLoop(MachineBasicBlock *BB) { 88 assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop"); 89 return LI->getLoopFor(BB) != CurLoop; 90 } 91 92 /// IsLoopInvariantInst - Returns true if the instruction is loop 93 /// invariant. I.e., all virtual register operands are defined outside of 94 /// the loop, physical registers aren't accessed (explicitly or implicitly), 95 /// and the instruction is hoistable. 96 /// 97 bool IsLoopInvariantInst(MachineInstr &I); 98 99 /// FindPredecessors - Get all of the predecessors of the loop that are not 100 /// back-edges. 101 /// 102 void FindPredecessors(std::vector<MachineBasicBlock*> &Preds) { 103 const MachineBasicBlock *Header = CurLoop->getHeader(); 104 105 for (MachineBasicBlock::const_pred_iterator 106 I = Header->pred_begin(), E = Header->pred_end(); I != E; ++I) 107 if (!CurLoop->contains(*I)) 108 Preds.push_back(*I); 109 } 110 111 /// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of 112 /// the predecessor basic block (but before the terminator instructions). 113 /// 114 void MoveInstToEndOfBlock(MachineBasicBlock *ToMBB, 115 MachineBasicBlock *FromMBB, 116 MachineInstr *MI) { 117 DEBUG({ 118 DOUT << "Hoisting " << *MI; 119 if (ToMBB->getBasicBlock()) 120 DOUT << " to MachineBasicBlock " 121 << ToMBB->getBasicBlock()->getName(); 122 DOUT << "\n"; 123 }); 124 125 MachineBasicBlock::iterator WhereIter = ToMBB->getFirstTerminator(); 126 MachineBasicBlock::iterator To, From = FromMBB->begin(); 127 128 while (&*From != MI) 129 ++From; 130 131 assert(From != FromMBB->end() && "Didn't find instr in BB!"); 132 133 To = From; 134 ToMBB->splice(WhereIter, FromMBB, From, ++To); 135 ++NumHoisted; 136 } 137 138 /// HoistRegion - Walk the specified region of the CFG (defined by all 139 /// blocks dominated by the specified block, and that are in the current 140 /// loop) in depth first order w.r.t the DominatorTree. This allows us to 141 /// visit definitions before uses, allowing us to hoist a loop body in one 142 /// pass without iteration. 143 /// 144 void HoistRegion(MachineDomTreeNode *N); 145 146 /// Hoist - When an instruction is found to only use loop invariant operands 147 /// that is safe to hoist, this instruction is called to do the dirty work. 148 /// 149 void Hoist(MachineInstr &MI); 150 }; 151 152 char MachineLICM::ID = 0; 153 RegisterPass<MachineLICM> X("machine-licm", 154 "Machine Loop Invariant Code Motion"); 155} // end anonymous namespace 156 157FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); } 158 159/// Hoist expressions out of the specified loop. Note, alias info for inner loop 160/// is not preserved so it is not a good idea to run LICM multiple times on one 161/// loop. 162/// 163bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { 164 DOUT << "******** Machine LICM ********\n"; 165 166 Changed = false; 167 CurMF = &MF; 168 TM = &CurMF->getTarget(); 169 TII = TM->getInstrInfo(); 170 RegInfo = &CurMF->getRegInfo(); 171 172 // Get our Loop information... 173 LI = &getAnalysis<MachineLoopInfo>(); 174 DT = &getAnalysis<MachineDominatorTree>(); 175 176 for (MachineLoopInfo::iterator 177 I = LI->begin(), E = LI->end(); I != E; ++I) { 178 CurLoop = *I; 179 180 // Visit all of the instructions of the loop. We want to visit the subloops 181 // first, though, so that we can hoist their invariants first into their 182 // containing loop before we process that loop. 183 VisitAllLoops(CurLoop); 184 } 185 186 return Changed; 187} 188 189/// HoistRegion - Walk the specified region of the CFG (defined by all blocks 190/// dominated by the specified block, and that are in the current loop) in depth 191/// first order w.r.t the DominatorTree. This allows us to visit definitions 192/// before uses, allowing us to hoist a loop body in one pass without iteration. 193/// 194void MachineLICM::HoistRegion(MachineDomTreeNode *N) { 195 assert(N != 0 && "Null dominator tree node?"); 196 MachineBasicBlock *BB = N->getBlock(); 197 198 // If this subregion is not in the top level loop at all, exit. 199 if (!CurLoop->contains(BB)) return; 200 201 // Only need to process the contents of this block if it is not part of a 202 // subloop (which would already have been processed). 203 if (!IsInSubLoop(BB)) 204 for (MachineBasicBlock::iterator 205 I = BB->begin(), E = BB->end(); I != E; ) { 206 MachineInstr &MI = *I++; 207 208 // Try hoisting the instruction out of the loop. We can only do this if 209 // all of the operands of the instruction are loop invariant and if it is 210 // safe to hoist the instruction. 211 Hoist(MI); 212 } 213 214 const std::vector<MachineDomTreeNode*> &Children = N->getChildren(); 215 216 for (unsigned I = 0, E = Children.size(); I != E; ++I) 217 HoistRegion(Children[I]); 218} 219 220/// IsLoopInvariantInst - Returns true if the instruction is loop 221/// invariant. I.e., all virtual register operands are defined outside of the 222/// loop, physical registers aren't accessed explicitly, and there are no side 223/// effects that aren't captured by the operands or other flags. 224/// 225bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { 226 const TargetInstrDesc &TID = I.getDesc(); 227 228 // Ignore stuff that we obviously can't hoist. 229 if (TID.mayStore() || TID.isCall() || TID.isReturn() || TID.isBranch() || 230 TID.hasUnmodeledSideEffects()) 231 return false; 232 233 if (TID.mayLoad()) { 234 // Okay, this instruction does a load. As a refinement, allow the target 235 // to decide whether the loaded value is actually a constant. If so, we 236 // can actually use it as a load. 237 if (!TII->isInvariantLoad(&I)) { 238 // FIXME: we should be able to sink loads with no other side effects if 239 // there is nothing that can change memory from here until the end of 240 // block. This is a trivial form of alias analysis. 241 return false; 242 } 243 } 244 245 246 DEBUG({ 247 DOUT << "--- Checking if we can hoist " << I; 248 if (I.getDesc().getImplicitUses()) { 249 DOUT << " * Instruction has implicit uses:\n"; 250 251 const TargetRegisterInfo *TRI = TM->getRegisterInfo(); 252 for (const unsigned *ImpUses = I.getDesc().getImplicitUses(); 253 *ImpUses; ++ImpUses) 254 DOUT << " -> " << TRI->getName(*ImpUses) << "\n"; 255 } 256 257 if (I.getDesc().getImplicitDefs()) { 258 DOUT << " * Instruction has implicit defines:\n"; 259 260 const TargetRegisterInfo *TRI = TM->getRegisterInfo(); 261 for (const unsigned *ImpDefs = I.getDesc().getImplicitDefs(); 262 *ImpDefs; ++ImpDefs) 263 DOUT << " -> " << TRI->getName(*ImpDefs) << "\n"; 264 } 265 266 //if (TII->hasUnmodelledSideEffects(&I)) 267 //DOUT << " * Instruction has side effects.\n"; 268 }); 269 270 // The instruction is loop invariant if all of its operands are loop-invariant 271 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { 272 const MachineOperand &MO = I.getOperand(i); 273 274 if (!(MO.isRegister() && MO.getReg() && MO.isUse())) 275 continue; 276 277 unsigned Reg = MO.getReg(); 278 279 // Don't hoist instructions that access physical registers. 280 if (!TargetRegisterInfo::isVirtualRegister(Reg)) 281 return false; 282 283 assert(RegInfo->getVRegDef(Reg)&&"Machine instr not mapped for this vreg?"); 284 285 // If the loop contains the definition of an operand, then the instruction 286 // isn't loop invariant. 287 if (CurLoop->contains(RegInfo->getVRegDef(Reg)->getParent())) 288 return false; 289 } 290 291 // If we got this far, the instruction is loop invariant! 292 return true; 293} 294 295/// Hoist - When an instruction is found to only use loop invariant operands 296/// that is safe to hoist, this instruction is called to do the dirty work. 297/// 298void MachineLICM::Hoist(MachineInstr &MI) { 299 if (!IsLoopInvariantInst(MI)) return; 300 301 std::vector<MachineBasicBlock*> Preds; 302 303 // Non-back-edge predecessors. 304 FindPredecessors(Preds); 305 306 // Either we don't have any predecessors(?!) or we have more than one, which 307 // is forbidden. 308 if (Preds.empty() || Preds.size() != 1) return; 309 310 // Check that the predecessor is qualified to take the hoisted 311 // instruction. I.e., there is only one edge from the predecessor, and it's to 312 // the loop header. 313 MachineBasicBlock *MBB = Preds.front(); 314 315 // FIXME: We are assuming at first that the basic block coming into this loop 316 // has only one successor. This isn't the case in general because we haven't 317 // broken critical edges or added preheaders. 318 if (MBB->succ_size() != 1) return; 319 assert(*MBB->succ_begin() == CurLoop->getHeader() && 320 "The predecessor doesn't feed directly into the loop header!"); 321 322 // Now move the instructions to the predecessor. 323 MoveInstToEndOfBlock(MBB, MI.getParent(), &MI); 324 Changed = true; 325} 326