MachineLICM.cpp revision fb018d0433f7b52c3f1235e675276adb1f92d597
1//===-- MachineLICM.cpp - Machine Loop Invariant Code Motion Pass ---------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass performs loop invariant code motion on machine instructions. We 11// attempt to remove as much code from the body of a loop as possible. 12// 13//===----------------------------------------------------------------------===// 14 15#define DEBUG_TYPE "machine-licm" 16#include "llvm/CodeGen/Passes.h" 17#include "llvm/CodeGen/MachineDominators.h" 18#include "llvm/CodeGen/MachineLoopInfo.h" 19#include "llvm/CodeGen/MachineRegisterInfo.h" 20#include "llvm/Target/TargetRegisterInfo.h" 21#include "llvm/Target/TargetInstrInfo.h" 22#include "llvm/Target/TargetMachine.h" 23#include "llvm/ADT/SmallVector.h" 24#include "llvm/ADT/Statistic.h" 25#include "llvm/Support/CommandLine.h" 26#include "llvm/Support/Compiler.h" 27#include "llvm/Support/Debug.h" 28 29using namespace llvm; 30 31STATISTIC(NumHoisted, "Number of machine instructions hoisted out of loops"); 32 33namespace { 34 class VISIBILITY_HIDDEN MachineLICM : public MachineFunctionPass { 35 const TargetMachine *TM; 36 const TargetInstrInfo *TII; 37 MachineFunction *CurMF; // Current MachineFunction 38 39 // Various analyses that we use... 40 MachineLoopInfo *LI; // Current MachineLoopInfo 41 MachineDominatorTree *DT; // Machine dominator tree for the cur loop 42 MachineRegisterInfo *RegInfo; // Machine register information 43 44 // State that is updated as we process loops 45 bool Changed; // True if a loop is changed. 46 MachineLoop *CurLoop; // The current loop we are working on. 47 public: 48 static char ID; // Pass identification, replacement for typeid 49 MachineLICM() : MachineFunctionPass((intptr_t)&ID) {} 50 51 virtual bool runOnMachineFunction(MachineFunction &MF); 52 53 // FIXME: Loop preheaders? 54 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 55 AU.setPreservesCFG(); 56 AU.addRequired<MachineLoopInfo>(); 57 AU.addRequired<MachineDominatorTree>(); 58 AU.addPreserved<MachineLoopInfo>(); 59 AU.addPreserved<MachineDominatorTree>(); 60 MachineFunctionPass::getAnalysisUsage(AU); 61 } 62 private: 63 /// VisitAllLoops - Visit all of the loops in depth first order and try to 64 /// hoist invariant instructions from them. 65 /// 66 void VisitAllLoops(MachineLoop *L) { 67 const std::vector<MachineLoop*> &SubLoops = L->getSubLoops(); 68 69 for (MachineLoop::iterator 70 I = SubLoops.begin(), E = SubLoops.end(); I != E; ++I) { 71 MachineLoop *ML = *I; 72 73 // Traverse the body of the loop in depth first order on the dominator 74 // tree so that we are guaranteed to see definitions before we see uses. 75 VisitAllLoops(ML); 76 HoistRegion(DT->getNode(ML->getHeader())); 77 } 78 79 HoistRegion(DT->getNode(L->getHeader())); 80 } 81 82 /// IsInSubLoop - A little predicate that returns true if the specified 83 /// basic block is in a subloop of the current one, not the current one 84 /// itself. 85 /// 86 bool IsInSubLoop(MachineBasicBlock *BB) { 87 assert(CurLoop->contains(BB) && "Only valid if BB is IN the loop"); 88 return LI->getLoopFor(BB) != CurLoop; 89 } 90 91 /// IsLoopInvariantInst - Returns true if the instruction is loop 92 /// invariant. I.e., all virtual register operands are defined outside of 93 /// the loop, physical registers aren't accessed (explicitly or implicitly), 94 /// and the instruction is hoistable. 95 /// 96 bool IsLoopInvariantInst(MachineInstr &I); 97 98 /// FindPredecessors - Get all of the predecessors of the loop that are not 99 /// back-edges. 100 /// 101 void FindPredecessors(std::vector<MachineBasicBlock*> &Preds) { 102 const MachineBasicBlock *Header = CurLoop->getHeader(); 103 104 for (MachineBasicBlock::const_pred_iterator 105 I = Header->pred_begin(), E = Header->pred_end(); I != E; ++I) 106 if (!CurLoop->contains(*I)) 107 Preds.push_back(*I); 108 } 109 110 /// MoveInstToEndOfBlock - Moves the machine instruction to the bottom of 111 /// the predecessor basic block (but before the terminator instructions). 112 /// 113 void MoveInstToEndOfBlock(MachineBasicBlock *ToMBB, 114 MachineBasicBlock *FromMBB, 115 MachineInstr *MI) { 116 DEBUG({ 117 DOUT << "Hoisting " << *MI; 118 if (ToMBB->getBasicBlock()) 119 DOUT << " to MachineBasicBlock " 120 << ToMBB->getBasicBlock()->getName(); 121 if (FromMBB->getBasicBlock()) 122 DOUT << " from MachineBasicBlock " 123 << FromMBB->getBasicBlock()->getName(); 124 DOUT << "\n"; 125 }); 126 127 MachineBasicBlock::iterator WhereIter = ToMBB->getFirstTerminator(); 128 MachineBasicBlock::iterator To, From = FromMBB->begin(); 129 130 while (&*From != MI) 131 ++From; 132 133 assert(From != FromMBB->end() && "Didn't find instr in BB!"); 134 135 To = From; 136 ToMBB->splice(WhereIter, FromMBB, From, ++To); 137 ++NumHoisted; 138 } 139 140 /// HoistRegion - Walk the specified region of the CFG (defined by all 141 /// blocks dominated by the specified block, and that are in the current 142 /// loop) in depth first order w.r.t the DominatorTree. This allows us to 143 /// visit definitions before uses, allowing us to hoist a loop body in one 144 /// pass without iteration. 145 /// 146 void HoistRegion(MachineDomTreeNode *N); 147 148 /// Hoist - When an instruction is found to only use loop invariant operands 149 /// that is safe to hoist, this instruction is called to do the dirty work. 150 /// 151 void Hoist(MachineInstr &MI); 152 }; 153} // end anonymous namespace 154 155char MachineLICM::ID = 0; 156static RegisterPass<MachineLICM> 157X("machinelicm", "Machine Loop Invariant Code Motion"); 158 159FunctionPass *llvm::createMachineLICMPass() { return new MachineLICM(); } 160 161/// Hoist expressions out of the specified loop. Note, alias info for inner loop 162/// is not preserved so it is not a good idea to run LICM multiple times on one 163/// loop. 164/// 165bool MachineLICM::runOnMachineFunction(MachineFunction &MF) { 166 DOUT << "******** Machine LICM ********\n"; 167 168 Changed = false; 169 CurMF = &MF; 170 TM = &CurMF->getTarget(); 171 TII = TM->getInstrInfo(); 172 RegInfo = &CurMF->getRegInfo(); 173 174 // Get our Loop information... 175 LI = &getAnalysis<MachineLoopInfo>(); 176 DT = &getAnalysis<MachineDominatorTree>(); 177 178 for (MachineLoopInfo::iterator 179 I = LI->begin(), E = LI->end(); I != E; ++I) { 180 CurLoop = *I; 181 182 // Visit all of the instructions of the loop. We want to visit the subloops 183 // first, though, so that we can hoist their invariants first into their 184 // containing loop before we process that loop. 185 VisitAllLoops(CurLoop); 186 } 187 188 return Changed; 189} 190 191/// HoistRegion - Walk the specified region of the CFG (defined by all blocks 192/// dominated by the specified block, and that are in the current loop) in depth 193/// first order w.r.t the DominatorTree. This allows us to visit definitions 194/// before uses, allowing us to hoist a loop body in one pass without iteration. 195/// 196void MachineLICM::HoistRegion(MachineDomTreeNode *N) { 197 assert(N != 0 && "Null dominator tree node?"); 198 MachineBasicBlock *BB = N->getBlock(); 199 200 // If this subregion is not in the top level loop at all, exit. 201 if (!CurLoop->contains(BB)) return; 202 203 // Only need to process the contents of this block if it is not part of a 204 // subloop (which would already have been processed). 205 if (!IsInSubLoop(BB)) 206 for (MachineBasicBlock::iterator 207 I = BB->begin(), E = BB->end(); I != E; ) { 208 MachineInstr &MI = *I++; 209 210 // Try hoisting the instruction out of the loop. We can only do this if 211 // all of the operands of the instruction are loop invariant and if it is 212 // safe to hoist the instruction. 213 Hoist(MI); 214 } 215 216 const std::vector<MachineDomTreeNode*> &Children = N->getChildren(); 217 218 for (unsigned I = 0, E = Children.size(); I != E; ++I) 219 HoistRegion(Children[I]); 220} 221 222/// IsLoopInvariantInst - Returns true if the instruction is loop 223/// invariant. I.e., all virtual register operands are defined outside of the 224/// loop, physical registers aren't accessed explicitly, and there are no side 225/// effects that aren't captured by the operands or other flags. 226/// 227bool MachineLICM::IsLoopInvariantInst(MachineInstr &I) { 228 const TargetInstrDesc &TID = I.getDesc(); 229 230 // Ignore stuff that we obviously can't hoist. 231 if (TID.mayStore() || TID.isCall() || TID.isReturn() || TID.isBranch() || 232 TID.hasUnmodeledSideEffects()) 233 return false; 234 235 if (TID.mayLoad()) { 236 // Okay, this instruction does a load. As a refinement, we allow the target 237 // to decide whether the loaded value is actually a constant. If so, we can 238 // actually use it as a load. 239 if (!TII->isInvariantLoad(&I)) 240 // FIXME: we should be able to sink loads with no other side effects if 241 // there is nothing that can change memory from here until the end of 242 // block. This is a trivial form of alias analysis. 243 return false; 244 } 245 246 DEBUG({ 247 DOUT << "--- Checking if we can hoist " << I; 248 if (I.getDesc().getImplicitUses()) { 249 DOUT << " * Instruction has implicit uses:\n"; 250 251 const TargetRegisterInfo *TRI = TM->getRegisterInfo(); 252 for (const unsigned *ImpUses = I.getDesc().getImplicitUses(); 253 *ImpUses; ++ImpUses) 254 DOUT << " -> " << TRI->getName(*ImpUses) << "\n"; 255 } 256 257 if (I.getDesc().getImplicitDefs()) { 258 DOUT << " * Instruction has implicit defines:\n"; 259 260 const TargetRegisterInfo *TRI = TM->getRegisterInfo(); 261 for (const unsigned *ImpDefs = I.getDesc().getImplicitDefs(); 262 *ImpDefs; ++ImpDefs) 263 DOUT << " -> " << TRI->getName(*ImpDefs) << "\n"; 264 } 265 }); 266 267 if (I.getDesc().getImplicitDefs() || I.getDesc().getImplicitUses()) { 268 DOUT << "Cannot hoist with implicit defines or uses\n"; 269 return false; 270 } 271 272 // The instruction is loop invariant if all of its operands are. 273 for (unsigned i = 0, e = I.getNumOperands(); i != e; ++i) { 274 const MachineOperand &MO = I.getOperand(i); 275 276 if (!MO.isRegister()) 277 continue; 278 279 if (MO.isDef() && TargetRegisterInfo::isPhysicalRegister(MO.getReg())) 280 // Don't hoist an instruction that defines a physical register. 281 return false; 282 283 if (!MO.isUse()) 284 continue; 285 286 unsigned Reg = MO.getReg(); 287 if (Reg == 0) continue; 288 289 // Don't hoist instructions that access physical registers. 290 if (TargetRegisterInfo::isPhysicalRegister(Reg)) 291 return false; 292 293 assert(RegInfo->getVRegDef(Reg) && 294 "Machine instr not mapped for this vreg?!"); 295 296 // If the loop contains the definition of an operand, then the instruction 297 // isn't loop invariant. 298 if (CurLoop->contains(RegInfo->getVRegDef(Reg)->getParent())) 299 return false; 300 } 301 302 // If we got this far, the instruction is loop invariant! 303 return true; 304} 305 306/// Hoist - When an instruction is found to use only loop invariant operands 307/// that are safe to hoist, this instruction is called to do the dirty work. 308/// 309void MachineLICM::Hoist(MachineInstr &MI) { 310 if (!IsLoopInvariantInst(MI)) return; 311 312 std::vector<MachineBasicBlock*> Preds; 313 314 // Non-back-edge predecessors. 315 FindPredecessors(Preds); 316 317 // Either we don't have any predecessors(?!) or we have more than one, which 318 // is forbidden. 319 if (Preds.empty() || Preds.size() != 1) return; 320 321 // Check that the predecessor is qualified to take the hoisted 322 // instruction. I.e., there is only one edge from the predecessor, and it's to 323 // the loop header. 324 MachineBasicBlock *MBB = Preds.front(); 325 326 // FIXME: We are assuming at first that the basic block coming into this loop 327 // has only one successor. This isn't the case in general because we haven't 328 // broken critical edges or added preheaders. 329 if (MBB->succ_size() != 1) return; 330 assert(*MBB->succ_begin() == CurLoop->getHeader() && 331 "The predecessor doesn't feed directly into the loop header!"); 332 333 // Now move the instructions to the predecessor. 334 MoveInstToEndOfBlock(MBB, MI.getParent(), &MI); 335 Changed = true; 336} 337