MachineSink.cpp revision 99ae3328316ca9d05b3a3483a009c1d405215ae9
1//===-- MachineSink.cpp - Sinking for machine instructions ----------------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This pass moves instructions into successor blocks when possible, so that 11// they aren't executed on paths where their results aren't needed. 12// 13// This pass is not intended to be a replacement or a complete alternative 14// for an LLVM-IR-level sinking pass. It is only designed to sink simple 15// constructs that are not exposed before lowering and instruction selection. 16// 17//===----------------------------------------------------------------------===// 18 19#define DEBUG_TYPE "machine-sink" 20#include "llvm/CodeGen/Passes.h" 21#include "llvm/CodeGen/MachineRegisterInfo.h" 22#include "llvm/CodeGen/MachineDominators.h" 23#include "llvm/CodeGen/MachineLoopInfo.h" 24#include "llvm/Analysis/AliasAnalysis.h" 25#include "llvm/Target/TargetRegisterInfo.h" 26#include "llvm/Target/TargetInstrInfo.h" 27#include "llvm/Target/TargetMachine.h" 28#include "llvm/ADT/Statistic.h" 29#include "llvm/Support/Debug.h" 30#include "llvm/Support/raw_ostream.h" 31using namespace llvm; 32 33STATISTIC(NumSunk, "Number of machine instructions sunk"); 34 35namespace { 36 class MachineSinking : public MachineFunctionPass { 37 const TargetInstrInfo *TII; 38 const TargetRegisterInfo *TRI; 39 MachineRegisterInfo *RegInfo; // Machine register information 40 MachineDominatorTree *DT; // Machine dominator tree 41 MachineLoopInfo *LI; 42 AliasAnalysis *AA; 43 BitVector AllocatableSet; // Which physregs are allocatable? 44 45 public: 46 static char ID; // Pass identification 47 MachineSinking() : MachineFunctionPass(ID) {} 48 49 virtual bool runOnMachineFunction(MachineFunction &MF); 50 51 virtual void getAnalysisUsage(AnalysisUsage &AU) const { 52 AU.setPreservesCFG(); 53 MachineFunctionPass::getAnalysisUsage(AU); 54 AU.addRequired<AliasAnalysis>(); 55 AU.addRequired<MachineDominatorTree>(); 56 AU.addRequired<MachineLoopInfo>(); 57 AU.addPreserved<MachineDominatorTree>(); 58 AU.addPreserved<MachineLoopInfo>(); 59 } 60 private: 61 bool ProcessBlock(MachineBasicBlock &MBB); 62 bool SinkInstruction(MachineInstr *MI, bool &SawStore); 63 bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB, 64 MachineBasicBlock *DefMBB, bool &LocalUse) const; 65 }; 66} // end anonymous namespace 67 68char MachineSinking::ID = 0; 69INITIALIZE_PASS(MachineSinking, "machine-sink", 70 "Machine code sinking", false, false); 71 72FunctionPass *llvm::createMachineSinkingPass() { return new MachineSinking(); } 73 74/// AllUsesDominatedByBlock - Return true if all uses of the specified register 75/// occur in blocks dominated by the specified block. If any use is in the 76/// definition block, then return false since it is never legal to move def 77/// after uses. 78bool MachineSinking::AllUsesDominatedByBlock(unsigned Reg, 79 MachineBasicBlock *MBB, 80 MachineBasicBlock *DefMBB, 81 bool &LocalUse) const { 82 assert(TargetRegisterInfo::isVirtualRegister(Reg) && 83 "Only makes sense for vregs"); 84 // Ignoring debug uses is necessary so debug info doesn't affect the code. 85 // This may leave a referencing dbg_value in the original block, before 86 // the definition of the vreg. Dwarf generator handles this although the 87 // user might not get the right info at runtime. 88 for (MachineRegisterInfo::use_nodbg_iterator 89 I = RegInfo->use_nodbg_begin(Reg), E = RegInfo->use_nodbg_end(); 90 I != E; ++I) { 91 // Determine the block of the use. 92 MachineInstr *UseInst = &*I; 93 MachineBasicBlock *UseBlock = UseInst->getParent(); 94 if (UseBlock == DefMBB) { 95 LocalUse = true; 96 return false; 97 } 98 99 if (UseInst->isPHI()) { 100 // PHI nodes use the operand in the predecessor block, not the block with 101 // the PHI. 102 UseBlock = UseInst->getOperand(I.getOperandNo()+1).getMBB(); 103 } 104 105 // Check that it dominates. 106 if (!DT->dominates(MBB, UseBlock)) 107 return false; 108 } 109 110 return true; 111} 112 113bool MachineSinking::runOnMachineFunction(MachineFunction &MF) { 114 DEBUG(dbgs() << "******** Machine Sinking ********\n"); 115 116 const TargetMachine &TM = MF.getTarget(); 117 TII = TM.getInstrInfo(); 118 TRI = TM.getRegisterInfo(); 119 RegInfo = &MF.getRegInfo(); 120 DT = &getAnalysis<MachineDominatorTree>(); 121 LI = &getAnalysis<MachineLoopInfo>(); 122 AA = &getAnalysis<AliasAnalysis>(); 123 AllocatableSet = TRI->getAllocatableSet(MF); 124 125 bool EverMadeChange = false; 126 127 while (1) { 128 bool MadeChange = false; 129 130 // Process all basic blocks. 131 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); 132 I != E; ++I) 133 MadeChange |= ProcessBlock(*I); 134 135 // If this iteration over the code changed anything, keep iterating. 136 if (!MadeChange) break; 137 EverMadeChange = true; 138 } 139 return EverMadeChange; 140} 141 142bool MachineSinking::ProcessBlock(MachineBasicBlock &MBB) { 143 // Can't sink anything out of a block that has less than two successors. 144 if (MBB.succ_size() <= 1 || MBB.empty()) return false; 145 146 // Don't bother sinking code out of unreachable blocks. In addition to being 147 // unprofitable, it can also lead to infinite looping, because in an 148 // unreachable loop there may be nowhere to stop. 149 if (!DT->isReachableFromEntry(&MBB)) return false; 150 151 bool MadeChange = false; 152 153 // Walk the basic block bottom-up. Remember if we saw a store. 154 MachineBasicBlock::iterator I = MBB.end(); 155 --I; 156 bool ProcessedBegin, SawStore = false; 157 do { 158 MachineInstr *MI = I; // The instruction to sink. 159 160 // Predecrement I (if it's not begin) so that it isn't invalidated by 161 // sinking. 162 ProcessedBegin = I == MBB.begin(); 163 if (!ProcessedBegin) 164 --I; 165 166 if (MI->isDebugValue()) 167 continue; 168 169 if (SinkInstruction(MI, SawStore)) 170 ++NumSunk, MadeChange = true; 171 172 // If we just processed the first instruction in the block, we're done. 173 } while (!ProcessedBegin); 174 175 return MadeChange; 176} 177 178/// SinkInstruction - Determine whether it is safe to sink the specified machine 179/// instruction out of its current block into a successor. 180bool MachineSinking::SinkInstruction(MachineInstr *MI, bool &SawStore) { 181 // Check if it's safe to move the instruction. 182 if (!MI->isSafeToMove(TII, AA, SawStore)) 183 return false; 184 185 // FIXME: This should include support for sinking instructions within the 186 // block they are currently in to shorten the live ranges. We often get 187 // instructions sunk into the top of a large block, but it would be better to 188 // also sink them down before their first use in the block. This xform has to 189 // be careful not to *increase* register pressure though, e.g. sinking 190 // "x = y + z" down if it kills y and z would increase the live ranges of y 191 // and z and only shrink the live range of x. 192 193 // Loop over all the operands of the specified instruction. If there is 194 // anything we can't handle, bail out. 195 MachineBasicBlock *ParentBlock = MI->getParent(); 196 197 // SuccToSinkTo - This is the successor to sink this instruction to, once we 198 // decide. 199 MachineBasicBlock *SuccToSinkTo = 0; 200 201 bool LocalUse = false; 202 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) { 203 const MachineOperand &MO = MI->getOperand(i); 204 if (!MO.isReg()) continue; // Ignore non-register operands. 205 206 unsigned Reg = MO.getReg(); 207 if (Reg == 0) continue; 208 209 if (TargetRegisterInfo::isPhysicalRegister(Reg)) { 210 if (MO.isUse()) { 211 // If the physreg has no defs anywhere, it's just an ambient register 212 // and we can freely move its uses. Alternatively, if it's allocatable, 213 // it could get allocated to something with a def during allocation. 214 if (!RegInfo->def_empty(Reg)) 215 return false; 216 217 if (AllocatableSet.test(Reg)) 218 return false; 219 220 // Check for a def among the register's aliases too. 221 for (const unsigned *Alias = TRI->getAliasSet(Reg); *Alias; ++Alias) { 222 unsigned AliasReg = *Alias; 223 if (!RegInfo->def_empty(AliasReg)) 224 return false; 225 226 if (AllocatableSet.test(AliasReg)) 227 return false; 228 } 229 } else if (!MO.isDead()) { 230 // A def that isn't dead. We can't move it. 231 return false; 232 } 233 } else { 234 // Virtual register uses are always safe to sink. 235 if (MO.isUse()) continue; 236 237 // If it's not safe to move defs of the register class, then abort. 238 if (!TII->isSafeToMoveRegClassDefs(RegInfo->getRegClass(Reg))) 239 return false; 240 241 // FIXME: This picks a successor to sink into based on having one 242 // successor that dominates all the uses. However, there are cases where 243 // sinking can happen but where the sink point isn't a successor. For 244 // example: 245 // 246 // x = computation 247 // if () {} else {} 248 // use x 249 // 250 // the instruction could be sunk over the whole diamond for the 251 // if/then/else (or loop, etc), allowing it to be sunk into other blocks 252 // after that. 253 254 // Virtual register defs can only be sunk if all their uses are in blocks 255 // dominated by one of the successors. 256 if (SuccToSinkTo) { 257 // If a previous operand picked a block to sink to, then this operand 258 // must be sinkable to the same block. 259 if (!AllUsesDominatedByBlock(Reg, SuccToSinkTo, ParentBlock, LocalUse)) 260 return false; 261 262 continue; 263 } 264 265 // Otherwise, we should look at all the successors and decide which one 266 // we should sink to. 267 for (MachineBasicBlock::succ_iterator SI = ParentBlock->succ_begin(), 268 E = ParentBlock->succ_end(); SI != E; ++SI) { 269 if (AllUsesDominatedByBlock(Reg, *SI, ParentBlock, LocalUse)) { 270 SuccToSinkTo = *SI; 271 break; 272 } 273 if (LocalUse) 274 // Def is used locally, it's never safe to move this def. 275 return false; 276 } 277 278 // If we couldn't find a block to sink to, ignore this instruction. 279 if (SuccToSinkTo == 0) 280 return false; 281 } 282 } 283 284 // If there are no outputs, it must have side-effects. 285 if (SuccToSinkTo == 0) 286 return false; 287 288 // It's not safe to sink instructions to EH landing pad. Control flow into 289 // landing pad is implicitly defined. 290 if (SuccToSinkTo->isLandingPad()) 291 return false; 292 293 // It is not possible to sink an instruction into its own block. This can 294 // happen with loops. 295 if (MI->getParent() == SuccToSinkTo) 296 return false; 297 298 // If the instruction to move defines a dead physical register which is live 299 // when leaving the basic block, don't move it because it could turn into a 300 // "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>) 301 for (unsigned I = 0, E = MI->getNumOperands(); I != E; ++I) { 302 const MachineOperand &MO = MI->getOperand(I); 303 if (!MO.isReg()) continue; 304 unsigned Reg = MO.getReg(); 305 if (Reg == 0 || !TargetRegisterInfo::isPhysicalRegister(Reg)) continue; 306 if (SuccToSinkTo->isLiveIn(Reg)) 307 return false; 308 } 309 310 DEBUG(dbgs() << "Sink instr " << *MI << "\tinto block " << *SuccToSinkTo); 311 312 // If the block has multiple predecessors, this would introduce computation on 313 // a path that it doesn't already exist. We could split the critical edge, 314 // but for now we just punt. 315 // FIXME: Split critical edges if not backedges. 316 if (SuccToSinkTo->pred_size() > 1) { 317 // We cannot sink a load across a critical edge - there may be stores in 318 // other code paths. 319 bool store = true; 320 if (!MI->isSafeToMove(TII, AA, store)) { 321 DEBUG(dbgs() << " *** PUNTING: Wont sink load along critical edge.\n"); 322 return false; 323 } 324 325 // We don't want to sink across a critical edge if we don't dominate the 326 // successor. We could be introducing calculations to new code paths. 327 if (!DT->dominates(ParentBlock, SuccToSinkTo)) { 328 DEBUG(dbgs() << " *** PUNTING: Critical edge found\n"); 329 return false; 330 } 331 332 // Don't sink instructions into a loop. 333 if (LI->isLoopHeader(SuccToSinkTo)) { 334 DEBUG(dbgs() << " *** PUNTING: Loop header found\n"); 335 return false; 336 } 337 338 // Otherwise we are OK with sinking along a critical edge. 339 DEBUG(dbgs() << "Sinking along critical edge.\n"); 340 } 341 342 // Determine where to insert into. Skip phi nodes. 343 MachineBasicBlock::iterator InsertPos = SuccToSinkTo->begin(); 344 while (InsertPos != SuccToSinkTo->end() && InsertPos->isPHI()) 345 ++InsertPos; 346 347 // Move the instruction. 348 SuccToSinkTo->splice(InsertPos, ParentBlock, MI, 349 ++MachineBasicBlock::iterator(MI)); 350 351 // Conservatively, clear any kill flags, since it's possible that they are no 352 // longer correct. 353 MI->clearKillInfo(); 354 355 return true; 356} 357