FunctionLoweringInfo.cpp revision 8163ca76f0b0d336c5436364ffb3b85be1162e7a 
1//===-- FunctionLoweringInfo.cpp ------------------------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This implements routines for translating functions from LLVM IR into
11// Machine IR.
12//
13//===----------------------------------------------------------------------===//
14
15#define DEBUG_TYPE "function-lowering-info"
16#include "llvm/CodeGen/FunctionLoweringInfo.h"
17#include "llvm/ADT/PostOrderIterator.h"
18#include "llvm/CodeGen/Analysis.h"
19#include "llvm/CodeGen/MachineFrameInfo.h"
20#include "llvm/CodeGen/MachineFunction.h"
21#include "llvm/CodeGen/MachineInstrBuilder.h"
22#include "llvm/CodeGen/MachineModuleInfo.h"
23#include "llvm/CodeGen/MachineRegisterInfo.h"
24#include "llvm/DataLayout.h"
25#include "llvm/DebugInfo.h"
26#include "llvm/DerivedTypes.h"
27#include "llvm/Function.h"
28#include "llvm/Instructions.h"
29#include "llvm/IntrinsicInst.h"
30#include "llvm/LLVMContext.h"
31#include "llvm/Module.h"
32#include "llvm/Support/Debug.h"
33#include "llvm/Support/ErrorHandling.h"
34#include "llvm/Support/MathExtras.h"
35#include "llvm/Target/TargetInstrInfo.h"
36#include "llvm/Target/TargetLowering.h"
37#include "llvm/Target/TargetOptions.h"
38#include "llvm/Target/TargetRegisterInfo.h"
39#include <algorithm>
40using namespace llvm;
41
42/// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
43/// PHI nodes or outside of the basic block that defines it, or used by a
44/// switch or atomic instruction, which may expand to multiple basic blocks.
45static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
46  if (I->use_empty()) return false;
47  if (isa<PHINode>(I)) return true;
48  const BasicBlock *BB = I->getParent();
49  for (Value::const_use_iterator UI = I->use_begin(), E = I->use_end();
50        UI != E; ++UI) {
51    const User *U = *UI;
52    if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
53      return true;
54  }
55  return false;
56}
57
58FunctionLoweringInfo::FunctionLoweringInfo(const TargetLowering &tli)
59  : TLI(tli) {
60}
61
62void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf) {
63  Fn = &fn;
64  MF = &mf;
65  RegInfo = &MF->getRegInfo();
66
67  // Check whether the function can return without sret-demotion.
68  SmallVector<ISD::OutputArg, 4> Outs;
69  GetReturnInfo(Fn->getReturnType(),
70                Fn->getAttributes().getRetAttributes(), Outs, TLI);
71  CanLowerReturn = TLI.CanLowerReturn(Fn->getCallingConv(), *MF,
72                                      Fn->isVarArg(),
73                                      Outs, Fn->getContext());
74
75  // Initialize the mapping of values to registers.  This is only set up for
76  // instruction values that are used outside of the block that defines
77  // them.
78  Function::const_iterator BB = Fn->begin(), EB = Fn->end();
79  for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
80    if (const AllocaInst *AI = dyn_cast<AllocaInst>(I))
81      if (const ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
82        Type *Ty = AI->getAllocatedType();
83        uint64_t TySize = TLI.getDataLayout()->getTypeAllocSize(Ty);
84        unsigned Align =
85          std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty),
86                   AI->getAlignment());
87
88        TySize *= CUI->getZExtValue();   // Get total allocated size.
89        if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
90
91        // The object may need to be placed onto the stack near the stack
92        // protector if one exists. Determine here if this object is a suitable
93        // candidate. I.e., it would trigger the creation of a stack protector.
94        bool MayNeedSP =
95          (AI->isArrayAllocation() ||
96           (TySize >= 8 && isa<ArrayType>(Ty) &&
97            cast<ArrayType>(Ty)->getElementType()->isIntegerTy(8)));
98        StaticAllocaMap[AI] =
99          MF->getFrameInfo()->CreateStackObject(TySize, Align, false,
100                                                MayNeedSP, AI);
101      }
102
103  for (; BB != EB; ++BB)
104    for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
105         I != E; ++I) {
106      // Mark values used outside their block as exported, by allocating
107      // a virtual register for them.
108      if (isUsedOutsideOfDefiningBlock(I))
109        if (!isa<AllocaInst>(I) ||
110            !StaticAllocaMap.count(cast<AllocaInst>(I)))
111          InitializeRegForValue(I);
112
113      // Collect llvm.dbg.declare information. This is done now instead of
114      // during the initial isel pass through the IR so that it is done
115      // in a predictable order.
116      if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
117        MachineModuleInfo &MMI = MF->getMMI();
118        if (MMI.hasDebugInfo() &&
119            DIVariable(DI->getVariable()).Verify() &&
120            !DI->getDebugLoc().isUnknown()) {
121          // Don't handle byval struct arguments or VLAs, for example.
122          // Non-byval arguments are handled here (they refer to the stack
123          // temporary alloca at this point).
124          const Value *Address = DI->getAddress();
125          if (Address) {
126            if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
127              Address = BCI->getOperand(0);
128            if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
129              DenseMap<const AllocaInst *, int>::iterator SI =
130                StaticAllocaMap.find(AI);
131              if (SI != StaticAllocaMap.end()) { // Check for VLAs.
132                int FI = SI->second;
133                MMI.setVariableDbgInfo(DI->getVariable(),
134                                       FI, DI->getDebugLoc());
135              }
136            }
137          }
138        }
139      }
140    }
141
142  // Create an initial MachineBasicBlock for each LLVM BasicBlock in F.  This
143  // also creates the initial PHI MachineInstrs, though none of the input
144  // operands are populated.
145  for (BB = Fn->begin(); BB != EB; ++BB) {
146    MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
147    MBBMap[BB] = MBB;
148    MF->push_back(MBB);
149
150    // Transfer the address-taken flag. This is necessary because there could
151    // be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
152    // the first one should be marked.
153    if (BB->hasAddressTaken())
154      MBB->setHasAddressTaken();
155
156    // Create Machine PHI nodes for LLVM PHI nodes, lowering them as
157    // appropriate.
158    for (BasicBlock::const_iterator I = BB->begin();
159         const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
160      if (PN->use_empty()) continue;
161
162      // Skip empty types
163      if (PN->getType()->isEmptyTy())
164        continue;
165
166      DebugLoc DL = PN->getDebugLoc();
167      unsigned PHIReg = ValueMap[PN];
168      assert(PHIReg && "PHI node does not have an assigned virtual register!");
169
170      SmallVector<EVT, 4> ValueVTs;
171      ComputeValueVTs(TLI, PN->getType(), ValueVTs);
172      for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
173        EVT VT = ValueVTs[vti];
174        unsigned NumRegisters = TLI.getNumRegisters(Fn->getContext(), VT);
175        const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
176        for (unsigned i = 0; i != NumRegisters; ++i)
177          BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
178        PHIReg += NumRegisters;
179      }
180    }
181  }
182
183  // Mark landing pad blocks.
184  for (BB = Fn->begin(); BB != EB; ++BB)
185    if (const InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
186      MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
187}
188
189/// clear - Clear out all the function-specific state. This returns this
190/// FunctionLoweringInfo to an empty state, ready to be used for a
191/// different function.
192void FunctionLoweringInfo::clear() {
193  assert(CatchInfoFound.size() == CatchInfoLost.size() &&
194         "Not all catch info was assigned to a landing pad!");
195
196  MBBMap.clear();
197  ValueMap.clear();
198  StaticAllocaMap.clear();
199#ifndef NDEBUG
200  CatchInfoLost.clear();
201  CatchInfoFound.clear();
202#endif
203  LiveOutRegInfo.clear();
204  VisitedBBs.clear();
205  ArgDbgValues.clear();
206  ByValArgFrameIndexMap.clear();
207  RegFixups.clear();
208}
209
210/// CreateReg - Allocate a single virtual register for the given type.
211unsigned FunctionLoweringInfo::CreateReg(MVT VT) {
212  return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT));
213}
214
215/// CreateRegs - Allocate the appropriate number of virtual registers of
216/// the correctly promoted or expanded types.  Assign these registers
217/// consecutive vreg numbers and return the first assigned number.
218///
219/// In the case that the given value has struct or array type, this function
220/// will assign registers for each member or element.
221///
222unsigned FunctionLoweringInfo::CreateRegs(Type *Ty) {
223  SmallVector<EVT, 4> ValueVTs;
224  ComputeValueVTs(TLI, Ty, ValueVTs);
225
226  unsigned FirstReg = 0;
227  for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
228    EVT ValueVT = ValueVTs[Value];
229    MVT RegisterVT = TLI.getRegisterType(Ty->getContext(), ValueVT).getSimpleVT();
230
231    unsigned NumRegs = TLI.getNumRegisters(Ty->getContext(), ValueVT);
232    for (unsigned i = 0; i != NumRegs; ++i) {
233      unsigned R = CreateReg(RegisterVT);
234      if (!FirstReg) FirstReg = R;
235    }
236  }
237  return FirstReg;
238}
239
240/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
241/// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
242/// the register's LiveOutInfo is for a smaller bit width, it is extended to
243/// the larger bit width by zero extension. The bit width must be no smaller
244/// than the LiveOutInfo's existing bit width.
245const FunctionLoweringInfo::LiveOutInfo *
246FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
247  if (!LiveOutRegInfo.inBounds(Reg))
248    return NULL;
249
250  LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
251  if (!LOI->IsValid)
252    return NULL;
253
254  if (BitWidth > LOI->KnownZero.getBitWidth()) {
255    LOI->NumSignBits = 1;
256    LOI->KnownZero = LOI->KnownZero.zextOrTrunc(BitWidth);
257    LOI->KnownOne = LOI->KnownOne.zextOrTrunc(BitWidth);
258  }
259
260  return LOI;
261}
262
263/// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
264/// register based on the LiveOutInfo of its operands.
265void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
266  Type *Ty = PN->getType();
267  if (!Ty->isIntegerTy() || Ty->isVectorTy())
268    return;
269
270  SmallVector<EVT, 1> ValueVTs;
271  ComputeValueVTs(TLI, Ty, ValueVTs);
272  assert(ValueVTs.size() == 1 &&
273         "PHIs with non-vector integer types should have a single VT.");
274  EVT IntVT = ValueVTs[0];
275
276  if (TLI.getNumRegisters(PN->getContext(), IntVT) != 1)
277    return;
278  IntVT = TLI.getTypeToTransformTo(PN->getContext(), IntVT);
279  unsigned BitWidth = IntVT.getSizeInBits();
280
281  unsigned DestReg = ValueMap[PN];
282  if (!TargetRegisterInfo::isVirtualRegister(DestReg))
283    return;
284  LiveOutRegInfo.grow(DestReg);
285  LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
286
287  Value *V = PN->getIncomingValue(0);
288  if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
289    DestLOI.NumSignBits = 1;
290    APInt Zero(BitWidth, 0);
291    DestLOI.KnownZero = Zero;
292    DestLOI.KnownOne = Zero;
293    return;
294  }
295
296  if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
297    APInt Val = CI->getValue().zextOrTrunc(BitWidth);
298    DestLOI.NumSignBits = Val.getNumSignBits();
299    DestLOI.KnownZero = ~Val;
300    DestLOI.KnownOne = Val;
301  } else {
302    assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
303                                "CopyToReg node was created.");
304    unsigned SrcReg = ValueMap[V];
305    if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
306      DestLOI.IsValid = false;
307      return;
308    }
309    const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
310    if (!SrcLOI) {
311      DestLOI.IsValid = false;
312      return;
313    }
314    DestLOI = *SrcLOI;
315  }
316
317  assert(DestLOI.KnownZero.getBitWidth() == BitWidth &&
318         DestLOI.KnownOne.getBitWidth() == BitWidth &&
319         "Masks should have the same bit width as the type.");
320
321  for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
322    Value *V = PN->getIncomingValue(i);
323    if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
324      DestLOI.NumSignBits = 1;
325      APInt Zero(BitWidth, 0);
326      DestLOI.KnownZero = Zero;
327      DestLOI.KnownOne = Zero;
328      return;
329    }
330
331    if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
332      APInt Val = CI->getValue().zextOrTrunc(BitWidth);
333      DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
334      DestLOI.KnownZero &= ~Val;
335      DestLOI.KnownOne &= Val;
336      continue;
337    }
338
339    assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
340                                "its CopyToReg node was created.");
341    unsigned SrcReg = ValueMap[V];
342    if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
343      DestLOI.IsValid = false;
344      return;
345    }
346    const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
347    if (!SrcLOI) {
348      DestLOI.IsValid = false;
349      return;
350    }
351    DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
352    DestLOI.KnownZero &= SrcLOI->KnownZero;
353    DestLOI.KnownOne &= SrcLOI->KnownOne;
354  }
355}
356
357/// setArgumentFrameIndex - Record frame index for the byval
358/// argument. This overrides previous frame index entry for this argument,
359/// if any.
360void FunctionLoweringInfo::setArgumentFrameIndex(const Argument *A,
361                                                 int FI) {
362  ByValArgFrameIndexMap[A] = FI;
363}
364
365/// getArgumentFrameIndex - Get frame index for the byval argument.
366/// If the argument does not have any assigned frame index then 0 is
367/// returned.
368int FunctionLoweringInfo::getArgumentFrameIndex(const Argument *A) {
369  DenseMap<const Argument *, int>::iterator I =
370    ByValArgFrameIndexMap.find(A);
371  if (I != ByValArgFrameIndexMap.end())
372    return I->second;
373  DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
374  return 0;
375}
376
377/// ComputeUsesVAFloatArgument - Determine if any floating-point values are
378/// being passed to this variadic function, and set the MachineModuleInfo's
379/// usesVAFloatArgument flag if so. This flag is used to emit an undefined
380/// reference to _fltused on Windows, which will link in MSVCRT's
381/// floating-point support.
382void llvm::ComputeUsesVAFloatArgument(const CallInst &I,
383                                      MachineModuleInfo *MMI)
384{
385  FunctionType *FT = cast<FunctionType>(
386    I.getCalledValue()->getType()->getContainedType(0));
387  if (FT->isVarArg() && !MMI->usesVAFloatArgument()) {
388    for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
389      Type* T = I.getArgOperand(i)->getType();
390      for (po_iterator<Type*> i = po_begin(T), e = po_end(T);
391           i != e; ++i) {
392        if (i->isFloatingPointTy()) {
393          MMI->setUsesVAFloatArgument(true);
394          return;
395        }
396      }
397    }
398  }
399}
400
401/// AddCatchInfo - Extract the personality and type infos from an eh.selector
402/// call, and add them to the specified machine basic block.
403void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
404                        MachineBasicBlock *MBB) {
405  // Inform the MachineModuleInfo of the personality for this landing pad.
406  const ConstantExpr *CE = cast<ConstantExpr>(I.getArgOperand(1));
407  assert(CE->getOpcode() == Instruction::BitCast &&
408         isa<Function>(CE->getOperand(0)) &&
409         "Personality should be a function");
410  MMI->addPersonality(MBB, cast<Function>(CE->getOperand(0)));
411
412  // Gather all the type infos for this landing pad and pass them along to
413  // MachineModuleInfo.
414  std::vector<const GlobalVariable *> TyInfo;
415  unsigned N = I.getNumArgOperands();
416
417  for (unsigned i = N - 1; i > 1; --i) {
418    if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(i))) {
419      unsigned FilterLength = CI->getZExtValue();
420      unsigned FirstCatch = i + FilterLength + !FilterLength;
421      assert(FirstCatch <= N && "Invalid filter length");
422
423      if (FirstCatch < N) {
424        TyInfo.reserve(N - FirstCatch);
425        for (unsigned j = FirstCatch; j < N; ++j)
426          TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
427        MMI->addCatchTypeInfo(MBB, TyInfo);
428        TyInfo.clear();
429      }
430
431      if (!FilterLength) {
432        // Cleanup.
433        MMI->addCleanup(MBB);
434      } else {
435        // Filter.
436        TyInfo.reserve(FilterLength - 1);
437        for (unsigned j = i + 1; j < FirstCatch; ++j)
438          TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
439        MMI->addFilterTypeInfo(MBB, TyInfo);
440        TyInfo.clear();
441      }
442
443      N = i;
444    }
445  }
446
447  if (N > 2) {
448    TyInfo.reserve(N - 2);
449    for (unsigned j = 2; j < N; ++j)
450      TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
451    MMI->addCatchTypeInfo(MBB, TyInfo);
452  }
453}
454
455/// AddLandingPadInfo - Extract the exception handling information from the
456/// landingpad instruction and add them to the specified machine module info.
457void llvm::AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
458                             MachineBasicBlock *MBB) {
459  MMI.addPersonality(MBB,
460                     cast<Function>(I.getPersonalityFn()->stripPointerCasts()));
461
462  if (I.isCleanup())
463    MMI.addCleanup(MBB);
464
465  // FIXME: New EH - Add the clauses in reverse order. This isn't 100% correct,
466  //        but we need to do it this way because of how the DWARF EH emitter
467  //        processes the clauses.
468  for (unsigned i = I.getNumClauses(); i != 0; --i) {
469    Value *Val = I.getClause(i - 1);
470    if (I.isCatch(i - 1)) {
471      MMI.addCatchTypeInfo(MBB,
472                           dyn_cast<GlobalVariable>(Val->stripPointerCasts()));
473    } else {
474      // Add filters in a list.
475      Constant *CVal = cast<Constant>(Val);
476      SmallVector<const GlobalVariable*, 4> FilterList;
477      for (User::op_iterator
478             II = CVal->op_begin(), IE = CVal->op_end(); II != IE; ++II)
479        FilterList.push_back(cast<GlobalVariable>((*II)->stripPointerCasts()));
480
481      MMI.addFilterTypeInfo(MBB, FilterList);
482    }
483  }
484}
485