InstrEmitter.h revision 3d7d07ef038696cefcaf3ce5335072964199a78d 
1//===---- InstrEmitter.h - Emit MachineInstrs for the SelectionDAG class ---==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This declares the Emit routines for the SelectionDAG class, which creates
11// MachineInstrs based on the decisions of the SelectionDAG instruction
12// selection.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef INSTREMITTER_H
17#define INSTREMITTER_H
18
19#include "llvm/CodeGen/SelectionDAG.h"
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/ADT/DenseMap.h"
22
23namespace llvm {
24
25class TargetInstrDesc;
26class SDDbgValue;
27
28class InstrEmitter {
29  MachineFunction *MF;
30  MachineRegisterInfo *MRI;
31  const TargetMachine *TM;
32  const TargetInstrInfo *TII;
33  const TargetRegisterInfo *TRI;
34  const TargetLowering *TLI;
35
36  MachineBasicBlock *MBB;
37  MachineBasicBlock::iterator InsertPos;
38
39  /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
40  /// implicit physical register output.
41  void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
42                       bool IsClone, bool IsCloned,
43                       unsigned SrcReg,
44                       DenseMap<SDValue, unsigned> &VRBaseMap);
45
46  /// getDstOfCopyToRegUse - If the only use of the specified result number of
47  /// node is a CopyToReg, return its destination register. Return 0 otherwise.
48  unsigned getDstOfOnlyCopyToRegUse(SDNode *Node,
49                                    unsigned ResNo) const;
50
51  void CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
52                              const TargetInstrDesc &II,
53                              bool IsClone, bool IsCloned,
54                              DenseMap<SDValue, unsigned> &VRBaseMap);
55
56  /// getVR - Return the virtual register corresponding to the specified result
57  /// of the specified node.
58  unsigned getVR(SDValue Op,
59                 DenseMap<SDValue, unsigned> &VRBaseMap);
60
61  /// AddRegisterOperand - Add the specified register as an operand to the
62  /// specified machine instr. Insert register copies if the register is
63  /// not in the required register class.
64  void AddRegisterOperand(MachineInstr *MI, SDValue Op,
65                          unsigned IIOpNum,
66                          const TargetInstrDesc *II,
67                          DenseMap<SDValue, unsigned> &VRBaseMap,
68                          bool IsDebug = false);
69
70  /// AddOperand - Add the specified operand to the specified machine instr.  II
71  /// specifies the instruction information for the node, and IIOpNum is the
72  /// operand number (in the II) that we are adding. IIOpNum and II are used for
73  /// assertions only.
74  void AddOperand(MachineInstr *MI, SDValue Op,
75                  unsigned IIOpNum,
76                  const TargetInstrDesc *II,
77                  DenseMap<SDValue, unsigned> &VRBaseMap,
78                  bool IsDebug = false);
79
80  /// EmitSubregNode - Generate machine code for subreg nodes.
81  ///
82  void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap);
83
84  /// EmitCopyToRegClassNode - Generate machine code for COPY_TO_REGCLASS nodes.
85  /// COPY_TO_REGCLASS is just a normal copy, except that the destination
86  /// register is constrained to be in a particular register class.
87  ///
88  void EmitCopyToRegClassNode(SDNode *Node,
89                              DenseMap<SDValue, unsigned> &VRBaseMap);
90
91public:
92  /// CountResults - The results of target nodes have register or immediate
93  /// operands first, then an optional chain, and optional flag operands
94  /// (which do not go into the machine instrs.)
95  static unsigned CountResults(SDNode *Node);
96
97  /// CountOperands - The inputs to target nodes have any actual inputs first,
98  /// followed by an optional chain operand, then flag operands.  Compute
99  /// the number of actual operands that will go into the resulting
100  /// MachineInstr.
101  static unsigned CountOperands(SDNode *Node);
102
103  /// EmitDbgValue - Generate machine instruction for a dbg_value node.
104  ///
105  MachineInstr *EmitDbgValue(SDDbgValue *SD,
106                          MachineBasicBlock *InsertBB,
107                          DenseMap<SDValue, unsigned> &VRBaseMap,
108                          DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
109
110  /// EmitNode - Generate machine code for a node and needed dependencies.
111  ///
112  void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
113                DenseMap<SDValue, unsigned> &VRBaseMap,
114                DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) {
115    if (Node->isMachineOpcode())
116      EmitMachineNode(Node, IsClone, IsCloned, VRBaseMap, EM);
117    else
118      EmitSpecialNode(Node, IsClone, IsCloned, VRBaseMap);
119  }
120
121  /// getBlock - Return the current basic block.
122  MachineBasicBlock *getBlock() { return MBB; }
123
124  /// getInsertPos - Return the current insertion position.
125  MachineBasicBlock::iterator getInsertPos() { return InsertPos; }
126
127  /// InstrEmitter - Construct an InstrEmitter and set it to start inserting
128  /// at the given position in the given block.
129  InstrEmitter(MachineBasicBlock *mbb, MachineBasicBlock::iterator insertpos);
130
131private:
132  void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
133                       DenseMap<SDValue, unsigned> &VRBaseMap,
134                       DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
135  void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
136                       DenseMap<SDValue, unsigned> &VRBaseMap);
137};
138
139}
140
141#endif
142