InstrEmitter.h revision 55c06ae7afa3f862a6bb4a4441fe485c135f5b5e 
1//===- InstrEmitter.h - Emit MachineInstrs for the SelectionDAG -*- C++ -*--==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This declares the Emit routines for the SelectionDAG class, which creates
11// MachineInstrs based on the decisions of the SelectionDAG instruction
12// selection.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef INSTREMITTER_H
17#define INSTREMITTER_H
18
19#include "llvm/ADT/DenseMap.h"
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/CodeGen/SelectionDAG.h"
22
23namespace llvm {
24
25class MachineInstrBuilder;
26class MCInstrDesc;
27class SDDbgValue;
28
29class InstrEmitter {
30  MachineFunction *MF;
31  MachineRegisterInfo *MRI;
32  const TargetMachine *TM;
33  const TargetInstrInfo *TII;
34  const TargetRegisterInfo *TRI;
35  const TargetLowering *TLI;
36
37  MachineBasicBlock *MBB;
38  MachineBasicBlock::iterator InsertPos;
39
40  /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
41  /// implicit physical register output.
42  void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
43                       bool IsClone, bool IsCloned,
44                       unsigned SrcReg,
45                       DenseMap<SDValue, unsigned> &VRBaseMap);
46
47  /// getDstOfCopyToRegUse - If the only use of the specified result number of
48  /// node is a CopyToReg, return its destination register. Return 0 otherwise.
49  unsigned getDstOfOnlyCopyToRegUse(SDNode *Node,
50                                    unsigned ResNo) const;
51
52  void CreateVirtualRegisters(SDNode *Node,
53                              MachineInstrBuilder &MIB,
54                              const MCInstrDesc &II,
55                              bool IsClone, bool IsCloned,
56                              DenseMap<SDValue, unsigned> &VRBaseMap);
57
58  /// getVR - Return the virtual register corresponding to the specified result
59  /// of the specified node.
60  unsigned getVR(SDValue Op,
61                 DenseMap<SDValue, unsigned> &VRBaseMap);
62
63  /// AddRegisterOperand - Add the specified register as an operand to the
64  /// specified machine instr. Insert register copies if the register is
65  /// not in the required register class.
66  void AddRegisterOperand(MachineInstrBuilder &MIB,
67                          SDValue Op,
68                          unsigned IIOpNum,
69                          const MCInstrDesc *II,
70                          DenseMap<SDValue, unsigned> &VRBaseMap,
71                          bool IsDebug, bool IsClone, bool IsCloned);
72
73  /// AddOperand - Add the specified operand to the specified machine instr.  II
74  /// specifies the instruction information for the node, and IIOpNum is the
75  /// operand number (in the II) that we are adding. IIOpNum and II are used for
76  /// assertions only.
77  void AddOperand(MachineInstrBuilder &MIB,
78                  SDValue Op,
79                  unsigned IIOpNum,
80                  const MCInstrDesc *II,
81                  DenseMap<SDValue, unsigned> &VRBaseMap,
82                  bool IsDebug, bool IsClone, bool IsCloned);
83
84  /// ConstrainForSubReg - Try to constrain VReg to a register class that
85  /// supports SubIdx sub-registers.  Emit a copy if that isn't possible.
86  /// Return the virtual register to use.
87  unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
88                              MVT VT, DebugLoc DL);
89
90  /// EmitSubregNode - Generate machine code for subreg nodes.
91  ///
92  void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
93                      bool IsClone, bool IsCloned);
94
95  /// EmitCopyToRegClassNode - Generate machine code for COPY_TO_REGCLASS nodes.
96  /// COPY_TO_REGCLASS is just a normal copy, except that the destination
97  /// register is constrained to be in a particular register class.
98  ///
99  void EmitCopyToRegClassNode(SDNode *Node,
100                              DenseMap<SDValue, unsigned> &VRBaseMap);
101
102  /// EmitRegSequence - Generate machine code for REG_SEQUENCE nodes.
103  ///
104  void EmitRegSequence(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap,
105                       bool IsClone, bool IsCloned);
106public:
107  /// CountResults - The results of target nodes have register or immediate
108  /// operands first, then an optional chain, and optional flag operands
109  /// (which do not go into the machine instrs.)
110  static unsigned CountResults(SDNode *Node);
111
112  /// EmitDbgValue - Generate machine instruction for a dbg_value node.
113  ///
114  MachineInstr *EmitDbgValue(SDDbgValue *SD,
115                             DenseMap<SDValue, unsigned> &VRBaseMap);
116
117  /// EmitNode - Generate machine code for a node and needed dependencies.
118  ///
119  void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
120                DenseMap<SDValue, unsigned> &VRBaseMap) {
121    if (Node->isMachineOpcode())
122      EmitMachineNode(Node, IsClone, IsCloned, VRBaseMap);
123    else
124      EmitSpecialNode(Node, IsClone, IsCloned, VRBaseMap);
125  }
126
127  /// getBlock - Return the current basic block.
128  MachineBasicBlock *getBlock() { return MBB; }
129
130  /// getInsertPos - Return the current insertion position.
131  MachineBasicBlock::iterator getInsertPos() { return InsertPos; }
132
133  /// InstrEmitter - Construct an InstrEmitter and set it to start inserting
134  /// at the given position in the given block.
135  InstrEmitter(MachineBasicBlock *mbb, MachineBasicBlock::iterator insertpos);
136
137private:
138  void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
139                       DenseMap<SDValue, unsigned> &VRBaseMap);
140  void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
141                       DenseMap<SDValue, unsigned> &VRBaseMap);
142};
143
144}
145
146#endif
147