InstrEmitter.h revision c243dea003bfe11cb4cdc0cef80997b06b96cb21 
1//===---- InstrEmitter.h - Emit MachineInstrs for the SelectionDAG class ---==//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This declares the Emit routines for the SelectionDAG class, which creates
11// MachineInstrs based on the decisions of the SelectionDAG instruction
12// selection.
13//
14//===----------------------------------------------------------------------===//
15
16#ifndef INSTREMITTER_H
17#define INSTREMITTER_H
18
19#include "llvm/CodeGen/SelectionDAG.h"
20#include "llvm/CodeGen/MachineBasicBlock.h"
21#include "llvm/ADT/DenseMap.h"
22
23namespace llvm {
24
25class TargetInstrDesc;
26class SDDbgValue;
27
28class InstrEmitter {
29  MachineFunction *MF;
30  MachineRegisterInfo *MRI;
31  const TargetMachine *TM;
32  const TargetInstrInfo *TII;
33  const TargetRegisterInfo *TRI;
34  const TargetLowering *TLI;
35
36  MachineBasicBlock *MBB;
37  MachineBasicBlock::iterator InsertPos;
38
39  /// EmitCopyFromReg - Generate machine code for an CopyFromReg node or an
40  /// implicit physical register output.
41  void EmitCopyFromReg(SDNode *Node, unsigned ResNo,
42                       bool IsClone, bool IsCloned,
43                       unsigned SrcReg,
44                       DenseMap<SDValue, unsigned> &VRBaseMap);
45
46  /// getDstOfCopyToRegUse - If the only use of the specified result number of
47  /// node is a CopyToReg, return its destination register. Return 0 otherwise.
48  unsigned getDstOfOnlyCopyToRegUse(SDNode *Node,
49                                    unsigned ResNo) const;
50
51  void CreateVirtualRegisters(SDNode *Node, MachineInstr *MI,
52                              const TargetInstrDesc &II,
53                              bool IsClone, bool IsCloned,
54                              DenseMap<SDValue, unsigned> &VRBaseMap);
55
56  /// getVR - Return the virtual register corresponding to the specified result
57  /// of the specified node.
58  unsigned getVR(SDValue Op,
59                 DenseMap<SDValue, unsigned> &VRBaseMap);
60
61  /// AddRegisterOperand - Add the specified register as an operand to the
62  /// specified machine instr. Insert register copies if the register is
63  /// not in the required register class.
64  void AddRegisterOperand(MachineInstr *MI, SDValue Op,
65                          unsigned IIOpNum,
66                          const TargetInstrDesc *II,
67                          DenseMap<SDValue, unsigned> &VRBaseMap);
68
69  /// AddOperand - Add the specified operand to the specified machine instr.  II
70  /// specifies the instruction information for the node, and IIOpNum is the
71  /// operand number (in the II) that we are adding. IIOpNum and II are used for
72  /// assertions only.
73  void AddOperand(MachineInstr *MI, SDValue Op,
74                  unsigned IIOpNum,
75                  const TargetInstrDesc *II,
76                  DenseMap<SDValue, unsigned> &VRBaseMap);
77
78  /// EmitSubregNode - Generate machine code for subreg nodes.
79  ///
80  void EmitSubregNode(SDNode *Node, DenseMap<SDValue, unsigned> &VRBaseMap);
81
82  /// EmitCopyToRegClassNode - Generate machine code for COPY_TO_REGCLASS nodes.
83  /// COPY_TO_REGCLASS is just a normal copy, except that the destination
84  /// register is constrained to be in a particular register class.
85  ///
86  void EmitCopyToRegClassNode(SDNode *Node,
87                              DenseMap<SDValue, unsigned> &VRBaseMap);
88
89public:
90  /// CountResults - The results of target nodes have register or immediate
91  /// operands first, then an optional chain, and optional flag operands
92  /// (which do not go into the machine instrs.)
93  static unsigned CountResults(SDNode *Node);
94
95  /// CountOperands - The inputs to target nodes have any actual inputs first,
96  /// followed by an optional chain operand, then flag operands.  Compute
97  /// the number of actual operands that will go into the resulting
98  /// MachineInstr.
99  static unsigned CountOperands(SDNode *Node);
100
101  /// EmitDbgValue - Generate any debug info that refers to this Node.  Constant
102  /// dbg_value is not handled here.
103  void EmitDbgValue(SDNode *Node,
104                    DenseMap<SDValue, unsigned> &VRBaseMap,
105                    SDDbgValue* sd);
106
107
108  /// EmitDbgValue - Generate a constant DBG_VALUE.  No node is involved.
109  void EmitDbgValue(SDDbgValue* sd,
110                DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
111
112  /// EmitNode - Generate machine code for a node and needed dependencies.
113  ///
114  void EmitNode(SDNode *Node, bool IsClone, bool IsCloned,
115                DenseMap<SDValue, unsigned> &VRBaseMap,
116                DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM) {
117    if (Node->isMachineOpcode())
118      EmitMachineNode(Node, IsClone, IsCloned, VRBaseMap, EM);
119    else
120      EmitSpecialNode(Node, IsClone, IsCloned, VRBaseMap, EM);
121  }
122
123  /// getBlock - Return the current basic block.
124  MachineBasicBlock *getBlock() { return MBB; }
125
126  /// getInsertPos - Return the current insertion position.
127  MachineBasicBlock::iterator getInsertPos() { return InsertPos; }
128
129  /// InstrEmitter - Construct an InstrEmitter and set it to start inserting
130  /// at the given position in the given block.
131  InstrEmitter(MachineBasicBlock *mbb, MachineBasicBlock::iterator insertpos);
132
133private:
134  void EmitMachineNode(SDNode *Node, bool IsClone, bool IsCloned,
135                       DenseMap<SDValue, unsigned> &VRBaseMap,
136                       DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
137  void EmitSpecialNode(SDNode *Node, bool IsClone, bool IsCloned,
138                       DenseMap<SDValue, unsigned> &VRBaseMap,
139                       DenseMap<MachineBasicBlock*, MachineBasicBlock*> *EM);
140};
141
142}
143
144#endif
145