LegalizeFloatTypes.cpp revision 05c397d52a145c8844790d6491c4c51d4bbfed7c 
1//===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements float type expansion and softening for LegalizeTypes.
11// Softening is the act of turning a computation in an illegal floating point
12// type into a computation in an integer type of the same size; also known as
13// "soft float".  For example, turning f32 arithmetic into operations using i32.
14// The resulting integer value is the same as what you would get by performing
15// the floating point operation and bitcasting the result to the integer type.
16// Expansion is the act of changing a computation in an illegal type to be a
17// computation in two identical registers of a smaller type.  For example,
18// implementing ppcf128 arithmetic in two f64 registers.
19//
20//===----------------------------------------------------------------------===//
21
22#include "LegalizeTypes.h"
23using namespace llvm;
24
25/// GetFPLibCall - Return the right libcall for the given floating point type.
26static RTLIB::Libcall GetFPLibCall(MVT VT,
27                                   RTLIB::Libcall Call_F32,
28                                   RTLIB::Libcall Call_F64,
29                                   RTLIB::Libcall Call_F80,
30                                   RTLIB::Libcall Call_PPCF128) {
31  return
32    VT == MVT::f32 ? Call_F32 :
33    VT == MVT::f64 ? Call_F64 :
34    VT == MVT::f80 ? Call_F80 :
35    VT == MVT::ppcf128 ? Call_PPCF128 :
36    RTLIB::UNKNOWN_LIBCALL;
37}
38
39//===----------------------------------------------------------------------===//
40//  Result Float to Integer Conversion.
41//===----------------------------------------------------------------------===//
42
43void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
44  DEBUG(cerr << "Soften float result " << ResNo << ": "; N->dump(&DAG);
45        cerr << "\n");
46  SDOperand R = SDOperand();
47
48  switch (N->getOpcode()) {
49  default:
50#ifndef NDEBUG
51    cerr << "SoftenFloatResult #" << ResNo << ": ";
52    N->dump(&DAG); cerr << "\n";
53#endif
54    assert(0 && "Do not know how to soften the result of this operator!");
55    abort();
56
57    case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
58    case ISD::BUILD_PAIR:  R = SoftenFloatRes_BUILD_PAIR(N); break;
59    case ISD::ConstantFP:
60      R = SoftenFloatRes_ConstantFP(cast<ConstantFPSDNode>(N));
61      break;
62    case ISD::FADD:        R = SoftenFloatRes_FADD(N); break;
63    case ISD::FCOPYSIGN:   R = SoftenFloatRes_FCOPYSIGN(N); break;
64    case ISD::FMUL:        R = SoftenFloatRes_FMUL(N); break;
65    case ISD::FP_EXTEND:   R = SoftenFloatRes_FP_EXTEND(N); break;
66    case ISD::FP_ROUND:    R = SoftenFloatRes_FP_ROUND(N); break;
67    case ISD::FPOWI:       R = SoftenFloatRes_FPOWI(N); break;
68    case ISD::FSUB:        R = SoftenFloatRes_FSUB(N); break;
69    case ISD::LOAD:        R = SoftenFloatRes_LOAD(N); break;
70    case ISD::SELECT:      R = SoftenFloatRes_SELECT(N); break;
71    case ISD::SELECT_CC:   R = SoftenFloatRes_SELECT_CC(N); break;
72    case ISD::SINT_TO_FP:  R = SoftenFloatRes_SINT_TO_FP(N); break;
73    case ISD::UINT_TO_FP:  R = SoftenFloatRes_UINT_TO_FP(N); break;
74  }
75
76  // If R is null, the sub-method took care of registering the result.
77  if (R.Val)
78    SetSoftenedFloat(SDOperand(N, ResNo), R);
79}
80
81SDOperand DAGTypeLegalizer::SoftenFloatRes_BIT_CONVERT(SDNode *N) {
82  return BitConvertToInteger(N->getOperand(0));
83}
84
85SDOperand DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
86  // Convert the inputs to integers, and build a new pair out of them.
87  return DAG.getNode(ISD::BUILD_PAIR,
88                     TLI.getTypeToTransformTo(N->getValueType(0)),
89                     BitConvertToInteger(N->getOperand(0)),
90                     BitConvertToInteger(N->getOperand(1)));
91}
92
93SDOperand DAGTypeLegalizer::SoftenFloatRes_ConstantFP(ConstantFPSDNode *N) {
94  return DAG.getConstant(N->getValueAPF().convertToAPInt(),
95                         TLI.getTypeToTransformTo(N->getValueType(0)));
96}
97
98SDOperand DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
99  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
100  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
101                       GetSoftenedFloat(N->getOperand(1)) };
102  return MakeLibCall(GetFPLibCall(N->getValueType(0),
103                                  RTLIB::ADD_F32,
104                                  RTLIB::ADD_F64,
105                                  RTLIB::ADD_F80,
106                                  RTLIB::ADD_PPCF128),
107                     NVT, Ops, 2, false);
108}
109
110SDOperand DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
111  SDOperand LHS = GetSoftenedFloat(N->getOperand(0));
112  SDOperand RHS = BitConvertToInteger(N->getOperand(1));
113
114  MVT LVT = LHS.getValueType();
115  MVT RVT = RHS.getValueType();
116
117  unsigned LSize = LVT.getSizeInBits();
118  unsigned RSize = RVT.getSizeInBits();
119
120  // First get the sign bit of second operand.
121  SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
122                                  DAG.getConstant(RSize - 1,
123                                                  TLI.getShiftAmountTy()));
124  SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
125
126  // Shift right or sign-extend it if the two operands have different types.
127  int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
128  if (SizeDiff > 0) {
129    SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
130                          DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
131    SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
132  } else if (SizeDiff < 0) {
133    SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
134    SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
135                          DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
136  }
137
138  // Clear the sign bit of the first operand.
139  SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
140                               DAG.getConstant(LSize - 1,
141                                               TLI.getShiftAmountTy()));
142  Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
143  LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
144
145  // Or the value with the sign bit.
146  return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
147}
148
149SDOperand DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
150  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
151  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
152                       GetSoftenedFloat(N->getOperand(1)) };
153  return MakeLibCall(GetFPLibCall(N->getValueType(0),
154                                  RTLIB::MUL_F32,
155                                  RTLIB::MUL_F64,
156                                  RTLIB::MUL_F80,
157                                  RTLIB::MUL_PPCF128),
158                     NVT, Ops, 2, false);
159}
160
161SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
162  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
163  SDOperand Op = N->getOperand(0);
164
165  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
166  switch (Op.getValueType().getSimpleVT()) {
167  default:
168    assert(false && "Unsupported FP_EXTEND!");
169  case MVT::f32:
170    switch (N->getValueType(0).getSimpleVT()) {
171    default:
172      assert(false && "Unsupported FP_EXTEND!");
173    case MVT::f64:
174      LC = RTLIB::FPEXT_F32_F64;
175    }
176  }
177
178  return MakeLibCall(LC, NVT, &Op, 1, false);
179}
180
181SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
182  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
183  SDOperand Op = N->getOperand(0);
184
185  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
186  switch (Op.getValueType().getSimpleVT()) {
187  default:
188    assert(false && "Unsupported FP_ROUND!");
189  case MVT::f64:
190    switch (N->getValueType(0).getSimpleVT()) {
191    default:
192      assert(false && "Unsupported FP_ROUND!");
193    case MVT::f32:
194      LC = RTLIB::FPROUND_F64_F32;
195    }
196  }
197
198  return MakeLibCall(LC, NVT, &Op, 1, false);
199}
200
201SDOperand DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
202  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
203  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
204  return MakeLibCall(GetFPLibCall(N->getValueType(0),
205                                  RTLIB::POWI_F32,
206                                  RTLIB::POWI_F64,
207                                  RTLIB::POWI_F80,
208                                  RTLIB::POWI_PPCF128),
209                     NVT, Ops, 2, false);
210}
211
212SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
213  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
214  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
215                       GetSoftenedFloat(N->getOperand(1)) };
216  return MakeLibCall(GetFPLibCall(N->getValueType(0),
217                                  RTLIB::SUB_F32,
218                                  RTLIB::SUB_F64,
219                                  RTLIB::SUB_F80,
220                                  RTLIB::SUB_PPCF128),
221                     NVT, Ops, 2, false);
222}
223
224SDOperand DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
225  LoadSDNode *L = cast<LoadSDNode>(N);
226  MVT VT = N->getValueType(0);
227  MVT NVT = TLI.getTypeToTransformTo(VT);
228
229  SDOperand NewL;
230  if (L->getExtensionType() == ISD::NON_EXTLOAD) {
231    NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
232                       NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
233                       L->getSrcValue(), L->getSrcValueOffset(), NVT,
234                       L->isVolatile(), L->getAlignment());
235    // Legalized the chain result - switch anything that used the old chain to
236    // use the new one.
237    ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
238    return NewL;
239  }
240
241  // Do a non-extending load followed by FP_EXTEND.
242  NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
243                     L->getMemoryVT(), L->getChain(),
244                     L->getBasePtr(), L->getOffset(),
245                     L->getSrcValue(), L->getSrcValueOffset(),
246                     L->getMemoryVT(),
247                     L->isVolatile(), L->getAlignment());
248  // Legalized the chain result - switch anything that used the old chain to
249  // use the new one.
250  ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
251  return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NewL));
252}
253
254SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {
255  SDOperand LHS = GetSoftenedFloat(N->getOperand(1));
256  SDOperand RHS = GetSoftenedFloat(N->getOperand(2));
257  return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
258}
259
260SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N) {
261  SDOperand LHS = GetSoftenedFloat(N->getOperand(2));
262  SDOperand RHS = GetSoftenedFloat(N->getOperand(3));
263  return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
264                     N->getOperand(1), LHS, RHS, N->getOperand(4));
265}
266
267SDOperand DAGTypeLegalizer::SoftenFloatRes_SINT_TO_FP(SDNode *N) {
268  SDOperand Op = N->getOperand(0);
269  MVT RVT = N->getValueType(0);
270
271  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
272  switch (Op.getValueType().getSimpleVT()) {
273  case MVT::i32:
274    switch (RVT.getSimpleVT()) {
275    case MVT::f32:
276      LC = RTLIB::SINTTOFP_I32_F32;
277      break;
278    case MVT::f64:
279      LC = RTLIB::SINTTOFP_I32_F64;
280      break;
281    default:
282      break;
283    }
284    break;
285  case MVT::i64:
286    switch (RVT.getSimpleVT()) {
287    case MVT::f32:
288      LC = RTLIB::SINTTOFP_I64_F32;
289      break;
290    case MVT::f64:
291      LC = RTLIB::SINTTOFP_I64_F64;
292      break;
293    case MVT::f80:
294      LC = RTLIB::SINTTOFP_I64_F80;
295      break;
296    case MVT::ppcf128:
297      LC = RTLIB::SINTTOFP_I64_PPCF128;
298      break;
299    default:
300      break;
301    }
302    break;
303  case MVT::i128:
304    switch (RVT.getSimpleVT()) {
305    case MVT::f32:
306      LC = RTLIB::SINTTOFP_I128_F32;
307      break;
308    case MVT::f64:
309      LC = RTLIB::SINTTOFP_I128_F64;
310      break;
311    case MVT::f80:
312      LC = RTLIB::SINTTOFP_I128_F80;
313      break;
314    case MVT::ppcf128:
315      LC = RTLIB::SINTTOFP_I128_PPCF128;
316      break;
317    default:
318      break;
319    }
320    break;
321  default:
322    break;
323  }
324  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported SINT_TO_FP!");
325
326  return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
327}
328
329SDOperand DAGTypeLegalizer::SoftenFloatRes_UINT_TO_FP(SDNode *N) {
330  SDOperand Op = N->getOperand(0);
331  MVT RVT = N->getValueType(0);
332
333  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
334  switch (Op.getValueType().getSimpleVT()) {
335  case MVT::i32:
336    switch (RVT.getSimpleVT()) {
337    case MVT::f32:
338      LC = RTLIB::UINTTOFP_I32_F32;
339      break;
340    case MVT::f64:
341      LC = RTLIB::UINTTOFP_I32_F64;
342      break;
343    default:
344      break;
345    }
346    break;
347  case MVT::i64:
348    switch (RVT.getSimpleVT()) {
349    case MVT::f32:
350      LC = RTLIB::UINTTOFP_I64_F32;
351      break;
352    case MVT::f64:
353      LC = RTLIB::UINTTOFP_I64_F64;
354      break;
355    default:
356      break;
357    }
358    break;
359  default:
360    break;
361  }
362  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported UINT_TO_FP!");
363
364  return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
365}
366
367
368//===----------------------------------------------------------------------===//
369//  Operand Float to Integer Conversion..
370//===----------------------------------------------------------------------===//
371
372bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
373  DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
374        cerr << "\n");
375  SDOperand Res = SDOperand();
376
377  switch (N->getOpcode()) {
378  default:
379#ifndef NDEBUG
380    cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
381    N->dump(&DAG); cerr << "\n";
382#endif
383    assert(0 && "Do not know how to soften this operator's operand!");
384    abort();
385
386  case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
387  case ISD::BR_CC:       Res = SoftenFloatOp_BR_CC(N); break;
388  case ISD::FP_TO_SINT:  Res = SoftenFloatOp_FP_TO_SINT(N); break;
389  case ISD::FP_TO_UINT:  Res = SoftenFloatOp_FP_TO_UINT(N); break;
390  case ISD::SELECT_CC:   Res = SoftenFloatOp_SELECT_CC(N); break;
391  case ISD::SETCC:       Res = SoftenFloatOp_SETCC(N); break;
392  case ISD::STORE:       Res = SoftenFloatOp_STORE(N, OpNo); break;
393  }
394
395  // If the result is null, the sub-method took care of registering results etc.
396  if (!Res.Val) return false;
397
398  // If the result is N, the sub-method updated N in place.  Check to see if any
399  // operands are new, and if so, mark them.
400  if (Res.Val == N) {
401    // Mark N as new and remark N and its operands.  This allows us to correctly
402    // revisit N if it needs another step of promotion and allows us to visit
403    // any new operands to N.
404    ReanalyzeNode(N);
405    return true;
406  }
407
408  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
409         "Invalid operand expansion");
410
411  ReplaceValueWith(SDOperand(N, 0), Res);
412  return false;
413}
414
415/// SoftenSetCCOperands - Soften the operands of a comparison.  This code is
416/// shared among BR_CC, SELECT_CC, and SETCC handlers.
417void DAGTypeLegalizer::SoftenSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
418                                           ISD::CondCode &CCCode) {
419  SDOperand LHSInt = GetSoftenedFloat(NewLHS);
420  SDOperand RHSInt = GetSoftenedFloat(NewRHS);
421  MVT VT = NewLHS.getValueType();
422
423  assert((VT == MVT::f32 || VT == MVT::f64) && "Unsupported setcc type!");
424
425  // Expand into one or more soft-fp libcall(s).
426  RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
427  switch (CCCode) {
428  case ISD::SETEQ:
429  case ISD::SETOEQ:
430    LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
431    break;
432  case ISD::SETNE:
433  case ISD::SETUNE:
434    LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64;
435    break;
436  case ISD::SETGE:
437  case ISD::SETOGE:
438    LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
439    break;
440  case ISD::SETLT:
441  case ISD::SETOLT:
442    LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
443    break;
444  case ISD::SETLE:
445  case ISD::SETOLE:
446    LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
447    break;
448  case ISD::SETGT:
449  case ISD::SETOGT:
450    LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
451    break;
452  case ISD::SETUO:
453    LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
454    break;
455  case ISD::SETO:
456    LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : RTLIB::O_F64;
457    break;
458  default:
459    LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
460    switch (CCCode) {
461    case ISD::SETONE:
462      // SETONE = SETOLT | SETOGT
463      LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
464      // Fallthrough
465    case ISD::SETUGT:
466      LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
467      break;
468    case ISD::SETUGE:
469      LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
470      break;
471    case ISD::SETULT:
472      LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
473      break;
474    case ISD::SETULE:
475      LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
476      break;
477    case ISD::SETUEQ:
478      LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
479      break;
480    default: assert(false && "Do not know how to soften this setcc!");
481    }
482  }
483
484  MVT RetVT = MVT::i32; // FIXME: is this the correct return type?
485  SDOperand Ops[2] = { LHSInt, RHSInt };
486  NewLHS = MakeLibCall(LC1, RetVT, Ops, 2, false/*sign irrelevant*/);
487  NewRHS = DAG.getConstant(0, RetVT);
488  CCCode = TLI.getCmpLibcallCC(LC1);
489  if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
490    SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
491                                NewLHS, NewRHS, DAG.getCondCode(CCCode));
492    NewLHS = MakeLibCall(LC2, RetVT, Ops, 2, false/*sign irrelevant*/);
493    NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
494                         NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
495    NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);
496    NewRHS = SDOperand();
497  }
498}
499
500SDOperand DAGTypeLegalizer::SoftenFloatOp_BIT_CONVERT(SDNode *N) {
501  return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
502                     GetSoftenedFloat(N->getOperand(0)));
503}
504
505SDOperand DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
506  SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
507  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
508  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
509
510  // If SoftenSetCCOperands returned a scalar, we need to compare the result
511  // against zero to select between true and false values.
512  if (NewRHS.Val == 0) {
513    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
514    CCCode = ISD::SETNE;
515  }
516
517  // Update N to have the operands specified.
518  return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
519                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
520                                N->getOperand(4));
521}
522
523SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_SINT(SDNode *N) {
524  MVT SVT = N->getOperand(0).getValueType();
525  MVT RVT = N->getValueType(0);
526
527  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
528  switch (RVT.getSimpleVT()) {
529  case MVT::i32:
530    switch (SVT.getSimpleVT()) {
531    case MVT::f32:
532      LC = RTLIB::FPTOSINT_F32_I32;
533      break;
534    case MVT::f64:
535      LC = RTLIB::FPTOSINT_F64_I32;
536      break;
537    case MVT::f80:
538      LC = RTLIB::FPTOSINT_F80_I32;
539      break;
540    case MVT::ppcf128:
541      LC = RTLIB::FPTOSINT_PPCF128_I32;
542      break;
543    default:
544      break;
545    }
546    break;
547  case MVT::i64:
548    switch (SVT.getSimpleVT()) {
549    case MVT::f32:
550      LC = RTLIB::FPTOSINT_F32_I64;
551      break;
552    case MVT::f64:
553      LC = RTLIB::FPTOSINT_F64_I64;
554      break;
555    case MVT::f80:
556      LC = RTLIB::FPTOSINT_F80_I64;
557      break;
558    case MVT::ppcf128:
559      LC = RTLIB::FPTOSINT_PPCF128_I64;
560      break;
561    default:
562      break;
563    }
564    break;
565  case MVT::i128:
566    switch (SVT.getSimpleVT()) {
567    case MVT::f32:
568      LC = RTLIB::FPTOSINT_F32_I128;
569      break;
570    case MVT::f64:
571      LC = RTLIB::FPTOSINT_F64_I128;
572      break;
573    case MVT::f80:
574      LC = RTLIB::FPTOSINT_F80_I128;
575      break;
576    case MVT::ppcf128:
577      LC = RTLIB::FPTOSINT_PPCF128_I128;
578      break;
579    default:
580      break;
581    }
582    break;
583  default:
584    break;
585  }
586  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
587
588  SDOperand Op = GetSoftenedFloat(N->getOperand(0));
589  return MakeLibCall(LC, RVT, &Op, 1, false);
590}
591
592SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_UINT(SDNode *N) {
593  MVT SVT = N->getOperand(0).getValueType();
594  MVT RVT = N->getValueType(0);
595
596  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
597  switch (RVT.getSimpleVT()) {
598  case MVT::i32:
599    switch (SVT.getSimpleVT()) {
600    case MVT::f32:
601      LC = RTLIB::FPTOUINT_F32_I32;
602      break;
603    case MVT::f64:
604      LC = RTLIB::FPTOUINT_F64_I32;
605      break;
606    case MVT::f80:
607      LC = RTLIB::FPTOUINT_F80_I32;
608      break;
609    case MVT::ppcf128:
610      LC = RTLIB::FPTOUINT_PPCF128_I32;
611      break;
612    default:
613      break;
614    }
615    break;
616  case MVT::i64:
617    switch (SVT.getSimpleVT()) {
618    case MVT::f32:
619      LC = RTLIB::FPTOUINT_F32_I64;
620      break;
621    case MVT::f64:
622      LC = RTLIB::FPTOUINT_F64_I64;
623      break;
624    case MVT::f80:
625      LC = RTLIB::FPTOUINT_F80_I64;
626      break;
627    case MVT::ppcf128:
628      LC = RTLIB::FPTOUINT_PPCF128_I64;
629      break;
630    default:
631      break;
632    }
633    break;
634  case MVT::i128:
635    switch (SVT.getSimpleVT()) {
636    case MVT::f32:
637      LC = RTLIB::FPTOUINT_F32_I128;
638      break;
639    case MVT::f64:
640      LC = RTLIB::FPTOUINT_F64_I128;
641      break;
642    case MVT::f80:
643      LC = RTLIB::FPTOUINT_F80_I128;
644      break;
645    case MVT::ppcf128:
646      LC = RTLIB::FPTOUINT_PPCF128_I128;
647      break;
648    default:
649      break;
650    }
651    break;
652  default:
653    break;
654  }
655  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
656
657  SDOperand Op = GetSoftenedFloat(N->getOperand(0));
658  return MakeLibCall(LC, RVT, &Op, 1, false);
659}
660
661SDOperand DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
662  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
663  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
664  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
665
666  // If SoftenSetCCOperands returned a scalar, we need to compare the result
667  // against zero to select between true and false values.
668  if (NewRHS.Val == 0) {
669    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
670    CCCode = ISD::SETNE;
671  }
672
673  // Update N to have the operands specified.
674  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
675                                N->getOperand(2), N->getOperand(3),
676                                DAG.getCondCode(CCCode));
677}
678
679SDOperand DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
680  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
681  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
682  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
683
684  // If SoftenSetCCOperands returned a scalar, use it.
685  if (NewRHS.Val == 0) {
686    assert(NewLHS.getValueType() == N->getValueType(0) &&
687           "Unexpected setcc expansion!");
688    return NewLHS;
689  }
690
691  // Otherwise, update N to have the operands specified.
692  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
693                                DAG.getCondCode(CCCode));
694}
695
696SDOperand DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
697  assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
698  assert(OpNo == 1 && "Can only soften the stored value!");
699  StoreSDNode *ST = cast<StoreSDNode>(N);
700  SDOperand Val = ST->getValue();
701
702  if (ST->isTruncatingStore())
703    // Do an FP_ROUND followed by a non-truncating store.
704    Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, ST->getMemoryVT(),
705                                          Val, DAG.getIntPtrConstant(0)));
706  else
707    Val = GetSoftenedFloat(Val);
708
709  return DAG.getStore(ST->getChain(), Val, ST->getBasePtr(),
710                      ST->getSrcValue(), ST->getSrcValueOffset(),
711                      ST->isVolatile(), ST->getAlignment());
712}
713
714
715//===----------------------------------------------------------------------===//
716//  Float Result Expansion
717//===----------------------------------------------------------------------===//
718
719/// ExpandFloatResult - This method is called when the specified result of the
720/// specified node is found to need expansion.  At this point, the node may also
721/// have invalid operands or may have other results that need promotion, we just
722/// know that (at least) one result needs expansion.
723void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
724  DEBUG(cerr << "Expand float result: "; N->dump(&DAG); cerr << "\n");
725  SDOperand Lo, Hi;
726  Lo = Hi = SDOperand();
727
728  // See if the target wants to custom expand this node.
729  if (TLI.getOperationAction(N->getOpcode(), N->getValueType(ResNo)) ==
730      TargetLowering::Custom) {
731    // If the target wants to, allow it to lower this itself.
732    if (SDNode *P = TLI.ReplaceNodeResults(N, DAG)) {
733      // Everything that once used N now uses P.  We are guaranteed that the
734      // result value types of N and the result value types of P match.
735      ReplaceNodeWith(N, P);
736      return;
737    }
738  }
739
740  switch (N->getOpcode()) {
741  default:
742#ifndef NDEBUG
743    cerr << "ExpandFloatResult #" << ResNo << ": ";
744    N->dump(&DAG); cerr << "\n";
745#endif
746    assert(0 && "Do not know how to expand the result of this operator!");
747    abort();
748
749  case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
750  case ISD::UNDEF:        SplitRes_UNDEF(N, Lo, Hi); break;
751  case ISD::SELECT:       SplitRes_SELECT(N, Lo, Hi); break;
752  case ISD::SELECT_CC:    SplitRes_SELECT_CC(N, Lo, Hi); break;
753
754  case ISD::BIT_CONVERT:        ExpandRes_BIT_CONVERT(N, Lo, Hi); break;
755  case ISD::BUILD_PAIR:         ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
756  case ISD::EXTRACT_ELEMENT:    ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
757  case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
758
759  case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
760  case ISD::FABS:       ExpandFloatRes_FABS(N, Lo, Hi); break;
761  case ISD::FADD:       ExpandFloatRes_FADD(N, Lo, Hi); break;
762  case ISD::FDIV:       ExpandFloatRes_FDIV(N, Lo, Hi); break;
763  case ISD::FMUL:       ExpandFloatRes_FMUL(N, Lo, Hi); break;
764  case ISD::FSUB:       ExpandFloatRes_FSUB(N, Lo, Hi); break;
765  case ISD::LOAD:       ExpandFloatRes_LOAD(N, Lo, Hi); break;
766  case ISD::SINT_TO_FP:
767  case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
768  }
769
770  // If Lo/Hi is null, the sub-method took care of registering results etc.
771  if (Lo.Val)
772    SetExpandedFloat(SDOperand(N, ResNo), Lo, Hi);
773}
774
775void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDOperand &Lo,
776                                                 SDOperand &Hi) {
777  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
778  assert(NVT.getSizeInBits() == integerPartWidth &&
779         "Do not know how to expand this float constant!");
780  APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().convertToAPInt();
781  Lo = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
782                                       &C.getRawData()[1])), NVT);
783  Hi = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
784                                       &C.getRawData()[0])), NVT);
785}
786
787void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDOperand &Lo,
788                                           SDOperand &Hi) {
789  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
790  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
791                                            RTLIB::ADD_F32,
792                                            RTLIB::ADD_F64,
793                                            RTLIB::ADD_F80,
794                                            RTLIB::ADD_PPCF128),
795                               N->getValueType(0), Ops, 2,
796                               false);
797  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
798  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
799}
800
801void DAGTypeLegalizer::ExpandFloatRes_FABS(SDNode *N, SDOperand &Lo,
802                                           SDOperand &Hi) {
803  assert(N->getValueType(0) == MVT::ppcf128 &&
804         "Logic only correct for ppcf128!");
805  SDOperand Tmp;
806  GetExpandedFloat(N->getOperand(0), Lo, Tmp);
807  Hi = DAG.getNode(ISD::FABS, Tmp.getValueType(), Tmp);
808  // Lo = Hi==fabs(Hi) ? Lo : -Lo;
809  Lo = DAG.getNode(ISD::SELECT_CC, Lo.getValueType(), Tmp, Hi, Lo,
810                   DAG.getNode(ISD::FNEG, Lo.getValueType(), Lo),
811                   DAG.getCondCode(ISD::SETEQ));
812}
813
814void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDOperand &Lo,
815                                           SDOperand &Hi) {
816  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
817  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
818                                            RTLIB::DIV_F32,
819                                            RTLIB::DIV_F64,
820                                            RTLIB::DIV_F80,
821                                            RTLIB::DIV_PPCF128),
822                               N->getValueType(0), Ops, 2,
823                               false);
824  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
825  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
826}
827
828void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDOperand &Lo,
829                                           SDOperand &Hi) {
830  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
831  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
832                                            RTLIB::MUL_F32,
833                                            RTLIB::MUL_F64,
834                                            RTLIB::MUL_F80,
835                                            RTLIB::MUL_PPCF128),
836                               N->getValueType(0), Ops, 2,
837                               false);
838  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
839  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
840}
841
842void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDOperand &Lo,
843                                           SDOperand &Hi) {
844  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
845  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
846                                            RTLIB::SUB_F32,
847                                            RTLIB::SUB_F64,
848                                            RTLIB::SUB_F80,
849                                            RTLIB::SUB_PPCF128),
850                               N->getValueType(0), Ops, 2,
851                               false);
852  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
853  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
854}
855
856void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDOperand &Lo,
857                                           SDOperand &Hi) {
858  if (ISD::isNormalLoad(N)) {
859    ExpandRes_NormalLoad(N, Lo, Hi);
860    return;
861  }
862
863  assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
864  LoadSDNode *LD = cast<LoadSDNode>(N);
865  SDOperand Chain = LD->getChain();
866  SDOperand Ptr = LD->getBasePtr();
867
868  MVT NVT = TLI.getTypeToTransformTo(LD->getValueType(0));
869  assert(NVT.isByteSized() && "Expanded type not byte sized!");
870  assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
871
872  Lo = DAG.getExtLoad(LD->getExtensionType(), NVT, Chain, Ptr,
873                      LD->getSrcValue(), LD->getSrcValueOffset(),
874                      LD->getMemoryVT(),
875                      LD->isVolatile(), LD->getAlignment());
876
877  // Remember the chain.
878  Chain = Lo.getValue(1);
879
880  // The high part is undefined.
881  Hi = DAG.getNode(ISD::UNDEF, NVT);
882
883  // Modified the chain - switch anything that used the old chain to use the
884  // new one.
885  ReplaceValueWith(SDOperand(LD, 1), Chain);
886}
887
888void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDOperand &Lo,
889                                                 SDOperand &Hi) {
890  assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
891  MVT VT = N->getValueType(0);
892  MVT NVT = TLI.getTypeToTransformTo(VT);
893  SDOperand Src = N->getOperand(0);
894  MVT SrcVT = Src.getValueType();
895
896  // First do an SINT_TO_FP, whether the original was signed or unsigned.
897  if (SrcVT.bitsLE(MVT::i32)) {
898    // The integer can be represented exactly in an f64.
899    Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Src);
900    Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT);
901    Hi = DAG.getNode(ISD::SINT_TO_FP, NVT, Src);
902  } else {
903    RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
904    if (SrcVT.bitsLE(MVT::i64)) {
905      Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Src);
906      LC = RTLIB::SINTTOFP_I64_PPCF128;
907    } else if (SrcVT.bitsLE(MVT::i128)) {
908      Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i128, Src);
909      LC = RTLIB::SINTTOFP_I128_PPCF128;
910    }
911    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
912
913    Hi = MakeLibCall(LC, VT, &Src, 1, true);
914    assert(Hi.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
915    Lo = Hi.getOperand(0); Hi = Hi.getOperand(1);
916  }
917
918  if (N->getOpcode() == ISD::SINT_TO_FP)
919    return;
920
921  // Unsigned - fix up the SINT_TO_FP value just calculated.
922  Hi = DAG.getNode(ISD::BUILD_PAIR, VT, Lo, Hi);
923  SrcVT = Src.getValueType();
924
925  // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
926  static const uint64_t TwoE32[]  = { 0x41f0000000000000LL, 0 };
927  static const uint64_t TwoE64[]  = { 0x43f0000000000000LL, 0 };
928  static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
929  const uint64_t *Parts = 0;
930
931  switch (SrcVT.getSimpleVT()) {
932  default:
933    assert(false && "Unsupported UINT_TO_FP!");
934  case MVT::i32:
935    Parts = TwoE32;
936  case MVT::i64:
937    Parts = TwoE64;
938  case MVT::i128:
939    Parts = TwoE128;
940  }
941
942  Lo = DAG.getNode(ISD::FADD, VT, Hi,
943                   DAG.getConstantFP(APFloat(APInt(128, 2, Parts)),
944                                     MVT::ppcf128));
945  Lo = DAG.getNode(ISD::SELECT_CC, VT, Src, DAG.getConstant(0, SrcVT), Lo, Hi,
946                   DAG.getCondCode(ISD::SETLT));
947  Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
948                   DAG.getConstant(1, TLI.getPointerTy()));
949  Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
950                   DAG.getConstant(0, TLI.getPointerTy()));
951}
952
953
954//===----------------------------------------------------------------------===//
955//  Float Operand Expansion
956//===----------------------------------------------------------------------===//
957
958/// ExpandFloatOperand - This method is called when the specified operand of the
959/// specified node is found to need expansion.  At this point, all of the result
960/// types of the node are known to be legal, but other operands of the node may
961/// need promotion or expansion as well as the specified one.
962bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
963  DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
964  SDOperand Res = SDOperand();
965
966  if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
967      == TargetLowering::Custom)
968    Res = TLI.LowerOperation(SDOperand(N, OpNo), DAG);
969
970  if (Res.Val == 0) {
971    switch (N->getOpcode()) {
972    default:
973  #ifndef NDEBUG
974      cerr << "ExpandFloatOperand Op #" << OpNo << ": ";
975      N->dump(&DAG); cerr << "\n";
976  #endif
977      assert(0 && "Do not know how to expand this operator's operand!");
978      abort();
979
980    case ISD::BIT_CONVERT:     Res = ExpandOp_BIT_CONVERT(N); break;
981    case ISD::BUILD_VECTOR:    Res = ExpandOp_BUILD_VECTOR(N); break;
982    case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
983
984    case ISD::BR_CC:      Res = ExpandFloatOp_BR_CC(N); break;
985    case ISD::FP_ROUND:   Res = ExpandFloatOp_FP_ROUND(N); break;
986    case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
987    case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
988    case ISD::SELECT_CC:  Res = ExpandFloatOp_SELECT_CC(N); break;
989    case ISD::SETCC:      Res = ExpandFloatOp_SETCC(N); break;
990    case ISD::STORE:      Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N),
991                                                    OpNo); break;
992    }
993  }
994
995  // If the result is null, the sub-method took care of registering results etc.
996  if (!Res.Val) return false;
997  // If the result is N, the sub-method updated N in place.  Check to see if any
998  // operands are new, and if so, mark them.
999  if (Res.Val == N) {
1000    // Mark N as new and remark N and its operands.  This allows us to correctly
1001    // revisit N if it needs another step of expansion and allows us to visit
1002    // any new operands to N.
1003    ReanalyzeNode(N);
1004    return true;
1005  }
1006
1007  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
1008         "Invalid operand expansion");
1009
1010  ReplaceValueWith(SDOperand(N, 0), Res);
1011  return false;
1012}
1013
1014/// FloatExpandSetCCOperands - Expand the operands of a comparison.  This code
1015/// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1016void DAGTypeLegalizer::FloatExpandSetCCOperands(SDOperand &NewLHS,
1017                                                SDOperand &NewRHS,
1018                                                ISD::CondCode &CCCode) {
1019  SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
1020  GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1021  GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1022
1023  MVT VT = NewLHS.getValueType();
1024  assert(VT == MVT::ppcf128 && "Unsupported setcc type!");
1025
1026  // FIXME:  This generated code sucks.  We want to generate
1027  //         FCMP crN, hi1, hi2
1028  //         BNE crN, L:
1029  //         FCMP crN, lo1, lo2
1030  // The following can be improved, but not that much.
1031  SDOperand Tmp1, Tmp2, Tmp3;
1032  Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ);
1033  Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, CCCode);
1034  Tmp3 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1035  Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETNE);
1036  Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode);
1037  Tmp1 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1038  NewLHS = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp3);
1039  NewRHS = SDOperand();   // LHS is the result, not a compare.
1040}
1041
1042SDOperand DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1043  SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1044  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1045  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1046
1047  // If ExpandSetCCOperands returned a scalar, we need to compare the result
1048  // against zero to select between true and false values.
1049  if (NewRHS.Val == 0) {
1050    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
1051    CCCode = ISD::SETNE;
1052  }
1053
1054  // Update N to have the operands specified.
1055  return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
1056                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
1057                                N->getOperand(4));
1058}
1059
1060SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1061  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1062         "Logic only correct for ppcf128!");
1063  SDOperand Lo, Hi;
1064  GetExpandedFloat(N->getOperand(0), Lo, Hi);
1065  // Round it the rest of the way (e.g. to f32) if needed.
1066  return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Hi, N->getOperand(1));
1067}
1068
1069SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1070  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1071         "Unsupported FP_TO_SINT!");
1072
1073  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1074  switch (N->getValueType(0).getSimpleVT()) {
1075  default:
1076    assert(false && "Unsupported FP_TO_SINT!");
1077  case MVT::i32:
1078    LC = RTLIB::FPTOSINT_PPCF128_I32;
1079  case MVT::i64:
1080    LC = RTLIB::FPTOSINT_PPCF128_I64;
1081    break;
1082  case MVT::i128:
1083    LC = RTLIB::FPTOSINT_PPCF128_I64;
1084    break;
1085  }
1086
1087  return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
1088}
1089
1090SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1091  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1092         "Unsupported FP_TO_UINT!");
1093
1094  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1095  switch (N->getValueType(0).getSimpleVT()) {
1096  default:
1097    assert(false && "Unsupported FP_TO_UINT!");
1098  case MVT::i32:
1099    LC = RTLIB::FPTOUINT_PPCF128_I32;
1100    break;
1101  case MVT::i64:
1102    LC = RTLIB::FPTOUINT_PPCF128_I64;
1103    break;
1104  case MVT::i128:
1105    LC = RTLIB::FPTOUINT_PPCF128_I128;
1106    break;
1107  }
1108
1109  return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
1110}
1111
1112SDOperand DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1113  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1114  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1115  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1116
1117  // If ExpandSetCCOperands returned a scalar, we need to compare the result
1118  // against zero to select between true and false values.
1119  if (NewRHS.Val == 0) {
1120    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
1121    CCCode = ISD::SETNE;
1122  }
1123
1124  // Update N to have the operands specified.
1125  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
1126                                N->getOperand(2), N->getOperand(3),
1127                                DAG.getCondCode(CCCode));
1128}
1129
1130SDOperand DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1131  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1132  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1133  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1134
1135  // If ExpandSetCCOperands returned a scalar, use it.
1136  if (NewRHS.Val == 0) {
1137    assert(NewLHS.getValueType() == N->getValueType(0) &&
1138           "Unexpected setcc expansion!");
1139    return NewLHS;
1140  }
1141
1142  // Otherwise, update N to have the operands specified.
1143  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
1144                                DAG.getCondCode(CCCode));
1145}
1146
1147SDOperand DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1148  if (ISD::isNormalStore(N))
1149    return ExpandOp_NormalStore(N, OpNo);
1150
1151  assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1152  assert(OpNo == 1 && "Can only expand the stored value so far");
1153  StoreSDNode *ST = cast<StoreSDNode>(N);
1154
1155  SDOperand Chain = ST->getChain();
1156  SDOperand Ptr = ST->getBasePtr();
1157
1158  MVT NVT = TLI.getTypeToTransformTo(ST->getValue().getValueType());
1159  assert(NVT.isByteSized() && "Expanded type not byte sized!");
1160  assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1161
1162  SDOperand Lo, Hi;
1163  GetExpandedOp(ST->getValue(), Lo, Hi);
1164
1165  return DAG.getTruncStore(Chain, Lo, Ptr,
1166                           ST->getSrcValue(), ST->getSrcValueOffset(),
1167                           ST->getMemoryVT(),
1168                           ST->isVolatile(), ST->getAlignment());
1169}
1170