LegalizeFloatTypes.cpp revision a89216d3b32fbdaf76eb4999d441ffaa5262b34c 
1//===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements float type expansion and softening for LegalizeTypes.
11// Softening is the act of turning a computation in an illegal floating point
12// type into a computation in an integer type of the same size; also known as
13// "soft float".  For example, turning f32 arithmetic into operations using i32.
14// The resulting integer value is the same as what you would get by performing
15// the floating point operation and bitcasting the result to the integer type.
16// Expansion is the act of changing a computation in an illegal type to be a
17// computation in two identical registers of a smaller type.  For example,
18// implementing ppcf128 arithmetic in two f64 registers.
19//
20//===----------------------------------------------------------------------===//
21
22#include "LegalizeTypes.h"
23using namespace llvm;
24
25/// GetFPLibCall - Return the right libcall for the given floating point type.
26static RTLIB::Libcall GetFPLibCall(MVT VT,
27                                   RTLIB::Libcall Call_F32,
28                                   RTLIB::Libcall Call_F64,
29                                   RTLIB::Libcall Call_F80,
30                                   RTLIB::Libcall Call_PPCF128) {
31  return
32    VT == MVT::f32 ? Call_F32 :
33    VT == MVT::f64 ? Call_F64 :
34    VT == MVT::f80 ? Call_F80 :
35    VT == MVT::ppcf128 ? Call_PPCF128 :
36    RTLIB::UNKNOWN_LIBCALL;
37}
38
39//===----------------------------------------------------------------------===//
40//  Result Float to Integer Conversion.
41//===----------------------------------------------------------------------===//
42
43void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
44  DEBUG(cerr << "Soften float result " << ResNo << ": "; N->dump(&DAG);
45        cerr << "\n");
46  SDOperand R = SDOperand();
47
48  switch (N->getOpcode()) {
49  default:
50#ifndef NDEBUG
51    cerr << "SoftenFloatResult #" << ResNo << ": ";
52    N->dump(&DAG); cerr << "\n";
53#endif
54    assert(0 && "Do not know how to soften the result of this operator!");
55    abort();
56
57    case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
58    case ISD::BUILD_PAIR:  R = SoftenFloatRes_BUILD_PAIR(N); break;
59    case ISD::ConstantFP:
60      R = SoftenFloatRes_ConstantFP(cast<ConstantFPSDNode>(N));
61      break;
62    case ISD::FCOPYSIGN:   R = SoftenFloatRes_FCOPYSIGN(N); break;
63    case ISD::FP_EXTEND:   R = SoftenFloatRes_FP_EXTEND(N); break;
64    case ISD::FP_ROUND:    R = SoftenFloatRes_FP_ROUND(N); break;
65    case ISD::LOAD:        R = SoftenFloatRes_LOAD(N); break;
66    case ISD::SELECT:      R = SoftenFloatRes_SELECT(N); break;
67    case ISD::SELECT_CC:   R = SoftenFloatRes_SELECT_CC(N); break;
68    case ISD::SINT_TO_FP:  R = SoftenFloatRes_SINT_TO_FP(N); break;
69    case ISD::UINT_TO_FP:  R = SoftenFloatRes_UINT_TO_FP(N); break;
70
71    case ISD::FADD:  R = SoftenFloatRes_FADD(N); break;
72    case ISD::FMUL:  R = SoftenFloatRes_FMUL(N); break;
73    case ISD::FPOWI: R = SoftenFloatRes_FPOWI(N); break;
74    case ISD::FSUB:  R = SoftenFloatRes_FSUB(N); break;
75  }
76
77  // If R is null, the sub-method took care of registering the result.
78  if (R.Val)
79    SetSoftenedFloat(SDOperand(N, ResNo), R);
80}
81
82SDOperand DAGTypeLegalizer::SoftenFloatRes_BIT_CONVERT(SDNode *N) {
83  return BitConvertToInteger(N->getOperand(0));
84}
85
86SDOperand DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
87  // Convert the inputs to integers, and build a new pair out of them.
88  return DAG.getNode(ISD::BUILD_PAIR,
89                     TLI.getTypeToTransformTo(N->getValueType(0)),
90                     BitConvertToInteger(N->getOperand(0)),
91                     BitConvertToInteger(N->getOperand(1)));
92}
93
94SDOperand DAGTypeLegalizer::SoftenFloatRes_ConstantFP(ConstantFPSDNode *N) {
95  return DAG.getConstant(N->getValueAPF().convertToAPInt(),
96                         TLI.getTypeToTransformTo(N->getValueType(0)));
97}
98
99SDOperand DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
100  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
101  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
102                       GetSoftenedFloat(N->getOperand(1)) };
103  return MakeLibCall(GetFPLibCall(N->getValueType(0),
104                                  RTLIB::ADD_F32,
105                                  RTLIB::ADD_F64,
106                                  RTLIB::ADD_F80,
107                                  RTLIB::ADD_PPCF128),
108                     NVT, Ops, 2, false);
109}
110
111SDOperand DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
112  SDOperand LHS = GetSoftenedFloat(N->getOperand(0));
113  SDOperand RHS = BitConvertToInteger(N->getOperand(1));
114
115  MVT LVT = LHS.getValueType();
116  MVT RVT = RHS.getValueType();
117
118  unsigned LSize = LVT.getSizeInBits();
119  unsigned RSize = RVT.getSizeInBits();
120
121  // First get the sign bit of second operand.
122  SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
123                                  DAG.getConstant(RSize - 1,
124                                                  TLI.getShiftAmountTy()));
125  SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
126
127  // Shift right or sign-extend it if the two operands have different types.
128  int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
129  if (SizeDiff > 0) {
130    SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
131                          DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
132    SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
133  } else if (SizeDiff < 0) {
134    SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
135    SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
136                          DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
137  }
138
139  // Clear the sign bit of the first operand.
140  SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
141                               DAG.getConstant(LSize - 1,
142                                               TLI.getShiftAmountTy()));
143  Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
144  LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
145
146  // Or the value with the sign bit.
147  return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
148}
149
150SDOperand DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
151  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
152  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
153                       GetSoftenedFloat(N->getOperand(1)) };
154  return MakeLibCall(GetFPLibCall(N->getValueType(0),
155                                  RTLIB::MUL_F32,
156                                  RTLIB::MUL_F64,
157                                  RTLIB::MUL_F80,
158                                  RTLIB::MUL_PPCF128),
159                     NVT, Ops, 2, false);
160}
161
162SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_EXTEND(SDNode *N) {
163  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
164  SDOperand Op = N->getOperand(0);
165
166  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
167  switch (Op.getValueType().getSimpleVT()) {
168  default:
169    assert(false && "Unsupported FP_EXTEND!");
170  case MVT::f32:
171    switch (N->getValueType(0).getSimpleVT()) {
172    default:
173      assert(false && "Unsupported FP_EXTEND!");
174    case MVT::f64:
175      LC = RTLIB::FPEXT_F32_F64;
176    }
177  }
178
179  return MakeLibCall(LC, NVT, &Op, 1, false);
180}
181
182SDOperand DAGTypeLegalizer::SoftenFloatRes_FP_ROUND(SDNode *N) {
183  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
184  SDOperand Op = N->getOperand(0);
185
186  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
187  switch (Op.getValueType().getSimpleVT()) {
188  default:
189    assert(false && "Unsupported FP_ROUND!");
190  case MVT::f64:
191    switch (N->getValueType(0).getSimpleVT()) {
192    default:
193      assert(false && "Unsupported FP_ROUND!");
194    case MVT::f32:
195      LC = RTLIB::FPROUND_F64_F32;
196    }
197  }
198
199  return MakeLibCall(LC, NVT, &Op, 1, false);
200}
201
202SDOperand DAGTypeLegalizer::SoftenFloatRes_FPOWI(SDNode *N) {
203  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
204  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)), N->getOperand(1) };
205  return MakeLibCall(GetFPLibCall(N->getValueType(0),
206                                  RTLIB::POWI_F32,
207                                  RTLIB::POWI_F64,
208                                  RTLIB::POWI_F80,
209                                  RTLIB::POWI_PPCF128),
210                     NVT, Ops, 2, false);
211}
212
213SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
214  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
215  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
216                       GetSoftenedFloat(N->getOperand(1)) };
217  return MakeLibCall(GetFPLibCall(N->getValueType(0),
218                                  RTLIB::SUB_F32,
219                                  RTLIB::SUB_F64,
220                                  RTLIB::SUB_F80,
221                                  RTLIB::SUB_PPCF128),
222                     NVT, Ops, 2, false);
223}
224
225SDOperand DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
226  LoadSDNode *L = cast<LoadSDNode>(N);
227  MVT VT = N->getValueType(0);
228  MVT NVT = TLI.getTypeToTransformTo(VT);
229
230  SDOperand NewL;
231  if (L->getExtensionType() == ISD::NON_EXTLOAD) {
232    NewL = DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
233                       NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
234                       L->getSrcValue(), L->getSrcValueOffset(), NVT,
235                       L->isVolatile(), L->getAlignment());
236    // Legalized the chain result - switch anything that used the old chain to
237    // use the new one.
238    ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
239    return NewL;
240  }
241
242  // Do a non-extending load followed by FP_EXTEND.
243  NewL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
244                     L->getMemoryVT(), L->getChain(),
245                     L->getBasePtr(), L->getOffset(),
246                     L->getSrcValue(), L->getSrcValueOffset(),
247                     L->getMemoryVT(),
248                     L->isVolatile(), L->getAlignment());
249  // Legalized the chain result - switch anything that used the old chain to
250  // use the new one.
251  ReplaceValueWith(SDOperand(N, 1), NewL.getValue(1));
252  return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NewL));
253}
254
255SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT(SDNode *N) {
256  SDOperand LHS = GetSoftenedFloat(N->getOperand(1));
257  SDOperand RHS = GetSoftenedFloat(N->getOperand(2));
258  return DAG.getNode(ISD::SELECT, LHS.getValueType(), N->getOperand(0),LHS,RHS);
259}
260
261SDOperand DAGTypeLegalizer::SoftenFloatRes_SELECT_CC(SDNode *N) {
262  SDOperand LHS = GetSoftenedFloat(N->getOperand(2));
263  SDOperand RHS = GetSoftenedFloat(N->getOperand(3));
264  return DAG.getNode(ISD::SELECT_CC, LHS.getValueType(), N->getOperand(0),
265                     N->getOperand(1), LHS, RHS, N->getOperand(4));
266}
267
268SDOperand DAGTypeLegalizer::SoftenFloatRes_SINT_TO_FP(SDNode *N) {
269  SDOperand Op = N->getOperand(0);
270  MVT RVT = N->getValueType(0);
271
272  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
273  switch (Op.getValueType().getSimpleVT()) {
274  case MVT::i32:
275    switch (RVT.getSimpleVT()) {
276    case MVT::f32:
277      LC = RTLIB::SINTTOFP_I32_F32;
278      break;
279    case MVT::f64:
280      LC = RTLIB::SINTTOFP_I32_F64;
281      break;
282    default:
283      break;
284    }
285    break;
286  case MVT::i64:
287    switch (RVT.getSimpleVT()) {
288    case MVT::f32:
289      LC = RTLIB::SINTTOFP_I64_F32;
290      break;
291    case MVT::f64:
292      LC = RTLIB::SINTTOFP_I64_F64;
293      break;
294    case MVT::f80:
295      LC = RTLIB::SINTTOFP_I64_F80;
296      break;
297    case MVT::ppcf128:
298      LC = RTLIB::SINTTOFP_I64_PPCF128;
299      break;
300    default:
301      break;
302    }
303    break;
304  case MVT::i128:
305    switch (RVT.getSimpleVT()) {
306    case MVT::f32:
307      LC = RTLIB::SINTTOFP_I128_F32;
308      break;
309    case MVT::f64:
310      LC = RTLIB::SINTTOFP_I128_F64;
311      break;
312    case MVT::f80:
313      LC = RTLIB::SINTTOFP_I128_F80;
314      break;
315    case MVT::ppcf128:
316      LC = RTLIB::SINTTOFP_I128_PPCF128;
317      break;
318    default:
319      break;
320    }
321    break;
322  default:
323    break;
324  }
325  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported SINT_TO_FP!");
326
327  return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
328}
329
330SDOperand DAGTypeLegalizer::SoftenFloatRes_UINT_TO_FP(SDNode *N) {
331  SDOperand Op = N->getOperand(0);
332  MVT RVT = N->getValueType(0);
333
334  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
335  switch (Op.getValueType().getSimpleVT()) {
336  case MVT::i32:
337    switch (RVT.getSimpleVT()) {
338    case MVT::f32:
339      LC = RTLIB::UINTTOFP_I32_F32;
340      break;
341    case MVT::f64:
342      LC = RTLIB::UINTTOFP_I32_F64;
343      break;
344    default:
345      break;
346    }
347    break;
348  case MVT::i64:
349    switch (RVT.getSimpleVT()) {
350    case MVT::f32:
351      LC = RTLIB::UINTTOFP_I64_F32;
352      break;
353    case MVT::f64:
354      LC = RTLIB::UINTTOFP_I64_F64;
355      break;
356    default:
357      break;
358    }
359    break;
360  default:
361    break;
362  }
363  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported UINT_TO_FP!");
364
365  return MakeLibCall(LC, TLI.getTypeToTransformTo(RVT), &Op, 1, false);
366}
367
368
369//===----------------------------------------------------------------------===//
370//  Operand Float to Integer Conversion..
371//===----------------------------------------------------------------------===//
372
373bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
374  DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
375        cerr << "\n");
376  SDOperand Res = SDOperand();
377
378  switch (N->getOpcode()) {
379  default:
380#ifndef NDEBUG
381    cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
382    N->dump(&DAG); cerr << "\n";
383#endif
384    assert(0 && "Do not know how to soften this operator's operand!");
385    abort();
386
387  case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
388
389  case ISD::BR_CC:      Res = SoftenFloatOp_BR_CC(N); break;
390  case ISD::FP_TO_SINT: Res = SoftenFloatOp_FP_TO_SINT(N); break;
391  case ISD::FP_TO_UINT: Res = SoftenFloatOp_FP_TO_UINT(N); break;
392  case ISD::SELECT_CC:  Res = SoftenFloatOp_SELECT_CC(N); break;
393  case ISD::SETCC:      Res = SoftenFloatOp_SETCC(N); break;
394  case ISD::STORE:      Res = SoftenFloatOp_STORE(N, OpNo); break;
395  }
396
397  // If the result is null, the sub-method took care of registering results etc.
398  if (!Res.Val) return false;
399
400  // If the result is N, the sub-method updated N in place.  Check to see if any
401  // operands are new, and if so, mark them.
402  if (Res.Val == N) {
403    // Mark N as new and remark N and its operands.  This allows us to correctly
404    // revisit N if it needs another step of promotion and allows us to visit
405    // any new operands to N.
406    ReanalyzeNode(N);
407    return true;
408  }
409
410  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
411         "Invalid operand expansion");
412
413  ReplaceValueWith(SDOperand(N, 0), Res);
414  return false;
415}
416
417/// SoftenSetCCOperands - Soften the operands of a comparison.  This code is
418/// shared among BR_CC, SELECT_CC, and SETCC handlers.
419void DAGTypeLegalizer::SoftenSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
420                                           ISD::CondCode &CCCode) {
421  SDOperand LHSInt = GetSoftenedFloat(NewLHS);
422  SDOperand RHSInt = GetSoftenedFloat(NewRHS);
423  MVT VT = NewLHS.getValueType();
424
425  assert((VT == MVT::f32 || VT == MVT::f64) && "Unsupported setcc type!");
426
427  // Expand into one or more soft-fp libcall(s).
428  RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
429  switch (CCCode) {
430  case ISD::SETEQ:
431  case ISD::SETOEQ:
432    LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
433    break;
434  case ISD::SETNE:
435  case ISD::SETUNE:
436    LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64;
437    break;
438  case ISD::SETGE:
439  case ISD::SETOGE:
440    LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
441    break;
442  case ISD::SETLT:
443  case ISD::SETOLT:
444    LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
445    break;
446  case ISD::SETLE:
447  case ISD::SETOLE:
448    LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
449    break;
450  case ISD::SETGT:
451  case ISD::SETOGT:
452    LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
453    break;
454  case ISD::SETUO:
455    LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
456    break;
457  case ISD::SETO:
458    LC1 = (VT == MVT::f32) ? RTLIB::O_F32 : RTLIB::O_F64;
459    break;
460  default:
461    LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
462    switch (CCCode) {
463    case ISD::SETONE:
464      // SETONE = SETOLT | SETOGT
465      LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
466      // Fallthrough
467    case ISD::SETUGT:
468      LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
469      break;
470    case ISD::SETUGE:
471      LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
472      break;
473    case ISD::SETULT:
474      LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
475      break;
476    case ISD::SETULE:
477      LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
478      break;
479    case ISD::SETUEQ:
480      LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
481      break;
482    default: assert(false && "Do not know how to soften this setcc!");
483    }
484  }
485
486  MVT RetVT = MVT::i32; // FIXME: is this the correct return type?
487  SDOperand Ops[2] = { LHSInt, RHSInt };
488  NewLHS = MakeLibCall(LC1, RetVT, Ops, 2, false/*sign irrelevant*/);
489  NewRHS = DAG.getConstant(0, RetVT);
490  CCCode = TLI.getCmpLibcallCC(LC1);
491  if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
492    SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
493                                NewLHS, NewRHS, DAG.getCondCode(CCCode));
494    NewLHS = MakeLibCall(LC2, RetVT, Ops, 2, false/*sign irrelevant*/);
495    NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
496                         NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
497    NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);
498    NewRHS = SDOperand();
499  }
500}
501
502SDOperand DAGTypeLegalizer::SoftenFloatOp_BIT_CONVERT(SDNode *N) {
503  return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
504                     GetSoftenedFloat(N->getOperand(0)));
505}
506
507SDOperand DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
508  SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
509  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
510  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
511
512  // If SoftenSetCCOperands returned a scalar, we need to compare the result
513  // against zero to select between true and false values.
514  if (NewRHS.Val == 0) {
515    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
516    CCCode = ISD::SETNE;
517  }
518
519  // Update N to have the operands specified.
520  return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
521                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
522                                N->getOperand(4));
523}
524
525SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_SINT(SDNode *N) {
526  MVT SVT = N->getOperand(0).getValueType();
527  MVT RVT = N->getValueType(0);
528
529  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
530  switch (RVT.getSimpleVT()) {
531  case MVT::i32:
532    switch (SVT.getSimpleVT()) {
533    case MVT::f32:
534      LC = RTLIB::FPTOSINT_F32_I32;
535      break;
536    case MVT::f64:
537      LC = RTLIB::FPTOSINT_F64_I32;
538      break;
539    case MVT::ppcf128:
540      LC = RTLIB::FPTOSINT_PPCF128_I32;
541      break;
542    default:
543      break;
544    }
545    break;
546  case MVT::i64:
547    switch (SVT.getSimpleVT()) {
548    case MVT::f32:
549      LC = RTLIB::FPTOSINT_F32_I64;
550      break;
551    case MVT::f64:
552      LC = RTLIB::FPTOSINT_F64_I64;
553      break;
554    case MVT::f80:
555      LC = RTLIB::FPTOSINT_F80_I64;
556      break;
557    case MVT::ppcf128:
558      LC = RTLIB::FPTOSINT_PPCF128_I64;
559      break;
560    default:
561      break;
562    }
563    break;
564  case MVT::i128:
565    switch (SVT.getSimpleVT()) {
566    case MVT::f32:
567      LC = RTLIB::FPTOSINT_F32_I128;
568      break;
569    case MVT::f64:
570      LC = RTLIB::FPTOSINT_F64_I128;
571      break;
572    case MVT::f80:
573      LC = RTLIB::FPTOSINT_F80_I128;
574      break;
575    case MVT::ppcf128:
576      LC = RTLIB::FPTOSINT_PPCF128_I128;
577      break;
578    default:
579      break;
580    }
581    break;
582  default:
583    break;
584  }
585  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_SINT!");
586
587  SDOperand Op = GetSoftenedFloat(N->getOperand(0));
588  return MakeLibCall(LC, RVT, &Op, 1, false);
589}
590
591SDOperand DAGTypeLegalizer::SoftenFloatOp_FP_TO_UINT(SDNode *N) {
592  MVT SVT = N->getOperand(0).getValueType();
593  MVT RVT = N->getValueType(0);
594
595  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
596  switch (RVT.getSimpleVT()) {
597  case MVT::i32:
598    switch (SVT.getSimpleVT()) {
599    case MVT::f32:
600      LC = RTLIB::FPTOUINT_F32_I32;
601      break;
602    case MVT::f64:
603      LC = RTLIB::FPTOUINT_F64_I32;
604      break;
605    case MVT::f80:
606      LC = RTLIB::FPTOUINT_F80_I32;
607      break;
608    case MVT::ppcf128:
609      LC = RTLIB::FPTOUINT_PPCF128_I32;
610      break;
611    default:
612      break;
613    }
614    break;
615  case MVT::i64:
616    switch (SVT.getSimpleVT()) {
617    case MVT::f32:
618      LC = RTLIB::FPTOUINT_F32_I64;
619      break;
620    case MVT::f64:
621      LC = RTLIB::FPTOUINT_F64_I64;
622      break;
623    case MVT::f80:
624      LC = RTLIB::FPTOUINT_F80_I64;
625      break;
626    case MVT::ppcf128:
627      LC = RTLIB::FPTOUINT_PPCF128_I64;
628      break;
629    default:
630      break;
631    }
632    break;
633  case MVT::i128:
634    switch (SVT.getSimpleVT()) {
635    case MVT::f32:
636      LC = RTLIB::FPTOUINT_F32_I128;
637      break;
638    case MVT::f64:
639      LC = RTLIB::FPTOUINT_F64_I128;
640      break;
641    case MVT::f80:
642      LC = RTLIB::FPTOUINT_F80_I128;
643      break;
644    case MVT::ppcf128:
645      LC = RTLIB::FPTOUINT_PPCF128_I128;
646      break;
647    default:
648      break;
649    }
650    break;
651  default:
652    break;
653  }
654  assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported FP_TO_UINT!");
655
656  SDOperand Op = GetSoftenedFloat(N->getOperand(0));
657  return MakeLibCall(LC, RVT, &Op, 1, false);
658}
659
660SDOperand DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
661  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
662  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
663  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
664
665  // If SoftenSetCCOperands returned a scalar, we need to compare the result
666  // against zero to select between true and false values.
667  if (NewRHS.Val == 0) {
668    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
669    CCCode = ISD::SETNE;
670  }
671
672  // Update N to have the operands specified.
673  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
674                                N->getOperand(2), N->getOperand(3),
675                                DAG.getCondCode(CCCode));
676}
677
678SDOperand DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
679  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
680  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
681  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
682
683  // If SoftenSetCCOperands returned a scalar, use it.
684  if (NewRHS.Val == 0) {
685    assert(NewLHS.getValueType() == N->getValueType(0) &&
686           "Unexpected setcc expansion!");
687    return NewLHS;
688  }
689
690  // Otherwise, update N to have the operands specified.
691  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
692                                DAG.getCondCode(CCCode));
693}
694
695SDOperand DAGTypeLegalizer::SoftenFloatOp_STORE(SDNode *N, unsigned OpNo) {
696  assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
697  assert(OpNo == 1 && "Can only soften the stored value!");
698  StoreSDNode *ST = cast<StoreSDNode>(N);
699  SDOperand Val = ST->getValue();
700
701  if (ST->isTruncatingStore())
702    // Do an FP_ROUND followed by a non-truncating store.
703    Val = BitConvertToInteger(DAG.getNode(ISD::FP_ROUND, ST->getMemoryVT(),
704                                          Val, DAG.getIntPtrConstant(0)));
705  else
706    Val = GetSoftenedFloat(Val);
707
708  return DAG.getStore(ST->getChain(), Val, ST->getBasePtr(),
709                      ST->getSrcValue(), ST->getSrcValueOffset(),
710                      ST->isVolatile(), ST->getAlignment());
711}
712
713
714//===----------------------------------------------------------------------===//
715//  Float Result Expansion
716//===----------------------------------------------------------------------===//
717
718/// ExpandFloatResult - This method is called when the specified result of the
719/// specified node is found to need expansion.  At this point, the node may also
720/// have invalid operands or may have other results that need promotion, we just
721/// know that (at least) one result needs expansion.
722void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
723  DEBUG(cerr << "Expand float result: "; N->dump(&DAG); cerr << "\n");
724  SDOperand Lo, Hi;
725  Lo = Hi = SDOperand();
726
727  // See if the target wants to custom expand this node.
728  if (TLI.getOperationAction(N->getOpcode(), N->getValueType(ResNo)) ==
729      TargetLowering::Custom) {
730    // If the target wants to, allow it to lower this itself.
731    if (SDNode *P = TLI.ReplaceNodeResults(N, DAG)) {
732      // Everything that once used N now uses P.  We are guaranteed that the
733      // result value types of N and the result value types of P match.
734      ReplaceNodeWith(N, P);
735      return;
736    }
737  }
738
739  switch (N->getOpcode()) {
740  default:
741#ifndef NDEBUG
742    cerr << "ExpandFloatResult #" << ResNo << ": ";
743    N->dump(&DAG); cerr << "\n";
744#endif
745    assert(0 && "Do not know how to expand the result of this operator!");
746    abort();
747
748  case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
749  case ISD::UNDEF:        SplitRes_UNDEF(N, Lo, Hi); break;
750  case ISD::SELECT:       SplitRes_SELECT(N, Lo, Hi); break;
751  case ISD::SELECT_CC:    SplitRes_SELECT_CC(N, Lo, Hi); break;
752
753  case ISD::BIT_CONVERT:        ExpandRes_BIT_CONVERT(N, Lo, Hi); break;
754  case ISD::BUILD_PAIR:         ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
755  case ISD::EXTRACT_ELEMENT:    ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
756  case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
757
758  case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
759  case ISD::FADD:       ExpandFloatRes_FADD(N, Lo, Hi); break;
760  case ISD::FDIV:       ExpandFloatRes_FDIV(N, Lo, Hi); break;
761  case ISD::FMUL:       ExpandFloatRes_FMUL(N, Lo, Hi); break;
762  case ISD::FSUB:       ExpandFloatRes_FSUB(N, Lo, Hi); break;
763  case ISD::LOAD:       ExpandFloatRes_LOAD(N, Lo, Hi); break;
764  case ISD::SINT_TO_FP:
765  case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
766  }
767
768  // If Lo/Hi is null, the sub-method took care of registering results etc.
769  if (Lo.Val)
770    SetExpandedFloat(SDOperand(N, ResNo), Lo, Hi);
771}
772
773void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDOperand &Lo,
774                                                 SDOperand &Hi) {
775  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
776  assert(NVT.getSizeInBits() == integerPartWidth &&
777         "Do not know how to expand this float constant!");
778  APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().convertToAPInt();
779  Lo = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
780                                       &C.getRawData()[1])), NVT);
781  Hi = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
782                                       &C.getRawData()[0])), NVT);
783}
784
785void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDOperand &Lo,
786                                           SDOperand &Hi) {
787  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
788  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
789                                            RTLIB::ADD_F32,
790                                            RTLIB::ADD_F64,
791                                            RTLIB::ADD_F80,
792                                            RTLIB::ADD_PPCF128),
793                               N->getValueType(0), Ops, 2,
794                               false);
795  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
796  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
797}
798
799void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDOperand &Lo,
800                                           SDOperand &Hi) {
801  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
802  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
803                                            RTLIB::DIV_F32,
804                                            RTLIB::DIV_F64,
805                                            RTLIB::DIV_F80,
806                                            RTLIB::DIV_PPCF128),
807                               N->getValueType(0), Ops, 2,
808                               false);
809  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
810  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
811}
812
813void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDOperand &Lo,
814                                           SDOperand &Hi) {
815  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
816  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
817                                            RTLIB::MUL_F32,
818                                            RTLIB::MUL_F64,
819                                            RTLIB::MUL_F80,
820                                            RTLIB::MUL_PPCF128),
821                               N->getValueType(0), Ops, 2,
822                               false);
823  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
824  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
825}
826
827void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDOperand &Lo,
828                                           SDOperand &Hi) {
829  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
830  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
831                                            RTLIB::SUB_F32,
832                                            RTLIB::SUB_F64,
833                                            RTLIB::SUB_F80,
834                                            RTLIB::SUB_PPCF128),
835                               N->getValueType(0), Ops, 2,
836                               false);
837  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
838  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
839}
840
841void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDOperand &Lo,
842                                           SDOperand &Hi) {
843  if (ISD::isNormalLoad(N)) {
844    ExpandRes_NormalLoad(N, Lo, Hi);
845    return;
846  }
847
848  assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
849  LoadSDNode *LD = cast<LoadSDNode>(N);
850  SDOperand Chain = LD->getChain();
851  SDOperand Ptr = LD->getBasePtr();
852
853  MVT NVT = TLI.getTypeToTransformTo(LD->getValueType(0));
854  assert(NVT.isByteSized() && "Expanded type not byte sized!");
855  assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
856
857  Lo = DAG.getExtLoad(LD->getExtensionType(), NVT, Chain, Ptr,
858                      LD->getSrcValue(), LD->getSrcValueOffset(),
859                      LD->getMemoryVT(),
860                      LD->isVolatile(), LD->getAlignment());
861
862  // Remember the chain.
863  Chain = Lo.getValue(1);
864
865  // The high part is undefined.
866  Hi = DAG.getNode(ISD::UNDEF, NVT);
867
868  // Modified the chain - switch anything that used the old chain to use the
869  // new one.
870  ReplaceValueWith(SDOperand(LD, 1), Chain);
871}
872
873void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDOperand &Lo,
874                                                 SDOperand &Hi) {
875  assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
876  MVT VT = N->getValueType(0);
877  MVT NVT = TLI.getTypeToTransformTo(VT);
878  SDOperand Src = N->getOperand(0);
879  MVT SrcVT = Src.getValueType();
880
881  // First do an SINT_TO_FP, whether the original was signed or unsigned.
882  if (SrcVT.bitsLE(MVT::i32)) {
883    // The integer can be represented exactly in an f64.
884    Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Src);
885    Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT);
886    Hi = DAG.getNode(ISD::SINT_TO_FP, NVT, Src);
887  } else {
888    RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
889    if (SrcVT.bitsLE(MVT::i64)) {
890      Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Src);
891      LC = RTLIB::SINTTOFP_I64_PPCF128;
892    } else if (SrcVT.bitsLE(MVT::i128)) {
893      Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i128, Src);
894      LC = RTLIB::SINTTOFP_I128_PPCF128;
895    }
896    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
897
898    Hi = MakeLibCall(LC, VT, &Src, 1, true);
899    assert(Hi.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
900    Lo = Hi.getOperand(0); Hi = Hi.getOperand(1);
901  }
902
903  if (N->getOpcode() == ISD::SINT_TO_FP)
904    return;
905
906  // Unsigned - fix up the SINT_TO_FP value just calculated.
907  Hi = DAG.getNode(ISD::BUILD_PAIR, VT, Lo, Hi);
908  SrcVT = Src.getValueType();
909
910  // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
911  static const uint64_t TwoE32[]  = { 0x41f0000000000000LL, 0 };
912  static const uint64_t TwoE64[]  = { 0x43f0000000000000LL, 0 };
913  static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
914  const uint64_t *Parts = 0;
915
916  switch (SrcVT.getSimpleVT()) {
917  default:
918    assert(false && "Unsupported UINT_TO_FP!");
919  case MVT::i32:
920    Parts = TwoE32;
921  case MVT::i64:
922    Parts = TwoE64;
923  case MVT::i128:
924    Parts = TwoE128;
925  }
926
927  Lo = DAG.getNode(ISD::FADD, VT, Hi,
928                   DAG.getConstantFP(APFloat(APInt(128, 2, Parts)),
929                                     MVT::ppcf128));
930  Lo = DAG.getNode(ISD::SELECT_CC, VT, Src, DAG.getConstant(0, SrcVT), Lo, Hi,
931                   DAG.getCondCode(ISD::SETLT));
932  Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
933                   DAG.getConstant(1, TLI.getPointerTy()));
934  Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
935                   DAG.getConstant(0, TLI.getPointerTy()));
936}
937
938
939//===----------------------------------------------------------------------===//
940//  Float Operand Expansion
941//===----------------------------------------------------------------------===//
942
943/// ExpandFloatOperand - This method is called when the specified operand of the
944/// specified node is found to need expansion.  At this point, all of the result
945/// types of the node are known to be legal, but other operands of the node may
946/// need promotion or expansion as well as the specified one.
947bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
948  DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
949  SDOperand Res = SDOperand();
950
951  if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
952      == TargetLowering::Custom)
953    Res = TLI.LowerOperation(SDOperand(N, OpNo), DAG);
954
955  if (Res.Val == 0) {
956    switch (N->getOpcode()) {
957    default:
958  #ifndef NDEBUG
959      cerr << "ExpandFloatOperand Op #" << OpNo << ": ";
960      N->dump(&DAG); cerr << "\n";
961  #endif
962      assert(0 && "Do not know how to expand this operator's operand!");
963      abort();
964
965    case ISD::BIT_CONVERT:     Res = ExpandOp_BIT_CONVERT(N); break;
966    case ISD::BUILD_VECTOR:    Res = ExpandOp_BUILD_VECTOR(N); break;
967    case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
968
969    case ISD::BR_CC:     Res = ExpandFloatOp_BR_CC(N); break;
970    case ISD::SELECT_CC: Res = ExpandFloatOp_SELECT_CC(N); break;
971    case ISD::SETCC:     Res = ExpandFloatOp_SETCC(N); break;
972
973    case ISD::FP_ROUND:   Res = ExpandFloatOp_FP_ROUND(N); break;
974    case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
975    case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
976
977    case ISD::STORE:
978      Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N), OpNo);
979      break;
980    }
981  }
982
983  // If the result is null, the sub-method took care of registering results etc.
984  if (!Res.Val) return false;
985  // If the result is N, the sub-method updated N in place.  Check to see if any
986  // operands are new, and if so, mark them.
987  if (Res.Val == N) {
988    // Mark N as new and remark N and its operands.  This allows us to correctly
989    // revisit N if it needs another step of expansion and allows us to visit
990    // any new operands to N.
991    ReanalyzeNode(N);
992    return true;
993  }
994
995  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
996         "Invalid operand expansion");
997
998  ReplaceValueWith(SDOperand(N, 0), Res);
999  return false;
1000}
1001
1002/// FloatExpandSetCCOperands - Expand the operands of a comparison.  This code
1003/// is shared among BR_CC, SELECT_CC, and SETCC handlers.
1004void DAGTypeLegalizer::FloatExpandSetCCOperands(SDOperand &NewLHS,
1005                                                SDOperand &NewRHS,
1006                                                ISD::CondCode &CCCode) {
1007  SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
1008  GetExpandedFloat(NewLHS, LHSLo, LHSHi);
1009  GetExpandedFloat(NewRHS, RHSLo, RHSHi);
1010
1011  MVT VT = NewLHS.getValueType();
1012  assert(VT == MVT::ppcf128 && "Unsupported setcc type!");
1013
1014  // FIXME:  This generated code sucks.  We want to generate
1015  //         FCMP crN, hi1, hi2
1016  //         BNE crN, L:
1017  //         FCMP crN, lo1, lo2
1018  // The following can be improved, but not that much.
1019  SDOperand Tmp1, Tmp2, Tmp3;
1020  Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ);
1021  Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, CCCode);
1022  Tmp3 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1023  Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETNE);
1024  Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode);
1025  Tmp1 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
1026  NewLHS = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp3);
1027  NewRHS = SDOperand();   // LHS is the result, not a compare.
1028}
1029
1030SDOperand DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
1031  SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
1032  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
1033  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1034
1035  // If ExpandSetCCOperands returned a scalar, we need to compare the result
1036  // against zero to select between true and false values.
1037  if (NewRHS.Val == 0) {
1038    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
1039    CCCode = ISD::SETNE;
1040  }
1041
1042  // Update N to have the operands specified.
1043  return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
1044                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
1045                                N->getOperand(4));
1046}
1047
1048SDOperand DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
1049  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1050  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
1051  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1052
1053  // If ExpandSetCCOperands returned a scalar, we need to compare the result
1054  // against zero to select between true and false values.
1055  if (NewRHS.Val == 0) {
1056    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
1057    CCCode = ISD::SETNE;
1058  }
1059
1060  // Update N to have the operands specified.
1061  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
1062                                N->getOperand(2), N->getOperand(3),
1063                                DAG.getCondCode(CCCode));
1064}
1065
1066SDOperand DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
1067  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
1068  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
1069  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
1070
1071  // If ExpandSetCCOperands returned a scalar, use it.
1072  if (NewRHS.Val == 0) {
1073    assert(NewLHS.getValueType() == N->getValueType(0) &&
1074           "Unexpected setcc expansion!");
1075    return NewLHS;
1076  }
1077
1078  // Otherwise, update N to have the operands specified.
1079  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
1080                                DAG.getCondCode(CCCode));
1081}
1082
1083SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
1084  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1085         "Unsupported FP_TO_UINT!");
1086
1087  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1088  switch (N->getValueType(0).getSimpleVT()) {
1089  default:
1090    assert(false && "Unsupported FP_TO_UINT!");
1091  case MVT::i32:
1092    LC = RTLIB::FPTOUINT_PPCF128_I32;
1093    break;
1094  case MVT::i64:
1095    LC = RTLIB::FPTOUINT_PPCF128_I64;
1096    break;
1097  case MVT::i128:
1098    LC = RTLIB::FPTOUINT_PPCF128_I128;
1099    break;
1100  }
1101
1102  return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
1103}
1104
1105SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
1106  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1107         "Unsupported FP_TO_SINT!");
1108
1109  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
1110  switch (N->getValueType(0).getSimpleVT()) {
1111  default:
1112    assert(false && "Unsupported FP_TO_SINT!");
1113  case MVT::i32:
1114    LC = RTLIB::FPTOSINT_PPCF128_I32;
1115  case MVT::i64:
1116    LC = RTLIB::FPTOSINT_PPCF128_I64;
1117    break;
1118  case MVT::i128:
1119    LC = RTLIB::FPTOSINT_PPCF128_I64;
1120    break;
1121  }
1122
1123  return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
1124}
1125
1126SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
1127  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
1128         "Logic only correct for ppcf128!");
1129  SDOperand Lo, Hi;
1130  GetExpandedFloat(N->getOperand(0), Lo, Hi);
1131  // Round it the rest of the way (e.g. to f32) if needed.
1132  return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Hi, N->getOperand(1));
1133}
1134
1135SDOperand DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
1136  if (ISD::isNormalStore(N))
1137    return ExpandOp_NormalStore(N, OpNo);
1138
1139  assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
1140  assert(OpNo == 1 && "Can only expand the stored value so far");
1141  StoreSDNode *ST = cast<StoreSDNode>(N);
1142
1143  SDOperand Chain = ST->getChain();
1144  SDOperand Ptr = ST->getBasePtr();
1145
1146  MVT NVT = TLI.getTypeToTransformTo(ST->getValue().getValueType());
1147  assert(NVT.isByteSized() && "Expanded type not byte sized!");
1148  assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
1149
1150  SDOperand Lo, Hi;
1151  GetExpandedOp(ST->getValue(), Lo, Hi);
1152
1153  return DAG.getTruncStore(Chain, Lo, Ptr,
1154                           ST->getSrcValue(), ST->getSrcValueOffset(),
1155                           ST->getMemoryVT(),
1156                           ST->isVolatile(), ST->getAlignment());
1157}
1158