LegalizeFloatTypes.cpp revision ee4dc16d75e0d06ab434745c116137c4c6332ffc 
1//===-------- LegalizeFloatTypes.cpp - Legalization of float types --------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file implements float type expansion and softening for LegalizeTypes.
11// Softening is the act of turning a computation in an illegal floating point
12// type into a computation in an integer type of the same size; also known as
13// "soft float".  For example, turning f32 arithmetic into operations using i32.
14// The resulting integer value is the same as what you would get by performing
15// the floating point operation and bitcasting the result to the integer type.
16// Expansion is the act of changing a computation in an illegal type to be a
17// computation in two identical registers of a smaller type.  For example,
18// implementing ppcf128 arithmetic in two f64 registers.
19//
20//===----------------------------------------------------------------------===//
21
22#include "LegalizeTypes.h"
23#include "llvm/CodeGen/PseudoSourceValue.h"
24#include "llvm/Constants.h"
25#include "llvm/DerivedTypes.h"
26using namespace llvm;
27
28/// GetFPLibCall - Return the right libcall for the given floating point type.
29static RTLIB::Libcall GetFPLibCall(MVT VT,
30                                   RTLIB::Libcall Call_F32,
31                                   RTLIB::Libcall Call_F64,
32                                   RTLIB::Libcall Call_F80,
33                                   RTLIB::Libcall Call_PPCF128) {
34  return
35    VT == MVT::f32 ? Call_F32 :
36    VT == MVT::f64 ? Call_F64 :
37    VT == MVT::f80 ? Call_F80 :
38    VT == MVT::ppcf128 ? Call_PPCF128 :
39    RTLIB::UNKNOWN_LIBCALL;
40}
41
42//===----------------------------------------------------------------------===//
43//  Result Float to Integer Conversion.
44//===----------------------------------------------------------------------===//
45
46void DAGTypeLegalizer::SoftenFloatResult(SDNode *N, unsigned ResNo) {
47  DEBUG(cerr << "Soften float result " << ResNo << ": "; N->dump(&DAG);
48        cerr << "\n");
49  SDOperand R = SDOperand();
50
51  // FIXME: Custom lowering for float-to-int?
52#if 0
53  // See if the target wants to custom convert this node to an integer.
54  if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
55      TargetLowering::Custom) {
56    // If the target wants to, allow it to lower this itself.
57    if (SDNode *P = TLI.FloatToIntOperationResult(N, DAG)) {
58      // Everything that once used N now uses P.  We are guaranteed that the
59      // result value types of N and the result value types of P match.
60      ReplaceNodeWith(N, P);
61      return;
62    }
63  }
64#endif
65
66  switch (N->getOpcode()) {
67  default:
68#ifndef NDEBUG
69    cerr << "SoftenFloatResult #" << ResNo << ": ";
70    N->dump(&DAG); cerr << "\n";
71#endif
72    assert(0 && "Do not know how to convert the result of this operator!");
73    abort();
74
75    case ISD::BIT_CONVERT: R = SoftenFloatRes_BIT_CONVERT(N); break;
76    case ISD::BUILD_PAIR:  R = SoftenFloatRes_BUILD_PAIR(N); break;
77    case ISD::ConstantFP:
78      R = SoftenFloatRes_ConstantFP(cast<ConstantFPSDNode>(N));
79      break;
80    case ISD::FCOPYSIGN:   R = SoftenFloatRes_FCOPYSIGN(N); break;
81    case ISD::LOAD:        R = SoftenFloatRes_LOAD(N); break;
82    case ISD::SINT_TO_FP:
83    case ISD::UINT_TO_FP:  R = SoftenFloatRes_XINT_TO_FP(N); break;
84
85    case ISD::FADD: R = SoftenFloatRes_FADD(N); break;
86    case ISD::FMUL: R = SoftenFloatRes_FMUL(N); break;
87    case ISD::FSUB: R = SoftenFloatRes_FSUB(N); break;
88  }
89
90  // If R is null, the sub-method took care of registering the result.
91  if (R.Val)
92    SetSoftenedFloat(SDOperand(N, ResNo), R);
93}
94
95SDOperand DAGTypeLegalizer::SoftenFloatRes_BIT_CONVERT(SDNode *N) {
96  return BitConvertToInteger(N->getOperand(0));
97}
98
99SDOperand DAGTypeLegalizer::SoftenFloatRes_BUILD_PAIR(SDNode *N) {
100  // Convert the inputs to integers, and build a new pair out of them.
101  return DAG.getNode(ISD::BUILD_PAIR,
102                     TLI.getTypeToTransformTo(N->getValueType(0)),
103                     BitConvertToInteger(N->getOperand(0)),
104                     BitConvertToInteger(N->getOperand(1)));
105}
106
107SDOperand DAGTypeLegalizer::SoftenFloatRes_ConstantFP(ConstantFPSDNode *N) {
108  return DAG.getConstant(N->getValueAPF().convertToAPInt(),
109                         TLI.getTypeToTransformTo(N->getValueType(0)));
110}
111
112SDOperand DAGTypeLegalizer::SoftenFloatRes_FADD(SDNode *N) {
113  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
114  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
115                       GetSoftenedFloat(N->getOperand(1)) };
116  return MakeLibCall(GetFPLibCall(N->getValueType(0),
117                                  RTLIB::ADD_F32,
118                                  RTLIB::ADD_F64,
119                                  RTLIB::ADD_F80,
120                                  RTLIB::ADD_PPCF128),
121                     NVT, Ops, 2, false);
122}
123
124SDOperand DAGTypeLegalizer::SoftenFloatRes_FCOPYSIGN(SDNode *N) {
125  SDOperand LHS = GetSoftenedFloat(N->getOperand(0));
126  SDOperand RHS = BitConvertToInteger(N->getOperand(1));
127
128  MVT LVT = LHS.getValueType();
129  MVT RVT = RHS.getValueType();
130
131  unsigned LSize = LVT.getSizeInBits();
132  unsigned RSize = RVT.getSizeInBits();
133
134  // First get the sign bit of second operand.
135  SDOperand SignBit = DAG.getNode(ISD::SHL, RVT, DAG.getConstant(1, RVT),
136                                  DAG.getConstant(RSize - 1,
137                                                  TLI.getShiftAmountTy()));
138  SignBit = DAG.getNode(ISD::AND, RVT, RHS, SignBit);
139
140  // Shift right or sign-extend it if the two operands have different types.
141  int SizeDiff = RVT.getSizeInBits() - LVT.getSizeInBits();
142  if (SizeDiff > 0) {
143    SignBit = DAG.getNode(ISD::SRL, RVT, SignBit,
144                          DAG.getConstant(SizeDiff, TLI.getShiftAmountTy()));
145    SignBit = DAG.getNode(ISD::TRUNCATE, LVT, SignBit);
146  } else if (SizeDiff < 0) {
147    SignBit = DAG.getNode(ISD::ANY_EXTEND, LVT, SignBit);
148    SignBit = DAG.getNode(ISD::SHL, LVT, SignBit,
149                          DAG.getConstant(-SizeDiff, TLI.getShiftAmountTy()));
150  }
151
152  // Clear the sign bit of the first operand.
153  SDOperand Mask = DAG.getNode(ISD::SHL, LVT, DAG.getConstant(1, LVT),
154                               DAG.getConstant(LSize - 1,
155                                               TLI.getShiftAmountTy()));
156  Mask = DAG.getNode(ISD::SUB, LVT, Mask, DAG.getConstant(1, LVT));
157  LHS = DAG.getNode(ISD::AND, LVT, LHS, Mask);
158
159  // Or the value with the sign bit.
160  return DAG.getNode(ISD::OR, LVT, LHS, SignBit);
161}
162
163SDOperand DAGTypeLegalizer::SoftenFloatRes_FMUL(SDNode *N) {
164  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
165  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
166                       GetSoftenedFloat(N->getOperand(1)) };
167  return MakeLibCall(GetFPLibCall(N->getValueType(0),
168                                  RTLIB::MUL_F32,
169                                  RTLIB::MUL_F64,
170                                  RTLIB::MUL_F80,
171                                  RTLIB::MUL_PPCF128),
172                     NVT, Ops, 2, false);
173}
174
175SDOperand DAGTypeLegalizer::SoftenFloatRes_FSUB(SDNode *N) {
176  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
177  SDOperand Ops[2] = { GetSoftenedFloat(N->getOperand(0)),
178                       GetSoftenedFloat(N->getOperand(1)) };
179  return MakeLibCall(GetFPLibCall(N->getValueType(0),
180                                  RTLIB::SUB_F32,
181                                  RTLIB::SUB_F64,
182                                  RTLIB::SUB_F80,
183                                  RTLIB::SUB_PPCF128),
184                     NVT, Ops, 2, false);
185}
186
187SDOperand DAGTypeLegalizer::SoftenFloatRes_LOAD(SDNode *N) {
188  LoadSDNode *L = cast<LoadSDNode>(N);
189  MVT VT = N->getValueType(0);
190  MVT NVT = TLI.getTypeToTransformTo(VT);
191
192  if (L->getExtensionType() == ISD::NON_EXTLOAD)
193     return DAG.getLoad(L->getAddressingMode(), L->getExtensionType(),
194                        NVT, L->getChain(), L->getBasePtr(), L->getOffset(),
195                        L->getSrcValue(), L->getSrcValueOffset(), NVT,
196                        L->isVolatile(), L->getAlignment());
197
198  // Do a non-extending load followed by FP_EXTEND.
199  SDOperand NL = DAG.getLoad(L->getAddressingMode(), ISD::NON_EXTLOAD,
200                             L->getMemoryVT(), L->getChain(),
201                             L->getBasePtr(), L->getOffset(),
202                             L->getSrcValue(), L->getSrcValueOffset(),
203                             L->getMemoryVT(),
204                             L->isVolatile(), L->getAlignment());
205  return BitConvertToInteger(DAG.getNode(ISD::FP_EXTEND, VT, NL));
206}
207
208SDOperand DAGTypeLegalizer::SoftenFloatRes_XINT_TO_FP(SDNode *N) {
209  bool isSigned = N->getOpcode() == ISD::SINT_TO_FP;
210  MVT DestVT = N->getValueType(0);
211  SDOperand Op = N->getOperand(0);
212
213  if (Op.getValueType() == MVT::i32) {
214    // simple 32-bit [signed|unsigned] integer to float/double expansion
215
216    // Get the stack frame index of a 8 byte buffer.
217    SDOperand StackSlot = DAG.CreateStackTemporary(MVT::f64);
218
219    // word offset constant for Hi/Lo address computation
220    SDOperand Offset =
221      DAG.getConstant(MVT(MVT::i32).getSizeInBits() / 8,
222                      TLI.getPointerTy());
223    // set up Hi and Lo (into buffer) address based on endian
224    SDOperand Hi = StackSlot;
225    SDOperand Lo = DAG.getNode(ISD::ADD, TLI.getPointerTy(), StackSlot, Offset);
226    if (TLI.isLittleEndian())
227      std::swap(Hi, Lo);
228
229    // if signed map to unsigned space
230    SDOperand OpMapped;
231    if (isSigned) {
232      // constant used to invert sign bit (signed to unsigned mapping)
233      SDOperand SignBit = DAG.getConstant(0x80000000u, MVT::i32);
234      OpMapped = DAG.getNode(ISD::XOR, MVT::i32, Op, SignBit);
235    } else {
236      OpMapped = Op;
237    }
238    // store the lo of the constructed double - based on integer input
239    SDOperand Store1 = DAG.getStore(DAG.getEntryNode(),
240                                    OpMapped, Lo, NULL, 0);
241    // initial hi portion of constructed double
242    SDOperand InitialHi = DAG.getConstant(0x43300000u, MVT::i32);
243    // store the hi of the constructed double - biased exponent
244    SDOperand Store2=DAG.getStore(Store1, InitialHi, Hi, NULL, 0);
245    // load the constructed double
246    SDOperand Load = DAG.getLoad(MVT::f64, Store2, StackSlot, NULL, 0);
247    // FP constant to bias correct the final result
248    SDOperand Bias = DAG.getConstantFP(isSigned ?
249                                            BitsToDouble(0x4330000080000000ULL)
250                                          : BitsToDouble(0x4330000000000000ULL),
251                                     MVT::f64);
252    // subtract the bias
253    SDOperand Sub = DAG.getNode(ISD::FSUB, MVT::f64, Load, Bias);
254    // final result
255    SDOperand Result;
256    // handle final rounding
257    if (DestVT == MVT::f64) {
258      // do nothing
259      Result = Sub;
260    } else if (DestVT.bitsLT(MVT::f64)) {
261      Result = DAG.getNode(ISD::FP_ROUND, DestVT, Sub,
262                           DAG.getIntPtrConstant(0));
263    } else if (DestVT.bitsGT(MVT::f64)) {
264      Result = DAG.getNode(ISD::FP_EXTEND, DestVT, Sub);
265    }
266    return BitConvertToInteger(Result);
267  }
268  assert(!isSigned && "Legalize cannot Expand SINT_TO_FP for i64 yet");
269  SDOperand Tmp1 = DAG.getNode(ISD::SINT_TO_FP, DestVT, Op);
270
271  SDOperand SignSet = DAG.getSetCC(TLI.getSetCCResultType(Op), Op,
272                                   DAG.getConstant(0, Op.getValueType()),
273                                   ISD::SETLT);
274  SDOperand Zero = DAG.getIntPtrConstant(0), Four = DAG.getIntPtrConstant(4);
275  SDOperand CstOffset = DAG.getNode(ISD::SELECT, Zero.getValueType(),
276                                    SignSet, Four, Zero);
277
278  // If the sign bit of the integer is set, the large number will be treated
279  // as a negative number.  To counteract this, the dynamic code adds an
280  // offset depending on the data type.
281  uint64_t FF;
282  switch (Op.getValueType().getSimpleVT()) {
283  default: assert(0 && "Unsupported integer type!");
284  case MVT::i8 : FF = 0x43800000ULL; break;  // 2^8  (as a float)
285  case MVT::i16: FF = 0x47800000ULL; break;  // 2^16 (as a float)
286  case MVT::i32: FF = 0x4F800000ULL; break;  // 2^32 (as a float)
287  case MVT::i64: FF = 0x5F800000ULL; break;  // 2^64 (as a float)
288  }
289  if (TLI.isLittleEndian()) FF <<= 32;
290  static Constant *FudgeFactor = ConstantInt::get(Type::Int64Ty, FF);
291
292  SDOperand CPIdx = DAG.getConstantPool(FudgeFactor, TLI.getPointerTy());
293  CPIdx = DAG.getNode(ISD::ADD, TLI.getPointerTy(), CPIdx, CstOffset);
294  SDOperand FudgeInReg;
295  if (DestVT == MVT::f32)
296    FudgeInReg = DAG.getLoad(MVT::f32, DAG.getEntryNode(), CPIdx,
297                             PseudoSourceValue::getConstantPool(), 0);
298  else {
299    FudgeInReg = DAG.getExtLoad(ISD::EXTLOAD, DestVT,
300                                DAG.getEntryNode(), CPIdx,
301                                PseudoSourceValue::getConstantPool(), 0,
302                                MVT::f32);
303  }
304
305  return BitConvertToInteger(DAG.getNode(ISD::FADD, DestVT, Tmp1, FudgeInReg));
306}
307
308
309//===----------------------------------------------------------------------===//
310//  Operand Float to Integer Conversion..
311//===----------------------------------------------------------------------===//
312
313bool DAGTypeLegalizer::SoftenFloatOperand(SDNode *N, unsigned OpNo) {
314  DEBUG(cerr << "Soften float operand " << OpNo << ": "; N->dump(&DAG);
315        cerr << "\n");
316  SDOperand Res(0, 0);
317
318  // FIXME: Custom lowering for float-to-int?
319#if 0
320  if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
321      == TargetLowering::Custom)
322    Res = TLI.LowerOperation(SDOperand(N, 0), DAG);
323#endif
324
325  if (Res.Val == 0) {
326    switch (N->getOpcode()) {
327    default:
328#ifndef NDEBUG
329      cerr << "SoftenFloatOperand Op #" << OpNo << ": ";
330      N->dump(&DAG); cerr << "\n";
331#endif
332      assert(0 && "Do not know how to convert this operator's operand!");
333      abort();
334
335    case ISD::BIT_CONVERT: Res = SoftenFloatOp_BIT_CONVERT(N); break;
336
337    case ISD::BR_CC:     Res = SoftenFloatOp_BR_CC(N); break;
338    case ISD::SELECT_CC: Res = SoftenFloatOp_BR_CC(N); break;
339    case ISD::SETCC:     Res = SoftenFloatOp_BR_CC(N); break;
340    }
341  }
342
343  // If the result is null, the sub-method took care of registering results etc.
344  if (!Res.Val) return false;
345
346  // If the result is N, the sub-method updated N in place.  Check to see if any
347  // operands are new, and if so, mark them.
348  if (Res.Val == N) {
349    // Mark N as new and remark N and its operands.  This allows us to correctly
350    // revisit N if it needs another step of promotion and allows us to visit
351    // any new operands to N.
352    ReanalyzeNode(N);
353    return true;
354  }
355
356  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
357         "Invalid operand expansion");
358
359  ReplaceValueWith(SDOperand(N, 0), Res);
360  return false;
361}
362
363/// SoftenSetCCOperands - Soften the operands of a comparison.  This code is
364/// shared among BR_CC, SELECT_CC, and SETCC handlers.
365void DAGTypeLegalizer::SoftenSetCCOperands(SDOperand &NewLHS, SDOperand &NewRHS,
366                                           ISD::CondCode &CCCode) {
367  SDOperand LHSInt = GetSoftenedFloat(NewLHS);
368  SDOperand RHSInt = GetSoftenedFloat(NewRHS);
369  MVT VT  = NewLHS.getValueType();
370  MVT NVT = LHSInt.getValueType();
371
372  assert((VT == MVT::f32 || VT == MVT::f64) && "Unsupported setcc type!");
373
374  // Expand into one or more soft-fp libcall(s).
375  RTLIB::Libcall LC1 = RTLIB::UNKNOWN_LIBCALL, LC2 = RTLIB::UNKNOWN_LIBCALL;
376  switch (CCCode) {
377  case ISD::SETEQ:
378  case ISD::SETOEQ:
379    LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
380    break;
381  case ISD::SETNE:
382  case ISD::SETUNE:
383    LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 : RTLIB::UNE_F64;
384    break;
385  case ISD::SETGE:
386  case ISD::SETOGE:
387    LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
388    break;
389  case ISD::SETLT:
390  case ISD::SETOLT:
391    LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
392    break;
393  case ISD::SETLE:
394  case ISD::SETOLE:
395    LC1 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
396    break;
397  case ISD::SETGT:
398  case ISD::SETOGT:
399    LC1 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
400    break;
401  case ISD::SETUO:
402    LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
403    break;
404  case ISD::SETO:
405    break;
406  default:
407    LC1 = (VT == MVT::f32) ? RTLIB::UO_F32 : RTLIB::UO_F64;
408    switch (CCCode) {
409    case ISD::SETONE:
410      // SETONE = SETOLT | SETOGT
411      LC1 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
412      // Fallthrough
413    case ISD::SETUGT:
414      LC2 = (VT == MVT::f32) ? RTLIB::OGT_F32 : RTLIB::OGT_F64;
415      break;
416    case ISD::SETUGE:
417      LC2 = (VT == MVT::f32) ? RTLIB::OGE_F32 : RTLIB::OGE_F64;
418      break;
419    case ISD::SETULT:
420      LC2 = (VT == MVT::f32) ? RTLIB::OLT_F32 : RTLIB::OLT_F64;
421      break;
422    case ISD::SETULE:
423      LC2 = (VT == MVT::f32) ? RTLIB::OLE_F32 : RTLIB::OLE_F64;
424      break;
425    case ISD::SETUEQ:
426      LC2 = (VT == MVT::f32) ? RTLIB::OEQ_F32 : RTLIB::OEQ_F64;
427      break;
428    default: assert(false && "Do not know how to soften this setcc!");
429    }
430  }
431
432  SDOperand Ops[2] = { LHSInt, RHSInt };
433  NewLHS = MakeLibCall(LC1, NVT, Ops, 2, false/*sign irrelevant*/);
434  NewRHS = DAG.getConstant(0, NVT);
435  if (LC2 != RTLIB::UNKNOWN_LIBCALL) {
436    SDOperand Tmp = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS),
437                                NewLHS, NewRHS,
438                                DAG.getCondCode(TLI.getCmpLibcallCC(LC1)));
439    NewLHS = MakeLibCall(LC2, NVT, Ops, 2, false/*sign irrelevant*/);
440    NewLHS = DAG.getNode(ISD::SETCC, TLI.getSetCCResultType(NewLHS), NewLHS,
441                         NewRHS, DAG.getCondCode(TLI.getCmpLibcallCC(LC2)));
442    NewLHS = DAG.getNode(ISD::OR, Tmp.getValueType(), Tmp, NewLHS);
443    NewRHS = SDOperand();
444  }
445}
446
447SDOperand DAGTypeLegalizer::SoftenFloatOp_BIT_CONVERT(SDNode *N) {
448  return DAG.getNode(ISD::BIT_CONVERT, N->getValueType(0),
449                     GetSoftenedFloat(N->getOperand(0)));
450}
451
452SDOperand DAGTypeLegalizer::SoftenFloatOp_BR_CC(SDNode *N) {
453  SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
454  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
455  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
456
457  // If SoftenSetCCOperands returned a scalar, we need to compare the result
458  // against zero to select between true and false values.
459  if (NewRHS.Val == 0) {
460    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
461    CCCode = ISD::SETNE;
462  }
463
464  // Update N to have the operands specified.
465  return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
466                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
467                                N->getOperand(4));
468}
469
470SDOperand DAGTypeLegalizer::SoftenFloatOp_SELECT_CC(SDNode *N) {
471  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
472  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
473  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
474
475  // If SoftenSetCCOperands returned a scalar, we need to compare the result
476  // against zero to select between true and false values.
477  if (NewRHS.Val == 0) {
478    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
479    CCCode = ISD::SETNE;
480  }
481
482  // Update N to have the operands specified.
483  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
484                                N->getOperand(2), N->getOperand(3),
485                                DAG.getCondCode(CCCode));
486}
487
488SDOperand DAGTypeLegalizer::SoftenFloatOp_SETCC(SDNode *N) {
489  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
490  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
491  SoftenSetCCOperands(NewLHS, NewRHS, CCCode);
492
493  // If SoftenSetCCOperands returned a scalar, use it.
494  if (NewRHS.Val == 0) {
495    assert(NewLHS.getValueType() == N->getValueType(0) &&
496           "Unexpected setcc expansion!");
497    return NewLHS;
498  }
499
500  // Otherwise, update N to have the operands specified.
501  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
502                                DAG.getCondCode(CCCode));
503}
504
505
506//===----------------------------------------------------------------------===//
507//  Float Result Expansion
508//===----------------------------------------------------------------------===//
509
510/// ExpandFloatResult - This method is called when the specified result of the
511/// specified node is found to need expansion.  At this point, the node may also
512/// have invalid operands or may have other results that need promotion, we just
513/// know that (at least) one result needs expansion.
514void DAGTypeLegalizer::ExpandFloatResult(SDNode *N, unsigned ResNo) {
515  DEBUG(cerr << "Expand float result: "; N->dump(&DAG); cerr << "\n");
516  SDOperand Lo, Hi;
517  Lo = Hi = SDOperand();
518
519  // See if the target wants to custom expand this node.
520  if (TLI.getOperationAction(N->getOpcode(), N->getValueType(0)) ==
521          TargetLowering::Custom) {
522    // If the target wants to, allow it to lower this itself.
523    if (SDNode *P = TLI.ExpandOperationResult(N, DAG)) {
524      // Everything that once used N now uses P.  We are guaranteed that the
525      // result value types of N and the result value types of P match.
526      ReplaceNodeWith(N, P);
527      return;
528    }
529  }
530
531  switch (N->getOpcode()) {
532  default:
533#ifndef NDEBUG
534    cerr << "ExpandFloatResult #" << ResNo << ": ";
535    N->dump(&DAG); cerr << "\n";
536#endif
537    assert(0 && "Do not know how to expand the result of this operator!");
538    abort();
539
540  case ISD::MERGE_VALUES: SplitRes_MERGE_VALUES(N, Lo, Hi); break;
541  case ISD::UNDEF:        SplitRes_UNDEF(N, Lo, Hi); break;
542  case ISD::SELECT:       SplitRes_SELECT(N, Lo, Hi); break;
543  case ISD::SELECT_CC:    SplitRes_SELECT_CC(N, Lo, Hi); break;
544
545  case ISD::BIT_CONVERT:        ExpandRes_BIT_CONVERT(N, Lo, Hi); break;
546  case ISD::BUILD_PAIR:         ExpandRes_BUILD_PAIR(N, Lo, Hi); break;
547  case ISD::EXTRACT_ELEMENT:    ExpandRes_EXTRACT_ELEMENT(N, Lo, Hi); break;
548  case ISD::EXTRACT_VECTOR_ELT: ExpandRes_EXTRACT_VECTOR_ELT(N, Lo, Hi); break;
549
550  case ISD::ConstantFP: ExpandFloatRes_ConstantFP(N, Lo, Hi); break;
551  case ISD::FADD:       ExpandFloatRes_FADD(N, Lo, Hi); break;
552  case ISD::FDIV:       ExpandFloatRes_FDIV(N, Lo, Hi); break;
553  case ISD::FMUL:       ExpandFloatRes_FMUL(N, Lo, Hi); break;
554  case ISD::FSUB:       ExpandFloatRes_FSUB(N, Lo, Hi); break;
555  case ISD::LOAD:       ExpandFloatRes_LOAD(N, Lo, Hi); break;
556  case ISD::SINT_TO_FP:
557  case ISD::UINT_TO_FP: ExpandFloatRes_XINT_TO_FP(N, Lo, Hi); break;
558  }
559
560  // If Lo/Hi is null, the sub-method took care of registering results etc.
561  if (Lo.Val)
562    SetExpandedFloat(SDOperand(N, ResNo), Lo, Hi);
563}
564
565void DAGTypeLegalizer::ExpandFloatRes_ConstantFP(SDNode *N, SDOperand &Lo,
566                                                 SDOperand &Hi) {
567  MVT NVT = TLI.getTypeToTransformTo(N->getValueType(0));
568  assert(NVT.getSizeInBits() == integerPartWidth &&
569         "Do not know how to expand this float constant!");
570  APInt C = cast<ConstantFPSDNode>(N)->getValueAPF().convertToAPInt();
571  Lo = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
572                                       &C.getRawData()[1])), NVT);
573  Hi = DAG.getConstantFP(APFloat(APInt(integerPartWidth, 1,
574                                       &C.getRawData()[0])), NVT);
575}
576
577void DAGTypeLegalizer::ExpandFloatRes_FADD(SDNode *N, SDOperand &Lo,
578                                           SDOperand &Hi) {
579  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
580  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
581                                            RTLIB::ADD_F32,
582                                            RTLIB::ADD_F64,
583                                            RTLIB::ADD_F80,
584                                            RTLIB::ADD_PPCF128),
585                               N->getValueType(0), Ops, 2,
586                               false);
587  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
588  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
589}
590
591void DAGTypeLegalizer::ExpandFloatRes_FDIV(SDNode *N, SDOperand &Lo,
592                                           SDOperand &Hi) {
593  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
594  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
595                                            RTLIB::DIV_F32,
596                                            RTLIB::DIV_F64,
597                                            RTLIB::DIV_F80,
598                                            RTLIB::DIV_PPCF128),
599                               N->getValueType(0), Ops, 2,
600                               false);
601  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
602  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
603}
604
605void DAGTypeLegalizer::ExpandFloatRes_FMUL(SDNode *N, SDOperand &Lo,
606                                           SDOperand &Hi) {
607  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
608  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
609                                            RTLIB::MUL_F32,
610                                            RTLIB::MUL_F64,
611                                            RTLIB::MUL_F80,
612                                            RTLIB::MUL_PPCF128),
613                               N->getValueType(0), Ops, 2,
614                               false);
615  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
616  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
617}
618
619void DAGTypeLegalizer::ExpandFloatRes_FSUB(SDNode *N, SDOperand &Lo,
620                                           SDOperand &Hi) {
621  SDOperand Ops[2] = { N->getOperand(0), N->getOperand(1) };
622  SDOperand Call = MakeLibCall(GetFPLibCall(N->getValueType(0),
623                                            RTLIB::SUB_F32,
624                                            RTLIB::SUB_F64,
625                                            RTLIB::SUB_F80,
626                                            RTLIB::SUB_PPCF128),
627                               N->getValueType(0), Ops, 2,
628                               false);
629  assert(Call.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
630  Lo = Call.getOperand(0); Hi = Call.getOperand(1);
631}
632
633void DAGTypeLegalizer::ExpandFloatRes_LOAD(SDNode *N, SDOperand &Lo,
634                                           SDOperand &Hi) {
635  if (ISD::isNormalLoad(N)) {
636    ExpandRes_NormalLoad(N, Lo, Hi);
637    return;
638  }
639
640  assert(ISD::isUNINDEXEDLoad(N) && "Indexed load during type legalization!");
641  LoadSDNode *LD = cast<LoadSDNode>(N);
642  SDOperand Chain = LD->getChain();
643  SDOperand Ptr = LD->getBasePtr();
644
645  MVT NVT = TLI.getTypeToTransformTo(LD->getValueType(0));
646  assert(NVT.isByteSized() && "Expanded type not byte sized!");
647  assert(LD->getMemoryVT().bitsLE(NVT) && "Float type not round?");
648
649  Lo = DAG.getExtLoad(LD->getExtensionType(), NVT, Chain, Ptr,
650                      LD->getSrcValue(), LD->getSrcValueOffset(),
651                      LD->getMemoryVT(),
652                      LD->isVolatile(), LD->getAlignment());
653
654  // Remember the chain.
655  Chain = Lo.getValue(1);
656
657  // The high part is undefined.
658  Hi = DAG.getNode(ISD::UNDEF, NVT);
659
660  // Modified the chain - switch anything that used the old chain to use the
661  // new one.
662  ReplaceValueWith(SDOperand(LD, 1), Chain);
663}
664
665void DAGTypeLegalizer::ExpandFloatRes_XINT_TO_FP(SDNode *N, SDOperand &Lo,
666                                                 SDOperand &Hi) {
667  assert(N->getValueType(0) == MVT::ppcf128 && "Unsupported XINT_TO_FP!");
668  MVT VT = N->getValueType(0);
669  MVT NVT = TLI.getTypeToTransformTo(VT);
670  SDOperand Src = N->getOperand(0);
671  MVT SrcVT = Src.getValueType();
672
673  // First do an SINT_TO_FP, whether the original was signed or unsigned.
674  if (SrcVT.bitsLE(MVT::i32)) {
675    // The integer can be represented exactly in an f64.
676    Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i32, Src);
677    Lo = DAG.getConstantFP(APFloat(APInt(NVT.getSizeInBits(), 0)), NVT);
678    Hi = DAG.getNode(ISD::SINT_TO_FP, NVT, Src);
679  } else {
680    RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
681    if (SrcVT.bitsLE(MVT::i64)) {
682      Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i64, Src);
683      LC = RTLIB::SINTTOFP_I64_PPCF128;
684    } else if (SrcVT.bitsLE(MVT::i128)) {
685      Src = DAG.getNode(ISD::SIGN_EXTEND, MVT::i128, Src);
686      LC = RTLIB::SINTTOFP_I128_PPCF128;
687    }
688    assert(LC != RTLIB::UNKNOWN_LIBCALL && "Unsupported XINT_TO_FP!");
689
690    Hi = MakeLibCall(LC, VT, &Src, 1, true);
691    assert(Hi.Val->getOpcode() == ISD::BUILD_PAIR && "Call lowered wrongly!");
692    Lo = Hi.getOperand(0); Hi = Hi.getOperand(1);
693  }
694
695  if (N->getOpcode() == ISD::SINT_TO_FP)
696    return;
697
698  // Unsigned - fix up the SINT_TO_FP value just calculated.
699  Hi = DAG.getNode(ISD::BUILD_PAIR, VT, Lo, Hi);
700  SrcVT = Src.getValueType();
701
702  // x>=0 ? (ppcf128)(iN)x : (ppcf128)(iN)x + 2^N; N=32,64,128.
703  static const uint64_t TwoE32[]  = { 0x41f0000000000000LL, 0 };
704  static const uint64_t TwoE64[]  = { 0x43f0000000000000LL, 0 };
705  static const uint64_t TwoE128[] = { 0x47f0000000000000LL, 0 };
706  const uint64_t *Parts = 0;
707
708  switch (SrcVT.getSimpleVT()) {
709  default:
710    assert(false && "Unsupported UINT_TO_FP!");
711  case MVT::i32:
712    Parts = TwoE32;
713  case MVT::i64:
714    Parts = TwoE64;
715  case MVT::i128:
716    Parts = TwoE128;
717  }
718
719  Lo = DAG.getNode(ISD::FADD, VT, Hi,
720                   DAG.getConstantFP(APFloat(APInt(128, 2, Parts)),
721                                     MVT::ppcf128));
722  Lo = DAG.getNode(ISD::SELECT_CC, VT, Src, DAG.getConstant(0, SrcVT), Lo, Hi,
723                   DAG.getCondCode(ISD::SETLT));
724  Hi = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
725                   DAG.getConstant(1, TLI.getPointerTy()));
726  Lo = DAG.getNode(ISD::EXTRACT_ELEMENT, NVT, Lo,
727                   DAG.getConstant(0, TLI.getPointerTy()));
728}
729
730
731//===----------------------------------------------------------------------===//
732//  Float Operand Expansion
733//===----------------------------------------------------------------------===//
734
735/// ExpandFloatOperand - This method is called when the specified operand of the
736/// specified node is found to need expansion.  At this point, all of the result
737/// types of the node are known to be legal, but other operands of the node may
738/// need promotion or expansion as well as the specified one.
739bool DAGTypeLegalizer::ExpandFloatOperand(SDNode *N, unsigned OpNo) {
740  DEBUG(cerr << "Expand float operand: "; N->dump(&DAG); cerr << "\n");
741  SDOperand Res(0, 0);
742
743  if (TLI.getOperationAction(N->getOpcode(), N->getOperand(OpNo).getValueType())
744      == TargetLowering::Custom)
745    Res = TLI.LowerOperation(SDOperand(N, 0), DAG);
746
747  if (Res.Val == 0) {
748    switch (N->getOpcode()) {
749    default:
750  #ifndef NDEBUG
751      cerr << "ExpandFloatOperand Op #" << OpNo << ": ";
752      N->dump(&DAG); cerr << "\n";
753  #endif
754      assert(0 && "Do not know how to expand this operator's operand!");
755      abort();
756
757    case ISD::BIT_CONVERT:     Res = ExpandOp_BIT_CONVERT(N); break;
758    case ISD::BUILD_VECTOR:    Res = ExpandOp_BUILD_VECTOR(N); break;
759    case ISD::EXTRACT_ELEMENT: Res = ExpandOp_EXTRACT_ELEMENT(N); break;
760
761    case ISD::BR_CC:     Res = ExpandFloatOp_BR_CC(N); break;
762    case ISD::SELECT_CC: Res = ExpandFloatOp_BR_CC(N); break;
763    case ISD::SETCC:     Res = ExpandFloatOp_BR_CC(N); break;
764
765    case ISD::FP_ROUND:   Res = ExpandFloatOp_FP_ROUND(N); break;
766    case ISD::FP_TO_SINT: Res = ExpandFloatOp_FP_TO_SINT(N); break;
767    case ISD::FP_TO_UINT: Res = ExpandFloatOp_FP_TO_UINT(N); break;
768
769    case ISD::STORE:
770      Res = ExpandFloatOp_STORE(cast<StoreSDNode>(N), OpNo);
771      break;
772    }
773  }
774
775  // If the result is null, the sub-method took care of registering results etc.
776  if (!Res.Val) return false;
777  // If the result is N, the sub-method updated N in place.  Check to see if any
778  // operands are new, and if so, mark them.
779  if (Res.Val == N) {
780    // Mark N as new and remark N and its operands.  This allows us to correctly
781    // revisit N if it needs another step of expansion and allows us to visit
782    // any new operands to N.
783    ReanalyzeNode(N);
784    return true;
785  }
786
787  assert(Res.getValueType() == N->getValueType(0) && N->getNumValues() == 1 &&
788         "Invalid operand expansion");
789
790  ReplaceValueWith(SDOperand(N, 0), Res);
791  return false;
792}
793
794/// FloatExpandSetCCOperands - Expand the operands of a comparison.  This code
795/// is shared among BR_CC, SELECT_CC, and SETCC handlers.
796void DAGTypeLegalizer::FloatExpandSetCCOperands(SDOperand &NewLHS,
797                                                SDOperand &NewRHS,
798                                                ISD::CondCode &CCCode) {
799  SDOperand LHSLo, LHSHi, RHSLo, RHSHi;
800  GetExpandedFloat(NewLHS, LHSLo, LHSHi);
801  GetExpandedFloat(NewRHS, RHSLo, RHSHi);
802
803  MVT VT = NewLHS.getValueType();
804  assert(VT == MVT::ppcf128 && "Unsupported setcc type!");
805
806  // FIXME:  This generated code sucks.  We want to generate
807  //         FCMP crN, hi1, hi2
808  //         BNE crN, L:
809  //         FCMP crN, lo1, lo2
810  // The following can be improved, but not that much.
811  SDOperand Tmp1, Tmp2, Tmp3;
812  Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETEQ);
813  Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSLo), LHSLo, RHSLo, CCCode);
814  Tmp3 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
815  Tmp1 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, ISD::SETNE);
816  Tmp2 = DAG.getSetCC(TLI.getSetCCResultType(LHSHi), LHSHi, RHSHi, CCCode);
817  Tmp1 = DAG.getNode(ISD::AND, Tmp1.getValueType(), Tmp1, Tmp2);
818  NewLHS = DAG.getNode(ISD::OR, Tmp1.getValueType(), Tmp1, Tmp3);
819  NewRHS = SDOperand();   // LHS is the result, not a compare.
820}
821
822SDOperand DAGTypeLegalizer::ExpandFloatOp_BR_CC(SDNode *N) {
823  SDOperand NewLHS = N->getOperand(2), NewRHS = N->getOperand(3);
824  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(1))->get();
825  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
826
827  // If ExpandSetCCOperands returned a scalar, we need to compare the result
828  // against zero to select between true and false values.
829  if (NewRHS.Val == 0) {
830    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
831    CCCode = ISD::SETNE;
832  }
833
834  // Update N to have the operands specified.
835  return DAG.UpdateNodeOperands(SDOperand(N, 0), N->getOperand(0),
836                                DAG.getCondCode(CCCode), NewLHS, NewRHS,
837                                N->getOperand(4));
838}
839
840SDOperand DAGTypeLegalizer::ExpandFloatOp_SELECT_CC(SDNode *N) {
841  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
842  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(4))->get();
843  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
844
845  // If ExpandSetCCOperands returned a scalar, we need to compare the result
846  // against zero to select between true and false values.
847  if (NewRHS.Val == 0) {
848    NewRHS = DAG.getConstant(0, NewLHS.getValueType());
849    CCCode = ISD::SETNE;
850  }
851
852  // Update N to have the operands specified.
853  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
854                                N->getOperand(2), N->getOperand(3),
855                                DAG.getCondCode(CCCode));
856}
857
858SDOperand DAGTypeLegalizer::ExpandFloatOp_SETCC(SDNode *N) {
859  SDOperand NewLHS = N->getOperand(0), NewRHS = N->getOperand(1);
860  ISD::CondCode CCCode = cast<CondCodeSDNode>(N->getOperand(2))->get();
861  FloatExpandSetCCOperands(NewLHS, NewRHS, CCCode);
862
863  // If ExpandSetCCOperands returned a scalar, use it.
864  if (NewRHS.Val == 0) {
865    assert(NewLHS.getValueType() == N->getValueType(0) &&
866           "Unexpected setcc expansion!");
867    return NewLHS;
868  }
869
870  // Otherwise, update N to have the operands specified.
871  return DAG.UpdateNodeOperands(SDOperand(N, 0), NewLHS, NewRHS,
872                                DAG.getCondCode(CCCode));
873}
874
875SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_UINT(SDNode *N) {
876  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
877         "Unsupported FP_TO_UINT!");
878
879  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
880  switch (N->getValueType(0).getSimpleVT()) {
881  default:
882    assert(false && "Unsupported FP_TO_UINT!");
883  case MVT::i32:
884    LC = RTLIB::FPTOUINT_PPCF128_I32;
885    break;
886  case MVT::i64:
887    LC = RTLIB::FPTOUINT_PPCF128_I64;
888    break;
889  case MVT::i128:
890    LC = RTLIB::FPTOUINT_PPCF128_I128;
891    break;
892  }
893
894  return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
895}
896
897SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_TO_SINT(SDNode *N) {
898  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
899         "Unsupported FP_TO_SINT!");
900
901  RTLIB::Libcall LC = RTLIB::UNKNOWN_LIBCALL;
902  switch (N->getValueType(0).getSimpleVT()) {
903  default:
904    assert(false && "Unsupported FP_TO_SINT!");
905  case MVT::i32:
906    LC = RTLIB::FPTOSINT_PPCF128_I32;
907  case MVT::i64:
908    LC = RTLIB::FPTOSINT_PPCF128_I64;
909    break;
910  case MVT::i128:
911    LC = RTLIB::FPTOSINT_PPCF128_I64;
912    break;
913  }
914
915  return MakeLibCall(LC, N->getValueType(0), &N->getOperand(0), 1, false);
916}
917
918SDOperand DAGTypeLegalizer::ExpandFloatOp_FP_ROUND(SDNode *N) {
919  assert(N->getOperand(0).getValueType() == MVT::ppcf128 &&
920         "Logic only correct for ppcf128!");
921  SDOperand Lo, Hi;
922  GetExpandedFloat(N->getOperand(0), Lo, Hi);
923  // Round it the rest of the way (e.g. to f32) if needed.
924  return DAG.getNode(ISD::FP_ROUND, N->getValueType(0), Hi, N->getOperand(1));
925}
926
927SDOperand DAGTypeLegalizer::ExpandFloatOp_STORE(SDNode *N, unsigned OpNo) {
928  if (ISD::isNormalStore(N))
929    return ExpandOp_NormalStore(N, OpNo);
930
931  assert(ISD::isUNINDEXEDStore(N) && "Indexed store during type legalization!");
932  assert(OpNo == 1 && "Can only expand the stored value so far");
933  StoreSDNode *ST = cast<StoreSDNode>(N);
934
935  SDOperand Chain = ST->getChain();
936  SDOperand Ptr = ST->getBasePtr();
937
938  MVT NVT = TLI.getTypeToTransformTo(ST->getValue().getValueType());
939  assert(NVT.isByteSized() && "Expanded type not byte sized!");
940  assert(ST->getMemoryVT().bitsLE(NVT) && "Float type not round?");
941
942  SDOperand Lo, Hi;
943  GetExpandedOp(ST->getValue(), Lo, Hi);
944
945  return DAG.getTruncStore(Chain, Lo, Ptr,
946                           ST->getSrcValue(), ST->getSrcValueOffset(),
947                           ST->getMemoryVT(),
948                           ST->isVolatile(), ST->getAlignment());
949}
950