LegalizeTypes.h revision e8f61cb78f84e6fd82dabd4a5ab85691e70a7e88
1//===-- LegalizeTypes.h - Definition of the DAG Type Legalizer class ------===// 2// 3// The LLVM Compiler Infrastructure 4// 5// This file is distributed under the University of Illinois Open Source 6// License. See LICENSE.TXT for details. 7// 8//===----------------------------------------------------------------------===// 9// 10// This file defines the DAGTypeLegalizer class. This is a private interface 11// shared between the code that implements the SelectionDAG::LegalizeTypes 12// method. 13// 14//===----------------------------------------------------------------------===// 15 16#ifndef SELECTIONDAG_LEGALIZETYPES_H 17#define SELECTIONDAG_LEGALIZETYPES_H 18 19#define DEBUG_TYPE "legalize-types" 20#include "llvm/CodeGen/SelectionDAG.h" 21#include "llvm/Target/TargetLowering.h" 22#include "llvm/ADT/DenseMap.h" 23#include "llvm/ADT/DenseSet.h" 24#include "llvm/Support/Compiler.h" 25#include "llvm/Support/Debug.h" 26 27namespace llvm { 28 29//===----------------------------------------------------------------------===// 30/// DAGTypeLegalizer - This takes an arbitrary SelectionDAG as input and hacks 31/// on it until only value types the target machine can handle are left. This 32/// involves promoting small sizes to large sizes or splitting up large values 33/// into small values. 34/// 35class VISIBILITY_HIDDEN DAGTypeLegalizer { 36 TargetLowering &TLI; 37 SelectionDAG &DAG; 38public: 39 // NodeIdFlags - This pass uses the NodeId on the SDNodes to hold information 40 // about the state of the node. The enum has all the values. 41 enum NodeIdFlags { 42 /// ReadyToProcess - All operands have been processed, so this node is ready 43 /// to be handled. 44 ReadyToProcess = 0, 45 46 /// NewNode - This is a new node, not before seen, that was created in the 47 /// process of legalizing some other node. 48 NewNode = -1, 49 50 /// Unanalyzed - This node's ID needs to be set to the number of its 51 /// unprocessed operands. 52 Unanalyzed = -2, 53 54 /// Processed - This is a node that has already been processed. 55 Processed = -3 56 57 // 1+ - This is a node which has this many unprocessed operands. 58 }; 59private: 60 enum LegalizeAction { 61 Legal, // The target natively supports this type. 62 PromoteInteger, // Replace this integer type with a larger one. 63 ExpandInteger, // Split this integer type into two of half the size. 64 SoftenFloat, // Convert this float type to a same size integer type. 65 ExpandFloat, // Split this float type into two of half the size. 66 ScalarizeVector, // Replace this one-element vector with its element type. 67 SplitVector, // This vector type should be split into smaller vectors. 68 WidenVector // This vector type should be widened into a larger vector. 69 }; 70 71 /// ValueTypeActions - This is a bitvector that contains two bits for each 72 /// simple value type, where the two bits correspond to the LegalizeAction 73 /// enum from TargetLowering. This can be queried with "getTypeAction(VT)". 74 TargetLowering::ValueTypeActionImpl ValueTypeActions; 75 76 /// getTypeAction - Return how we should legalize values of this type. 77 LegalizeAction getTypeAction(MVT VT) const { 78 switch (ValueTypeActions.getTypeAction(VT)) { 79 default: 80 assert(false && "Unknown legalize action!"); 81 case TargetLowering::Legal: 82 return Legal; 83 case TargetLowering::Promote: 84 // Promote can mean 85 // 1) For integers, use a larger integer type (e.g. i8 -> i32). 86 // 2) For vectors, use a wider vector type (e.g. v3i32 -> v4i32). 87 if (!VT.isVector()) 88 return PromoteInteger; 89 else 90 return WidenVector; 91 case TargetLowering::Expand: 92 // Expand can mean 93 // 1) split scalar in half, 2) convert a float to an integer, 94 // 3) scalarize a single-element vector, 4) split a vector in two. 95 if (!VT.isVector()) { 96 if (VT.isInteger()) 97 return ExpandInteger; 98 else if (VT.getSizeInBits() == 99 TLI.getTypeToTransformTo(VT).getSizeInBits()) 100 return SoftenFloat; 101 else 102 return ExpandFloat; 103 } else if (VT.getVectorNumElements() == 1) { 104 return ScalarizeVector; 105 } else { 106 return SplitVector; 107 } 108 } 109 } 110 111 /// isTypeLegal - Return true if this type is legal on this target. 112 bool isTypeLegal(MVT VT) const { 113 return ValueTypeActions.getTypeAction(VT) == TargetLowering::Legal; 114 } 115 116 /// IgnoreNodeResults - Pretend all of this node's results are legal. 117 bool IgnoreNodeResults(SDNode *N) const { 118 return N->getOpcode() == ISD::TargetConstant; 119 } 120 121 /// PromotedIntegers - For integer nodes that are below legal width, this map 122 /// indicates what promoted value to use. 123 DenseMap<SDValue, SDValue> PromotedIntegers; 124 125 /// ExpandedIntegers - For integer nodes that need to be expanded this map 126 /// indicates which operands are the expanded version of the input. 127 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedIntegers; 128 129 /// SoftenedFloats - For floating point nodes converted to integers of 130 /// the same size, this map indicates the converted value to use. 131 DenseMap<SDValue, SDValue> SoftenedFloats; 132 133 /// ExpandedFloats - For float nodes that need to be expanded this map 134 /// indicates which operands are the expanded version of the input. 135 DenseMap<SDValue, std::pair<SDValue, SDValue> > ExpandedFloats; 136 137 /// ScalarizedVectors - For nodes that are <1 x ty>, this map indicates the 138 /// scalar value of type 'ty' to use. 139 DenseMap<SDValue, SDValue> ScalarizedVectors; 140 141 /// SplitVectors - For nodes that need to be split this map indicates 142 /// which operands are the expanded version of the input. 143 DenseMap<SDValue, std::pair<SDValue, SDValue> > SplitVectors; 144 145 /// WidenedVectors - For vector nodes that need to be widened, indicates 146 /// the widened value to use. 147 DenseMap<SDValue, SDValue> WidenedVectors; 148 149 /// ReplacedValues - For values that have been replaced with another, 150 /// indicates the replacement value to use. 151 DenseMap<SDValue, SDValue> ReplacedValues; 152 153 /// Worklist - This defines a worklist of nodes to process. In order to be 154 /// pushed onto this worklist, all operands of a node must have already been 155 /// processed. 156 SmallVector<SDNode*, 128> Worklist; 157 158public: 159 explicit DAGTypeLegalizer(SelectionDAG &dag) 160 : TLI(dag.getTargetLoweringInfo()), DAG(dag), 161 ValueTypeActions(TLI.getValueTypeActions()) { 162 assert(MVT::LAST_VALUETYPE <= 32 && 163 "Too many value types for ValueTypeActions to hold!"); 164 } 165 166 /// run - This is the main entry point for the type legalizer. This does a 167 /// top-down traversal of the dag, legalizing types as it goes. Returns 168 /// "true" if it made any changes. 169 bool run(); 170 171 void NoteDeletion(SDNode *Old, SDNode *New) { 172 ExpungeNode(Old); 173 ExpungeNode(New); 174 for (unsigned i = 0, e = Old->getNumValues(); i != e; ++i) 175 ReplacedValues[SDValue(Old, i)] = SDValue(New, i); 176 } 177 178private: 179 SDNode *AnalyzeNewNode(SDNode *N); 180 void AnalyzeNewValue(SDValue &Val); 181 void ExpungeNode(SDNode *N); 182 void PerformExpensiveChecks(); 183 void RemapValue(SDValue &N); 184 185 // Common routines. 186 SDValue BitConvertToInteger(SDValue Op); 187 SDValue BitConvertVectorToIntegerVector(SDValue Op); 188 SDValue CreateStackStoreLoad(SDValue Op, MVT DestVT); 189 bool CustomLowerResults(SDNode *N, MVT VT, bool LegalizeResult); 190 SDValue GetVectorElementPointer(SDValue VecPtr, MVT EltVT, SDValue Index); 191 SDValue JoinIntegers(SDValue Lo, SDValue Hi); 192 SDValue LibCallify(RTLIB::Libcall LC, SDNode *N, bool isSigned); 193 SDValue MakeLibCall(RTLIB::Libcall LC, MVT RetVT, 194 const SDValue *Ops, unsigned NumOps, bool isSigned, 195 DebugLoc dl); 196 SDValue PromoteTargetBoolean(SDValue Bool, MVT VT); 197 void ReplaceValueWith(SDValue From, SDValue To); 198 void ReplaceValueWithHelper(SDValue From, SDValue To); 199 void SplitInteger(SDValue Op, SDValue &Lo, SDValue &Hi); 200 void SplitInteger(SDValue Op, MVT LoVT, MVT HiVT, 201 SDValue &Lo, SDValue &Hi); 202 203 //===--------------------------------------------------------------------===// 204 // Integer Promotion Support: LegalizeIntegerTypes.cpp 205 //===--------------------------------------------------------------------===// 206 207 /// GetPromotedInteger - Given a processed operand Op which was promoted to a 208 /// larger integer type, this returns the promoted value. The low bits of the 209 /// promoted value corresponding to the original type are exactly equal to Op. 210 /// The extra bits contain rubbish, so the promoted value may need to be zero- 211 /// or sign-extended from the original type before it is usable (the helpers 212 /// SExtPromotedInteger and ZExtPromotedInteger can do this for you). 213 /// For example, if Op is an i16 and was promoted to an i32, then this method 214 /// returns an i32, the lower 16 bits of which coincide with Op, and the upper 215 /// 16 bits of which contain rubbish. 216 SDValue GetPromotedInteger(SDValue Op) { 217 SDValue &PromotedOp = PromotedIntegers[Op]; 218 RemapValue(PromotedOp); 219 assert(PromotedOp.getNode() && "Operand wasn't promoted?"); 220 return PromotedOp; 221 } 222 void SetPromotedInteger(SDValue Op, SDValue Result); 223 224 /// SExtPromotedInteger - Get a promoted operand and sign extend it to the 225 /// final size. 226 SDValue SExtPromotedInteger(SDValue Op) { 227 MVT OldVT = Op.getValueType(); 228 DebugLoc dl = Op.getDebugLoc(); 229 Op = GetPromotedInteger(Op); 230 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, Op.getValueType(), Op, 231 DAG.getValueType(OldVT)); 232 } 233 234 /// ZExtPromotedInteger - Get a promoted operand and zero extend it to the 235 /// final size. 236 SDValue ZExtPromotedInteger(SDValue Op) { 237 MVT OldVT = Op.getValueType(); 238 DebugLoc dl = Op.getDebugLoc(); 239 Op = GetPromotedInteger(Op); 240 return DAG.getZeroExtendInReg(Op, dl, OldVT); 241 } 242 243 // Integer Result Promotion. 244 void PromoteIntegerResult(SDNode *N, unsigned ResNo); 245 SDValue PromoteIntRes_AssertSext(SDNode *N); 246 SDValue PromoteIntRes_AssertZext(SDNode *N); 247 SDValue PromoteIntRes_Atomic1(AtomicSDNode *N); 248 SDValue PromoteIntRes_Atomic2(AtomicSDNode *N); 249 SDValue PromoteIntRes_BIT_CONVERT(SDNode *N); 250 SDValue PromoteIntRes_BSWAP(SDNode *N); 251 SDValue PromoteIntRes_BUILD_PAIR(SDNode *N); 252 SDValue PromoteIntRes_Constant(SDNode *N); 253 SDValue PromoteIntRes_CONVERT_RNDSAT(SDNode *N); 254 SDValue PromoteIntRes_CTLZ(SDNode *N); 255 SDValue PromoteIntRes_CTPOP(SDNode *N); 256 SDValue PromoteIntRes_CTTZ(SDNode *N); 257 SDValue PromoteIntRes_EXTRACT_VECTOR_ELT(SDNode *N); 258 SDValue PromoteIntRes_FP_TO_XINT(SDNode *N); 259 SDValue PromoteIntRes_INT_EXTEND(SDNode *N); 260 SDValue PromoteIntRes_LOAD(LoadSDNode *N); 261 SDValue PromoteIntRes_Overflow(SDNode *N); 262 SDValue PromoteIntRes_SADDSUBO(SDNode *N, unsigned ResNo); 263 SDValue PromoteIntRes_SDIV(SDNode *N); 264 SDValue PromoteIntRes_SELECT(SDNode *N); 265 SDValue PromoteIntRes_SELECT_CC(SDNode *N); 266 SDValue PromoteIntRes_SETCC(SDNode *N); 267 SDValue PromoteIntRes_SHL(SDNode *N); 268 SDValue PromoteIntRes_SimpleIntBinOp(SDNode *N); 269 SDValue PromoteIntRes_SIGN_EXTEND_INREG(SDNode *N); 270 SDValue PromoteIntRes_SRA(SDNode *N); 271 SDValue PromoteIntRes_SRL(SDNode *N); 272 SDValue PromoteIntRes_TRUNCATE(SDNode *N); 273 SDValue PromoteIntRes_UADDSUBO(SDNode *N, unsigned ResNo); 274 SDValue PromoteIntRes_UDIV(SDNode *N); 275 SDValue PromoteIntRes_UNDEF(SDNode *N); 276 SDValue PromoteIntRes_VAARG(SDNode *N); 277 SDValue PromoteIntRes_XMULO(SDNode *N, unsigned ResNo); 278 279 // Integer Operand Promotion. 280 bool PromoteIntegerOperand(SDNode *N, unsigned OperandNo); 281 SDValue PromoteIntOp_ANY_EXTEND(SDNode *N); 282 SDValue PromoteIntOp_BIT_CONVERT(SDNode *N); 283 SDValue PromoteIntOp_BUILD_PAIR(SDNode *N); 284 SDValue PromoteIntOp_BR_CC(SDNode *N, unsigned OpNo); 285 SDValue PromoteIntOp_BRCOND(SDNode *N, unsigned OpNo); 286 SDValue PromoteIntOp_BUILD_VECTOR(SDNode *N); 287 SDValue PromoteIntOp_CONVERT_RNDSAT(SDNode *N); 288 SDValue PromoteIntOp_INSERT_VECTOR_ELT(SDNode *N, unsigned OpNo); 289 SDValue PromoteIntOp_MEMBARRIER(SDNode *N); 290 SDValue PromoteIntOp_SCALAR_TO_VECTOR(SDNode *N); 291 SDValue PromoteIntOp_SELECT(SDNode *N, unsigned OpNo); 292 SDValue PromoteIntOp_SELECT_CC(SDNode *N, unsigned OpNo); 293 SDValue PromoteIntOp_SETCC(SDNode *N, unsigned OpNo); 294 SDValue PromoteIntOp_Shift(SDNode *N); 295 SDValue PromoteIntOp_SIGN_EXTEND(SDNode *N); 296 SDValue PromoteIntOp_SINT_TO_FP(SDNode *N); 297 SDValue PromoteIntOp_STORE(StoreSDNode *N, unsigned OpNo); 298 SDValue PromoteIntOp_TRUNCATE(SDNode *N); 299 SDValue PromoteIntOp_UINT_TO_FP(SDNode *N); 300 SDValue PromoteIntOp_ZERO_EXTEND(SDNode *N); 301 302 void PromoteSetCCOperands(SDValue &LHS,SDValue &RHS, ISD::CondCode Code); 303 304 //===--------------------------------------------------------------------===// 305 // Integer Expansion Support: LegalizeIntegerTypes.cpp 306 //===--------------------------------------------------------------------===// 307 308 /// GetExpandedInteger - Given a processed operand Op which was expanded into 309 /// two integers of half the size, this returns the two halves. The low bits 310 /// of Op are exactly equal to the bits of Lo; the high bits exactly equal Hi. 311 /// For example, if Op is an i64 which was expanded into two i32's, then this 312 /// method returns the two i32's, with Lo being equal to the lower 32 bits of 313 /// Op, and Hi being equal to the upper 32 bits. 314 void GetExpandedInteger(SDValue Op, SDValue &Lo, SDValue &Hi); 315 void SetExpandedInteger(SDValue Op, SDValue Lo, SDValue Hi); 316 317 // Integer Result Expansion. 318 void ExpandIntegerResult(SDNode *N, unsigned ResNo); 319 void ExpandIntRes_ANY_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 320 void ExpandIntRes_AssertSext (SDNode *N, SDValue &Lo, SDValue &Hi); 321 void ExpandIntRes_AssertZext (SDNode *N, SDValue &Lo, SDValue &Hi); 322 void ExpandIntRes_Constant (SDNode *N, SDValue &Lo, SDValue &Hi); 323 void ExpandIntRes_CTLZ (SDNode *N, SDValue &Lo, SDValue &Hi); 324 void ExpandIntRes_CTPOP (SDNode *N, SDValue &Lo, SDValue &Hi); 325 void ExpandIntRes_CTTZ (SDNode *N, SDValue &Lo, SDValue &Hi); 326 void ExpandIntRes_LOAD (LoadSDNode *N, SDValue &Lo, SDValue &Hi); 327 void ExpandIntRes_SIGN_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 328 void ExpandIntRes_SIGN_EXTEND_INREG (SDNode *N, SDValue &Lo, SDValue &Hi); 329 void ExpandIntRes_TRUNCATE (SDNode *N, SDValue &Lo, SDValue &Hi); 330 void ExpandIntRes_ZERO_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 331 void ExpandIntRes_FP_TO_SINT (SDNode *N, SDValue &Lo, SDValue &Hi); 332 void ExpandIntRes_FP_TO_UINT (SDNode *N, SDValue &Lo, SDValue &Hi); 333 334 void ExpandIntRes_Logical (SDNode *N, SDValue &Lo, SDValue &Hi); 335 void ExpandIntRes_ADDSUB (SDNode *N, SDValue &Lo, SDValue &Hi); 336 void ExpandIntRes_ADDSUBC (SDNode *N, SDValue &Lo, SDValue &Hi); 337 void ExpandIntRes_ADDSUBE (SDNode *N, SDValue &Lo, SDValue &Hi); 338 void ExpandIntRes_BSWAP (SDNode *N, SDValue &Lo, SDValue &Hi); 339 void ExpandIntRes_MUL (SDNode *N, SDValue &Lo, SDValue &Hi); 340 void ExpandIntRes_SDIV (SDNode *N, SDValue &Lo, SDValue &Hi); 341 void ExpandIntRes_SREM (SDNode *N, SDValue &Lo, SDValue &Hi); 342 void ExpandIntRes_UDIV (SDNode *N, SDValue &Lo, SDValue &Hi); 343 void ExpandIntRes_UREM (SDNode *N, SDValue &Lo, SDValue &Hi); 344 void ExpandIntRes_Shift (SDNode *N, SDValue &Lo, SDValue &Hi); 345 346 void ExpandShiftByConstant(SDNode *N, unsigned Amt, 347 SDValue &Lo, SDValue &Hi); 348 bool ExpandShiftWithKnownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); 349 bool ExpandShiftWithUnknownAmountBit(SDNode *N, SDValue &Lo, SDValue &Hi); 350 351 // Integer Operand Expansion. 352 bool ExpandIntegerOperand(SDNode *N, unsigned OperandNo); 353 SDValue ExpandIntOp_BIT_CONVERT(SDNode *N); 354 SDValue ExpandIntOp_BR_CC(SDNode *N); 355 SDValue ExpandIntOp_BUILD_VECTOR(SDNode *N); 356 SDValue ExpandIntOp_EXTRACT_ELEMENT(SDNode *N); 357 SDValue ExpandIntOp_SELECT_CC(SDNode *N); 358 SDValue ExpandIntOp_SETCC(SDNode *N); 359 SDValue ExpandIntOp_Shift(SDNode *N); 360 SDValue ExpandIntOp_SINT_TO_FP(SDNode *N); 361 SDValue ExpandIntOp_STORE(StoreSDNode *N, unsigned OpNo); 362 SDValue ExpandIntOp_TRUNCATE(SDNode *N); 363 SDValue ExpandIntOp_UINT_TO_FP(SDNode *N); 364 365 void IntegerExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS, 366 ISD::CondCode &CCCode, DebugLoc dl); 367 368 //===--------------------------------------------------------------------===// 369 // Float to Integer Conversion Support: LegalizeFloatTypes.cpp 370 //===--------------------------------------------------------------------===// 371 372 /// GetSoftenedFloat - Given a processed operand Op which was converted to an 373 /// integer of the same size, this returns the integer. The integer contains 374 /// exactly the same bits as Op - only the type changed. For example, if Op 375 /// is an f32 which was softened to an i32, then this method returns an i32, 376 /// the bits of which coincide with those of Op. 377 SDValue GetSoftenedFloat(SDValue Op) { 378 SDValue &SoftenedOp = SoftenedFloats[Op]; 379 RemapValue(SoftenedOp); 380 assert(SoftenedOp.getNode() && "Operand wasn't converted to integer?"); 381 return SoftenedOp; 382 } 383 void SetSoftenedFloat(SDValue Op, SDValue Result); 384 385 // Result Float to Integer Conversion. 386 void SoftenFloatResult(SDNode *N, unsigned OpNo); 387 SDValue SoftenFloatRes_BIT_CONVERT(SDNode *N); 388 SDValue SoftenFloatRes_BUILD_PAIR(SDNode *N); 389 SDValue SoftenFloatRes_ConstantFP(ConstantFPSDNode *N); 390 SDValue SoftenFloatRes_EXTRACT_VECTOR_ELT(SDNode *N); 391 SDValue SoftenFloatRes_FABS(SDNode *N); 392 SDValue SoftenFloatRes_FADD(SDNode *N); 393 SDValue SoftenFloatRes_FCEIL(SDNode *N); 394 SDValue SoftenFloatRes_FCOPYSIGN(SDNode *N); 395 SDValue SoftenFloatRes_FCOS(SDNode *N); 396 SDValue SoftenFloatRes_FDIV(SDNode *N); 397 SDValue SoftenFloatRes_FEXP(SDNode *N); 398 SDValue SoftenFloatRes_FEXP2(SDNode *N); 399 SDValue SoftenFloatRes_FFLOOR(SDNode *N); 400 SDValue SoftenFloatRes_FLOG(SDNode *N); 401 SDValue SoftenFloatRes_FLOG2(SDNode *N); 402 SDValue SoftenFloatRes_FLOG10(SDNode *N); 403 SDValue SoftenFloatRes_FMUL(SDNode *N); 404 SDValue SoftenFloatRes_FNEARBYINT(SDNode *N); 405 SDValue SoftenFloatRes_FNEG(SDNode *N); 406 SDValue SoftenFloatRes_FP_EXTEND(SDNode *N); 407 SDValue SoftenFloatRes_FP_ROUND(SDNode *N); 408 SDValue SoftenFloatRes_FPOW(SDNode *N); 409 SDValue SoftenFloatRes_FPOWI(SDNode *N); 410 SDValue SoftenFloatRes_FREM(SDNode *N); 411 SDValue SoftenFloatRes_FRINT(SDNode *N); 412 SDValue SoftenFloatRes_FSIN(SDNode *N); 413 SDValue SoftenFloatRes_FSQRT(SDNode *N); 414 SDValue SoftenFloatRes_FSUB(SDNode *N); 415 SDValue SoftenFloatRes_FTRUNC(SDNode *N); 416 SDValue SoftenFloatRes_LOAD(SDNode *N); 417 SDValue SoftenFloatRes_SELECT(SDNode *N); 418 SDValue SoftenFloatRes_SELECT_CC(SDNode *N); 419 SDValue SoftenFloatRes_UNDEF(SDNode *N); 420 SDValue SoftenFloatRes_VAARG(SDNode *N); 421 SDValue SoftenFloatRes_XINT_TO_FP(SDNode *N); 422 423 // Operand Float to Integer Conversion. 424 bool SoftenFloatOperand(SDNode *N, unsigned OpNo); 425 SDValue SoftenFloatOp_BIT_CONVERT(SDNode *N); 426 SDValue SoftenFloatOp_BR_CC(SDNode *N); 427 SDValue SoftenFloatOp_FP_ROUND(SDNode *N); 428 SDValue SoftenFloatOp_FP_TO_SINT(SDNode *N); 429 SDValue SoftenFloatOp_FP_TO_UINT(SDNode *N); 430 SDValue SoftenFloatOp_SELECT_CC(SDNode *N); 431 SDValue SoftenFloatOp_SETCC(SDNode *N); 432 SDValue SoftenFloatOp_STORE(SDNode *N, unsigned OpNo); 433 434 void SoftenSetCCOperands(SDValue &NewLHS, SDValue &NewRHS, 435 ISD::CondCode &CCCode, DebugLoc dl); 436 437 //===--------------------------------------------------------------------===// 438 // Float Expansion Support: LegalizeFloatTypes.cpp 439 //===--------------------------------------------------------------------===// 440 441 /// GetExpandedFloat - Given a processed operand Op which was expanded into 442 /// two floating point values of half the size, this returns the two halves. 443 /// The low bits of Op are exactly equal to the bits of Lo; the high bits 444 /// exactly equal Hi. For example, if Op is a ppcf128 which was expanded 445 /// into two f64's, then this method returns the two f64's, with Lo being 446 /// equal to the lower 64 bits of Op, and Hi to the upper 64 bits. 447 void GetExpandedFloat(SDValue Op, SDValue &Lo, SDValue &Hi); 448 void SetExpandedFloat(SDValue Op, SDValue Lo, SDValue Hi); 449 450 // Float Result Expansion. 451 void ExpandFloatResult(SDNode *N, unsigned ResNo); 452 void ExpandFloatRes_ConstantFP(SDNode *N, SDValue &Lo, SDValue &Hi); 453 void ExpandFloatRes_FABS (SDNode *N, SDValue &Lo, SDValue &Hi); 454 void ExpandFloatRes_FADD (SDNode *N, SDValue &Lo, SDValue &Hi); 455 void ExpandFloatRes_FCEIL (SDNode *N, SDValue &Lo, SDValue &Hi); 456 void ExpandFloatRes_FCOS (SDNode *N, SDValue &Lo, SDValue &Hi); 457 void ExpandFloatRes_FDIV (SDNode *N, SDValue &Lo, SDValue &Hi); 458 void ExpandFloatRes_FEXP (SDNode *N, SDValue &Lo, SDValue &Hi); 459 void ExpandFloatRes_FEXP2 (SDNode *N, SDValue &Lo, SDValue &Hi); 460 void ExpandFloatRes_FFLOOR (SDNode *N, SDValue &Lo, SDValue &Hi); 461 void ExpandFloatRes_FLOG (SDNode *N, SDValue &Lo, SDValue &Hi); 462 void ExpandFloatRes_FLOG2 (SDNode *N, SDValue &Lo, SDValue &Hi); 463 void ExpandFloatRes_FLOG10 (SDNode *N, SDValue &Lo, SDValue &Hi); 464 void ExpandFloatRes_FMUL (SDNode *N, SDValue &Lo, SDValue &Hi); 465 void ExpandFloatRes_FNEARBYINT(SDNode *N, SDValue &Lo, SDValue &Hi); 466 void ExpandFloatRes_FNEG (SDNode *N, SDValue &Lo, SDValue &Hi); 467 void ExpandFloatRes_FP_EXTEND (SDNode *N, SDValue &Lo, SDValue &Hi); 468 void ExpandFloatRes_FPOW (SDNode *N, SDValue &Lo, SDValue &Hi); 469 void ExpandFloatRes_FPOWI (SDNode *N, SDValue &Lo, SDValue &Hi); 470 void ExpandFloatRes_FRINT (SDNode *N, SDValue &Lo, SDValue &Hi); 471 void ExpandFloatRes_FSIN (SDNode *N, SDValue &Lo, SDValue &Hi); 472 void ExpandFloatRes_FSQRT (SDNode *N, SDValue &Lo, SDValue &Hi); 473 void ExpandFloatRes_FSUB (SDNode *N, SDValue &Lo, SDValue &Hi); 474 void ExpandFloatRes_FTRUNC (SDNode *N, SDValue &Lo, SDValue &Hi); 475 void ExpandFloatRes_LOAD (SDNode *N, SDValue &Lo, SDValue &Hi); 476 void ExpandFloatRes_XINT_TO_FP(SDNode *N, SDValue &Lo, SDValue &Hi); 477 478 // Float Operand Expansion. 479 bool ExpandFloatOperand(SDNode *N, unsigned OperandNo); 480 SDValue ExpandFloatOp_BR_CC(SDNode *N); 481 SDValue ExpandFloatOp_FP_ROUND(SDNode *N); 482 SDValue ExpandFloatOp_FP_TO_SINT(SDNode *N); 483 SDValue ExpandFloatOp_FP_TO_UINT(SDNode *N); 484 SDValue ExpandFloatOp_SELECT_CC(SDNode *N); 485 SDValue ExpandFloatOp_SETCC(SDNode *N); 486 SDValue ExpandFloatOp_STORE(SDNode *N, unsigned OpNo); 487 488 void FloatExpandSetCCOperands(SDValue &NewLHS, SDValue &NewRHS, 489 ISD::CondCode &CCCode, DebugLoc dl); 490 491 //===--------------------------------------------------------------------===// 492 // Scalarization Support: LegalizeVectorTypes.cpp 493 //===--------------------------------------------------------------------===// 494 495 /// GetScalarizedVector - Given a processed one-element vector Op which was 496 /// scalarized to its element type, this returns the element. For example, 497 /// if Op is a v1i32, Op = < i32 val >, this method returns val, an i32. 498 SDValue GetScalarizedVector(SDValue Op) { 499 SDValue &ScalarizedOp = ScalarizedVectors[Op]; 500 RemapValue(ScalarizedOp); 501 assert(ScalarizedOp.getNode() && "Operand wasn't scalarized?"); 502 return ScalarizedOp; 503 } 504 void SetScalarizedVector(SDValue Op, SDValue Result); 505 506 // Vector Result Scalarization: <1 x ty> -> ty. 507 void ScalarizeVectorResult(SDNode *N, unsigned OpNo); 508 SDValue ScalarizeVecRes_BinOp(SDNode *N); 509 SDValue ScalarizeVecRes_ShiftOp(SDNode *N); 510 SDValue ScalarizeVecRes_UnaryOp(SDNode *N); 511 512 SDValue ScalarizeVecRes_BIT_CONVERT(SDNode *N); 513 SDValue ScalarizeVecRes_CONVERT_RNDSAT(SDNode *N); 514 SDValue ScalarizeVecRes_EXTRACT_SUBVECTOR(SDNode *N); 515 SDValue ScalarizeVecRes_FPOWI(SDNode *N); 516 SDValue ScalarizeVecRes_INSERT_VECTOR_ELT(SDNode *N); 517 SDValue ScalarizeVecRes_LOAD(LoadSDNode *N); 518 SDValue ScalarizeVecRes_SCALAR_TO_VECTOR(SDNode *N); 519 SDValue ScalarizeVecRes_SELECT(SDNode *N); 520 SDValue ScalarizeVecRes_SELECT_CC(SDNode *N); 521 SDValue ScalarizeVecRes_UNDEF(SDNode *N); 522 SDValue ScalarizeVecRes_VECTOR_SHUFFLE(SDNode *N); 523 SDValue ScalarizeVecRes_VSETCC(SDNode *N); 524 525 // Vector Operand Scalarization: <1 x ty> -> ty. 526 bool ScalarizeVectorOperand(SDNode *N, unsigned OpNo); 527 SDValue ScalarizeVecOp_BIT_CONVERT(SDNode *N); 528 SDValue ScalarizeVecOp_CONCAT_VECTORS(SDNode *N); 529 SDValue ScalarizeVecOp_EXTRACT_VECTOR_ELT(SDNode *N); 530 SDValue ScalarizeVecOp_STORE(StoreSDNode *N, unsigned OpNo); 531 532 //===--------------------------------------------------------------------===// 533 // Vector Splitting Support: LegalizeVectorTypes.cpp 534 //===--------------------------------------------------------------------===// 535 536 /// GetSplitVector - Given a processed vector Op which was split into smaller 537 /// vectors, this method returns the smaller vectors. The first elements of 538 /// Op coincide with the elements of Lo; the remaining elements of Op coincide 539 /// with the elements of Hi: Op is what you would get by concatenating Lo and 540 /// Hi. For example, if Op is a v8i32 that was split into two v4i32's, then 541 /// this method returns the two v4i32's, with Lo corresponding to the first 4 542 /// elements of Op, and Hi to the last 4 elements. 543 void GetSplitVector(SDValue Op, SDValue &Lo, SDValue &Hi); 544 void SetSplitVector(SDValue Op, SDValue Lo, SDValue Hi); 545 546 // Vector Result Splitting: <128 x ty> -> 2 x <64 x ty>. 547 void SplitVectorResult(SDNode *N, unsigned OpNo); 548 void SplitVecRes_BinOp(SDNode *N, SDValue &Lo, SDValue &Hi); 549 void SplitVecRes_UnaryOp(SDNode *N, SDValue &Lo, SDValue &Hi); 550 551 void SplitVecRes_BIT_CONVERT(SDNode *N, SDValue &Lo, SDValue &Hi); 552 void SplitVecRes_BUILD_PAIR(SDNode *N, SDValue &Lo, SDValue &Hi); 553 void SplitVecRes_BUILD_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); 554 void SplitVecRes_CONCAT_VECTORS(SDNode *N, SDValue &Lo, SDValue &Hi); 555 void SplitVecRes_CONVERT_RNDSAT(SDNode *N, SDValue &Lo, SDValue &Hi); 556 void SplitVecRes_EXTRACT_SUBVECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); 557 void SplitVecRes_FPOWI(SDNode *N, SDValue &Lo, SDValue &Hi); 558 void SplitVecRes_INSERT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi); 559 void SplitVecRes_LOAD(LoadSDNode *N, SDValue &Lo, SDValue &Hi); 560 void SplitVecRes_SCALAR_TO_VECTOR(SDNode *N, SDValue &Lo, SDValue &Hi); 561 void SplitVecRes_UNDEF(SDNode *N, SDValue &Lo, SDValue &Hi); 562 void SplitVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N, SDValue &Lo, 563 SDValue &Hi); 564 void SplitVecRes_VSETCC(SDNode *N, SDValue &Lo, SDValue &Hi); 565 566 // Vector Operand Splitting: <128 x ty> -> 2 x <64 x ty>. 567 bool SplitVectorOperand(SDNode *N, unsigned OpNo); 568 SDValue SplitVecOp_UnaryOp(SDNode *N); 569 570 SDValue SplitVecOp_BIT_CONVERT(SDNode *N); 571 SDValue SplitVecOp_EXTRACT_SUBVECTOR(SDNode *N); 572 SDValue SplitVecOp_EXTRACT_VECTOR_ELT(SDNode *N); 573 SDValue SplitVecOp_STORE(StoreSDNode *N, unsigned OpNo); 574 575 //===--------------------------------------------------------------------===// 576 // Vector Widening Support: LegalizeVectorTypes.cpp 577 //===--------------------------------------------------------------------===// 578 579 /// GetWidenedVector - Given a processed vector Op which was widened into a 580 /// larger vector, this method returns the larger vector. The elements of 581 /// the returned vector consist of the elements of Op followed by elements 582 /// containing rubbish. For example, if Op is a v2i32 that was widened to a 583 /// v4i32, then this method returns a v4i32 for which the first two elements 584 /// are the same as those of Op, while the last two elements contain rubbish. 585 SDValue GetWidenedVector(SDValue Op) { 586 SDValue &WidenedOp = WidenedVectors[Op]; 587 RemapValue(WidenedOp); 588 assert(WidenedOp.getNode() && "Operand wasn't widened?"); 589 return WidenedOp; 590 } 591 void SetWidenedVector(SDValue Op, SDValue Result); 592 593 // Widen Vector Result Promotion. 594 void WidenVectorResult(SDNode *N, unsigned ResNo); 595 SDValue WidenVecRes_BIT_CONVERT(SDNode* N); 596 SDValue WidenVecRes_BUILD_VECTOR(SDNode* N); 597 SDValue WidenVecRes_CONCAT_VECTORS(SDNode* N); 598 SDValue WidenVecRes_CONVERT_RNDSAT(SDNode* N); 599 SDValue WidenVecRes_EXTRACT_SUBVECTOR(SDNode* N); 600 SDValue WidenVecRes_INSERT_VECTOR_ELT(SDNode* N); 601 SDValue WidenVecRes_LOAD(SDNode* N); 602 SDValue WidenVecRes_SCALAR_TO_VECTOR(SDNode* N); 603 SDValue WidenVecRes_SELECT(SDNode* N); 604 SDValue WidenVecRes_SELECT_CC(SDNode* N); 605 SDValue WidenVecRes_UNDEF(SDNode *N); 606 SDValue WidenVecRes_VECTOR_SHUFFLE(ShuffleVectorSDNode *N); 607 SDValue WidenVecRes_VSETCC(SDNode* N); 608 609 SDValue WidenVecRes_Binary(SDNode *N); 610 SDValue WidenVecRes_Convert(SDNode *N); 611 SDValue WidenVecRes_Shift(SDNode *N); 612 SDValue WidenVecRes_Unary(SDNode *N); 613 614 // Widen Vector Operand. 615 bool WidenVectorOperand(SDNode *N, unsigned ResNo); 616 SDValue WidenVecOp_BIT_CONVERT(SDNode *N); 617 SDValue WidenVecOp_CONCAT_VECTORS(SDNode *N); 618 SDValue WidenVecOp_EXTRACT_VECTOR_ELT(SDNode *N); 619 SDValue WidenVecOp_STORE(SDNode* N); 620 621 SDValue WidenVecOp_Convert(SDNode *N); 622 623 //===--------------------------------------------------------------------===// 624 // Vector Widening Utilities Support: LegalizeVectorTypes.cpp 625 //===--------------------------------------------------------------------===// 626 627 /// Helper genWidenVectorLoads - Helper function to generate a set of 628 /// loads to load a vector with a resulting wider type. It takes 629 /// ExtType: Extension type 630 /// LdChain: list of chains for the load we have generated. 631 /// Chain: incoming chain for the ld vector. 632 /// BasePtr: base pointer to load from. 633 /// SV: memory disambiguation source value. 634 /// SVOffset: memory disambiugation offset. 635 /// Alignment: alignment of the memory. 636 /// isVolatile: volatile load. 637 /// LdWidth: width of memory that we want to load. 638 /// ResType: the wider result result type for the resulting vector. 639 /// dl: DebugLoc to be applied to new nodes 640 SDValue GenWidenVectorLoads(SmallVector<SDValue, 16>& LdChain, SDValue Chain, 641 SDValue BasePtr, const Value *SV, 642 int SVOffset, unsigned Alignment, 643 bool isVolatile, unsigned LdWidth, 644 MVT ResType, DebugLoc dl); 645 646 /// Helper genWidenVectorStores - Helper function to generate a set of 647 /// stores to store a widen vector into non widen memory 648 /// It takes 649 /// StChain: list of chains for the stores we have generated 650 /// Chain: incoming chain for the ld vector 651 /// BasePtr: base pointer to load from 652 /// SV: memory disambiguation source value 653 /// SVOffset: memory disambiugation offset 654 /// Alignment: alignment of the memory 655 /// isVolatile: volatile lod 656 /// ValOp: value to store 657 /// StWidth: width of memory that we want to store 658 /// dl: DebugLoc to be applied to new nodes 659 void GenWidenVectorStores(SmallVector<SDValue, 16>& StChain, SDValue Chain, 660 SDValue BasePtr, const Value *SV, 661 int SVOffset, unsigned Alignment, 662 bool isVolatile, SDValue ValOp, 663 unsigned StWidth, DebugLoc dl); 664 665 /// Modifies a vector input (widen or narrows) to a vector of NVT. The 666 /// input vector must have the same element type as NVT. 667 SDValue ModifyToType(SDValue InOp, MVT WidenVT); 668 669 670 //===--------------------------------------------------------------------===// 671 // Generic Splitting: LegalizeTypesGeneric.cpp 672 //===--------------------------------------------------------------------===// 673 674 // Legalization methods which only use that the illegal type is split into two 675 // not necessarily identical types. As such they can be used for splitting 676 // vectors and expanding integers and floats. 677 678 void GetSplitOp(SDValue Op, SDValue &Lo, SDValue &Hi) { 679 if (Op.getValueType().isVector()) 680 GetSplitVector(Op, Lo, Hi); 681 else if (Op.getValueType().isInteger()) 682 GetExpandedInteger(Op, Lo, Hi); 683 else 684 GetExpandedFloat(Op, Lo, Hi); 685 } 686 687 /// GetSplitDestVTs - Compute the VTs needed for the low/hi parts of a type 688 /// which is split (or expanded) into two not necessarily identical pieces. 689 void GetSplitDestVTs(MVT InVT, MVT &LoVT, MVT &HiVT); 690 691 /// GetPairElements - Use ISD::EXTRACT_ELEMENT nodes to extract the low and 692 /// high parts of the given value. 693 void GetPairElements(SDValue Pair, SDValue &Lo, SDValue &Hi); 694 695 // Generic Result Splitting. 696 void SplitRes_MERGE_VALUES(SDNode *N, SDValue &Lo, SDValue &Hi); 697 void SplitRes_SELECT (SDNode *N, SDValue &Lo, SDValue &Hi); 698 void SplitRes_SELECT_CC (SDNode *N, SDValue &Lo, SDValue &Hi); 699 void SplitRes_UNDEF (SDNode *N, SDValue &Lo, SDValue &Hi); 700 701 //===--------------------------------------------------------------------===// 702 // Generic Expansion: LegalizeTypesGeneric.cpp 703 //===--------------------------------------------------------------------===// 704 705 // Legalization methods which only use that the illegal type is split into two 706 // identical types of half the size, and that the Lo/Hi part is stored first 707 // in memory on little/big-endian machines, followed by the Hi/Lo part. As 708 // such they can be used for expanding integers and floats. 709 710 void GetExpandedOp(SDValue Op, SDValue &Lo, SDValue &Hi) { 711 if (Op.getValueType().isInteger()) 712 GetExpandedInteger(Op, Lo, Hi); 713 else 714 GetExpandedFloat(Op, Lo, Hi); 715 } 716 717 // Generic Result Expansion. 718 void ExpandRes_BIT_CONVERT (SDNode *N, SDValue &Lo, SDValue &Hi); 719 void ExpandRes_BUILD_PAIR (SDNode *N, SDValue &Lo, SDValue &Hi); 720 void ExpandRes_EXTRACT_ELEMENT (SDNode *N, SDValue &Lo, SDValue &Hi); 721 void ExpandRes_EXTRACT_VECTOR_ELT(SDNode *N, SDValue &Lo, SDValue &Hi); 722 void ExpandRes_NormalLoad (SDNode *N, SDValue &Lo, SDValue &Hi); 723 void ExpandRes_VAARG (SDNode *N, SDValue &Lo, SDValue &Hi); 724 725 // Generic Operand Expansion. 726 SDValue ExpandOp_BIT_CONVERT (SDNode *N); 727 SDValue ExpandOp_BUILD_VECTOR (SDNode *N); 728 SDValue ExpandOp_EXTRACT_ELEMENT (SDNode *N); 729 SDValue ExpandOp_INSERT_VECTOR_ELT(SDNode *N); 730 SDValue ExpandOp_SCALAR_TO_VECTOR (SDNode *N); 731 SDValue ExpandOp_NormalStore (SDNode *N, unsigned OpNo); 732}; 733 734} // end namespace llvm. 735 736#endif 737